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    Searched refs:AVX (Results 1 - 23 of 23) sorted by relevancy

  /src/external/gpl3/gcc/dist/gcc/config/i386/
i386-isa.def 25 DEF_PTA(AVX)
  /src/external/gpl3/gcc.old/dist/gcc/config/i386/
i386-isa.def 25 DEF_PTA(AVX)
  /src/sys/external/mit/xen-include-public/dist/xen/include/public/arch-x86/
cpufeatureset.h 148 XEN_CPUFEATURE(AVX, 1*32+28) /*A Advanced Vector Extensions */
176 XEN_CPUFEATURE(XOP, 3*32+11) /*A extended AVX instructions */
210 XEN_CPUFEATURE(AVX512F, 5*32+16) /*A AVX-512 Foundation Instructions */
211 XEN_CPUFEATURE(AVX512DQ, 5*32+17) /*A AVX-512 Doubleword & Quadword Instrs */
215 XEN_CPUFEATURE(AVX512IFMA, 5*32+21) /*A AVX-512 Integer Fused Multiply Add */
218 XEN_CPUFEATURE(AVX512PF, 5*32+26) /*A AVX-512 Prefetch Instructions */
219 XEN_CPUFEATURE(AVX512ER, 5*32+27) /*A AVX-512 Exponent & Reciprocal Instrs */
220 XEN_CPUFEATURE(AVX512CD, 5*32+28) /*A AVX-512 Conflict Detection Instrs */
222 XEN_CPUFEATURE(AVX512BW, 5*32+30) /*A AVX-512 Byte and Word Instructions */
223 XEN_CPUFEATURE(AVX512VL, 5*32+31) /*A AVX-512 Vector Length Extensions *
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86Subtarget.h 62 NoSSE, SSE1, SSE2, SSE3, SSSE3, SSE41, SSE42, AVX, AVX2, AVX512F
271 /// all AVX-512 CPUs.
331 /// Processor has AVX-512 PreFetch Instructions
334 /// Processor has AVX-512 Exponential and Reciprocal Instructions
337 /// Processor has AVX-512 Conflict Detection Instructions
340 /// Processor has AVX-512 population count Instructions
343 /// Processor has AVX-512 Doubleword and Quadword instructions
346 /// Processor has AVX-512 Byte and Word instructions
349 /// Processor has AVX-512 Vector Length eXtenstions
355 /// Processor has AVX-512 Vector Neural Network Instruction
    [all...]
  /src/external/apache2/llvm/dist/clang/lib/Basic/Targets/
X86.cpp 139 // Enable xsave if avx is enabled and xsave is not explicitly disabled.
140 I = Features.find("avx");
322 .Case("+avx", AVX)
357 hasFeature("avx512f") ? 512 : hasFeature("avx") ? 256 : 128;
751 case AVX:
782 case AVX:
837 .Case("avx", true)
928 .Case("avx", SSELevel >= AVX)
    [all...]
X86.h 60 AVX,
301 if (getTriple().getArch() == llvm::Triple::x86_64 && SSELevel >= AVX)
302 return "avx";
516 hasFeature("avx512f") ? 512 : hasFeature("avx") ? 256 : 128;
889 hasFeature("avx512f") ? 512 : hasFeature("avx") ? 256 : 128;
  /src/external/lgpl3/gmp/dist/mpn/x86_64/bd1/
hamdist.asm 60 C We use vpshlb and vpperm below, which are XOP extensions to AVX. Some
61 C systems, e.g., NetBSD, set OSXSAVE but nevertheless trigger SIGILL for AVX.
popcount.asm 61 C We use vpshlb and vpperm below, which are XOP extensions to AVX. Some
62 C systems, e.g., NetBSD, set OSXSAVE but nevertheless trigger SIGILL for AVX.
  /src/external/lgpl3/gmp/dist/mpn/x86_64/fastavx/
copyd.asm 1 dnl AMD64 mpn_copyd optimised for CPUs with fast AVX.
copyi.asm 1 dnl AMD64 mpn_copyi optimised for CPUs with fast AVX.
  /src/external/apache2/llvm/dist/llvm/lib/Analysis/
VFABIDemangling.cpp 39 .Case("c", VFISAKind::AVX)
  /src/external/lgpl3/gmp/dist/mpn/x86_64/coreinhm/
hamdist.asm 57 C * An AVX pshufb based variant should approach 0.5 c/l on Haswell and later
popcount.asm 59 C * An AVX pshufb based variant should approach 0.5 c/l on Haswell and later
  /src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/
VectorUtils.h 48 AVX, // x86 AVX
  /src/external/apache2/llvm/dist/llvm/lib/Support/Windows/
Signals.inc 232 // at AVX registers, which typically aren't needed by StackWalk64. Reduce the
  /src/external/gpl3/binutils/dist/opcodes/
i386-gen.c 106 "BTVER1|AVX|BMI|F16C|AES|PCLMULQDQ|Movbe|Xsaveopt|PRFCHW" },
144 "AVX" },
146 "AVX" },
152 "AVX" },
161 { "AVX",
164 "AVX" },
232 "AVX" },
361 BITFIELD (AVX),
848 /* No AVX/XOP -> SSE reverse dependencies. */
  /src/external/gpl3/binutils.old/dist/opcodes/
i386-gen.c 104 "BTVER1|AVX|BMI|F16C|AES|PCLMULQDQ|Movbe|Xsaveopt|PRFCHW" },
142 "AVX" },
144 "AVX" },
150 "AVX" },
159 { "AVX",
162 "AVX" },
228 "AVX" },
345 BITFIELD (AVX),
828 /* No AVX/XOP -> SSE reverse dependencies. */
  /src/external/gpl3/gdb/dist/opcodes/
i386-gen.c 104 "BTVER1|AVX|BMI|F16C|AES|PCLMULQDQ|Movbe|Xsaveopt|PRFCHW" },
142 "AVX" },
144 "AVX" },
150 "AVX" },
159 { "AVX",
162 "AVX" },
228 "AVX" },
327 BITFIELD (AVX),
798 /* No AVX/XOP -> SSE reverse dependencies. */
  /src/external/gpl3/gdb.old/dist/opcodes/
i386-gen.c 102 "BTVER1|AVX|BMI|F16C|AES|PCLMULQDQ|Movbe|Xsaveopt|PRFCHW" },
140 "AVX" },
142 "AVX" },
148 "AVX" },
157 { "AVX",
160 "AVX" },
226 "AVX" },
321 BITFIELD (AVX),
789 /* No AVX/XOP -> SSE reverse dependencies. */
  /src/external/apache2/llvm/dist/clang/lib/CodeGen/
TargetInfo.cpp 2179 /// The AVX ABI level for X86 targets.
2182 AVX,
2191 case X86AVXABILevel::AVX:
2460 // that when AVX types are involved: the ABI explicitly states it is
2556 return checkAVXParamFeature(Diag, CallLoc, CallerMap, CalleeMap, Ty, "avx",
2572 // The "avx" feature changes how vectors >128 in size are passed. "avx512f"
11161 : ABI == "avx" ? X86AVXABILevel::AVX : X86AVXABILevel::None);
  /src/external/mit/isl/dist/
configure 7712 *3?6[ae]?:*:*:*) icc_flags="-xCORE-AVX-I -xAVX -SSE4.2 -xS -xT -xB -xK" ;;
7713 *3?6[cf]?:*:*:*|*4?6[56]?:*:*:*) icc_flags="-xCORE-AVX2 -xCORE-AVX-I -xAVX -SSE4.2 -xS -xT -xB -xK" ;;
8073 *2?6[ad]?:*:*:*) ax_gcc_arch="sandybridge corei7-avx corei7 core2 pentium-m pentium3 pentiumpro" ;;
8074 *3?6[ae]?:*:*:*) ax_gcc_arch="ivybridge core-avx-i corei7-avx corei7 core2 pentium-m pentium3 pentiumpro" ;;
8075 *3?6[cf]?:*:*:*|*4?6[56]?:*:*:*) ax_gcc_arch="haswell core-avx2 core-avx-i corei7-avx corei7 core2 pentium-m pentium3 pentiumpro" ;;
8076 *3?6d?:*:*:*|*4?6[7f]?:*:*:*|*5?66?:*:*:*) ax_gcc_arch="broadwell core-avx2 core-avx-i corei7-avx corei7 core2 pentium-m pentium3 pentiumpro" ;;
  /src/external/gpl3/binutils/dist/gas/config/
tc-i386.c 915 /* Encode scalar AVX instructions with specific vector length. */
1120 VECARCH (avx, AVX, ANY_AVX, reset),
2315 /* Dual AVX/AVX512 templates need to retain AVX512* only if we already
2381 /* AVX and AVX2 present at the same time express an operand size
4936 AVX instructions also use this encoding, for some of
8793 /* Somewhat similarly, templates specifying both AVX and AVX2 are
9889 AVX-* feature to be explicitly enabled.
18052 encode scalar AVX instructions with specific vector\n\
  /src/external/gpl3/binutils.old/dist/gas/config/
tc-i386.c 906 /* Encode scalar AVX instructions with specific vector length. */
1104 VECARCH (avx, AVX, ANY_AVX, reset),
2277 /* Dual AVX/AVX512 templates need to retain AVX512* only if we already
2332 /* AVX and AVX2 present at the same time express an operand size
4862 AVX instructions also use this encoding, for some of
8627 /* Somewhat similarly, templates specifying both AVX and AVX2 are
9722 AVX-* feature to be explicitly enabled.
17879 encode scalar AVX instructions with specific vector\n\

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