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    Searched refs:HADDR (Results 1 - 8 of 8) sorted by relevancy

  /src/sys/dev/microcode/aic7xxx/
aic7xxx.seq 204 mvi DINDEX, HADDR;
770 bmov HADDR, CCSGRAM, 7;
802 add A, A, HADDR[0];
866 bmov HADDR, SCB_DATAPTR, 7;
869 mvi DINDEX, HADDR;
1078 * we can batch the clearing of HADDR with the fixup.
1089 clr HADDR;
1166 * Reload HADDR from SHADDR and setup the
1170 bmov HADDR, SHADDR, 4;
1174 mvi DINDEX, HADDR;
    [all...]
aic79xx.seq 721 bmov HADDR[0], SCB_HOST_CDB_PTR, 9;
1315 bmov HADDR, CCSGRAM, 8;
1317 bmov HADDR, CCSGRAM, 4;
1322 and HADDR[4], SG_HIGH_ADDR_BITS, SCB_RESIDUAL_DATACNT[3];
1359 bmov HADDR, SCB_DATAPTR, 11;
1704 bmov HADDR, SCB_SENSE_BUSADDR, 4;
1727 bmov HADDR[0], SCB_HOST_CDB_PTR, 9;
2021 mov HADDR[0], SHARED_DATA_ADDR;
2022 add HADDR[1], PKT_OVERRUN_BUFOFFSET, SHARED_DATA_ADDR[1];
2025 adc HADDR[2], A, SHARED_DATA_ADDR[2]
    [all...]
aic7xxx.reg 417 * to determine the address of the last byte transferred since HADDR
775 register HADDR {
aic7xxx_reg.h 663 ahc_print_register(NULL, 0, "HADDR", 0x88, regvalue, cur_col, wrap)
1518 #define HADDR 0x88
aic79xx.reg 490 register HADDR {
aic79xx_reg.h 1027 ahd_print_register(NULL, 0, "HADDR", 0x70, regvalue, cur_col, wrap)
3080 #define HADDR 0x70
  /src/sys/dev/ic/
aic79xx.c 607 ahd_outq(ahd, HADDR, ahd_inq_scbram(ahd, SCB_DATAPTR));
768 ahd_outq(ahd, HADDR, data_addr);
998 ahd_outq(ahd, HADDR, scb->sense_busaddr);
4962 ahd_outb(ahd, HADDR + 7, dataptr >> 56);
4963 ahd_outb(ahd, HADDR + 6, dataptr >> 48);
4964 ahd_outb(ahd, HADDR + 5, dataptr >> 40);
4965 ahd_outb(ahd, HADDR + 4, dataptr >> 32);
4977 ahd_outb(ahd, HADDR + 4,
4980 ahd_outb(ahd, HADDR + 3, dataptr >> 24);
4981 ahd_outb(ahd, HADDR + 2, dataptr >> 16)
    [all...]
aic7xxx.c 882 ahc_outb(ahc, HADDR, 0);
3706 ahc_outb(ahc, HADDR,
3710 ahc_outb(ahc, HADDR + 3, dataptr >> 24);
3711 ahc_outb(ahc, HADDR + 2, dataptr >> 16);
3712 ahc_outb(ahc, HADDR + 1, dataptr >> 8);
3713 ahc_outb(ahc, HADDR, dataptr);

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