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  /src/sys/rump/dev/lib/libpad/
Makefile 7 COMMENT=Pseudo Audio Device
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVISelDAGToDAG.h 102 uint16_t Pseudo;
112 uint16_t Pseudo;
121 uint16_t Pseudo;
131 uint16_t Pseudo;
140 uint16_t Pseudo;
148 uint16_t Pseudo;
157 uint16_t Pseudo;
RISCVInstrInfo.h 160 uint16_t Pseudo;
RISCVISelDAGToDAG.cpp 188 CurDAG->getMachineNode(P->Pseudo, DL, MVT::Untyped, MVT::Other, Operands);
228 MachineSDNode *Load = CurDAG->getMachineNode(P->Pseudo, DL, MVT::Untyped,
279 CurDAG->getMachineNode(P->Pseudo, DL, MVT::Untyped, MVT::Other, Operands);
319 CurDAG->getMachineNode(P->Pseudo, DL, Node->getValueType(0), Operands);
356 CurDAG->getMachineNode(P->Pseudo, DL, Node->getValueType(0), Operands);
795 CurDAG->getMachineNode(P->Pseudo, DL, Node->getVTList(), Operands);
831 CurDAG->getMachineNode(P->Pseudo, DL, Node->getVTList(), Operands);
859 CurDAG->getMachineNode(P->Pseudo, DL, Node->getValueType(0),
986 CurDAG->getMachineNode(P->Pseudo, DL, Node->getVTList(), Operands);
1020 CurDAG->getMachineNode(P->Pseudo, DL, Node->getVTList(), Operands)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/MCTargetDesc/
MipsBaseInfo.h 104 // Pseudo - This represents an instruction that is a pseudo instruction
107 Pseudo = 0,
  /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
SparcInstrInfo.h 31 Pseudo = (1<<0),
101 // Lower pseudo instructions after register allocation.
  /src/external/apache2/llvm/dist/llvm/include/llvm/MC/
MCInstrDesc.h 150 Pseudo,
262 /// Return true if this is a pseudo instruction that doesn't
264 bool isPseudo() const { return Flags & (1ULL << MCID::Pseudo); }
494 /// this is true for the instruction, it basically means that it is a pseudo
  /src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/Mips/
Target.cpp 25 case MipsII::Pseudo:
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/
ARMBaseInfo.h 313 // Pseudo instructions
314 Pseudo = 0 << FormShift,
ARMMCCodeEmitter.cpp 1868 // Pseudo instructions don't get encoded.
1871 if ((TSFlags & ARMII::FormMask) == ARMII::Pseudo)
  /src/external/apache2/llvm/dist/llvm/utils/TableGen/
X86RecognizableInstr.h 95 Pseudo = 0,
PseudoLoweringEmitter.cpp 22 #define DEBUG_TYPE "pseudo-lowering"
36 CodeGenInstruction Source; // The source pseudo instruction definition.
58 void evaluateExpansion(Record *Pseudo);
63 /// run - Output the pseudo-lowerings.
68 // FIXME: This pass currently can only expand a pseudo to a single instruction.
69 // The pseudo expansion really should take a list of dags, not just
91 assert(BaseIdx == 0 && "Named subargument in pseudo expansion?!");
94 PrintError(Rec, "In pseudo instruction '" + Rec->getName() +
125 llvm_unreachable("Unhandled pseudo-expansion argument type!");
131 LLVM_DEBUG(dbgs() << "Pseudo definition: " << Rec->getName() << "\n")
    [all...]
X86RecognizableInstr.cpp 123 if (Form == X86Local::Pseudo || (IsCodeGenOnly && !ForceDisassemble)) {
761 case X86Local::Pseudo: llvm_unreachable("Pseudo should not be emitted!");
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/
X86BaseInfo.h 579 // PseudoFrm - This represents an instruction that is a pseudo instruction
582 Pseudo = 0,
969 /// \returns true if the instruction with given opcode is a pseudo.
971 return (TSFlags & X86II::FormMask) == Pseudo;
1092 case X86II::Pseudo:
X86MCCodeEmitter.cpp 524 // Check for presence of {disp8} or {disp32} pseudo prefixes.
528 // We only allow no displacement if no pseudo prefix is present.
577 // disp8 if the {disp32} pseudo prefix is present.
589 // Displacement may be 0 for [EBP] or [R13] case if {disp32} pseudo prefix
625 // {disp32} pseudo prefix was used.
1400 // Pseudo instructions don't get encoded.
1416 // Pseudo instructions don't get encoded.
1450 case X86II::Pseudo:
1451 llvm_unreachable("Pseudo instruction shouldn't be emitted");
  /src/external/apache2/llvm/dist/llvm/include/llvm/DebugInfo/CodeView/
CodeView.h 283 Pseudo = 0x0020,
  /src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/X86/
Target.cpp 63 case X86II::Pseudo:
195 if ((Instr.Description.TSFlags & X86II::FormMask) == X86II::Pseudo)
196 return "unsupported opcode: pseudo instruction";
788 // Lowers FP pseudo-instructions, e.g. ABS_Fp32 -> ABS_F.
  /src/external/apache2/llvm/dist/llvm/lib/DebugInfo/CodeView/
EnumTables.cpp 334 CV_ENUM_CLASS_ENT(MethodOptions, Pseudo),
TypeDumpVisitor.cpp 52 ENUM_ENTRY(MethodOptions, Pseudo),
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
MachineInstr.h 796 /// Return true if this is a pseudo instruction that doesn't
799 return hasProperty(MCID::Pseudo, Type);
1071 /// means that it is a pseudo instruction used at SelectionDAG time that is
1853 assert(isPseudoProbe() && "Must be a pseudo probe instruction");
1858 assert(isPseudoProbe() && "Must be a pseudo probe instruction");
  /src/external/apache2/llvm/dist/llvm/tools/llvm-pdbutil/
MinimalTypeDumper.cpp 192 PUSH_FLAG(MethodOptions, Pseudo, Flags, "pseudo");
  /src/external/apache2/llvm/dist/llvm/lib/ObjectYAML/
CodeViewYAMLTypes.cpp 383 IO.bitSetCase(Options, "Pseudo", MethodOptions::Pseudo);
  /src/external/apache2/llvm/dist/clang/lib/Frontend/Rewrite/
RewriteModernObjC.cpp 349 Stmt *RewritePropertyOrImplicitGetter(PseudoObjectExpr *Pseudo);
350 Stmt *RewritePropertyOrImplicitSetter(PseudoObjectExpr *Pseudo);
5449 // Pseudo-object operations and ivar references need special
RewriteObjC.cpp 295 Stmt *RewritePropertyOrImplicitGetter(PseudoObjectExpr *Pseudo);
296 Stmt *RewritePropertyOrImplicitSetter(PseudoObjectExpr *Pseudo);
4575 // Pseudo-object operations and ivar references need special
  /src/external/gpl3/gcc.old/dist/libphobos/src/std/
random.d 1650 /* A complete list of all pseudo-random number generators implemented in
1652 * object is compatible with all the pseudo-random number generators
2424 Pseudo-random unsigned integer strictly less than `k`.

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