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      1 /*	$NetBSD: pmap_bootstrap.c,v 1.72 2026/04/05 14:35:50 thorpej Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1991, 1993
      5  *	The Regents of the University of California.  All rights reserved.
      6  *
      7  * This code is derived from software contributed to Berkeley by
      8  * the Systems Programming Group of the University of Utah Computer
      9  * Science Department.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  * 3. Neither the name of the University nor the names of its contributors
     20  *    may be used to endorse or promote products derived from this software
     21  *    without specific prior written permission.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     24  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     25  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     26  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     27  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     28  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     29  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     30  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     31  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     32  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     33  * SUCH DAMAGE.
     34  *
     35  *	@(#)pmap_bootstrap.c	8.1 (Berkeley) 6/10/93
     36  */
     37 
     38 #include <sys/cdefs.h>
     39 __KERNEL_RCSID(0, "$NetBSD: pmap_bootstrap.c,v 1.72 2026/04/05 14:35:50 thorpej Exp $");
     40 
     41 #include "opt_m68k_arch.h"
     42 
     43 #include <sys/param.h>
     44 #include <uvm/uvm_extern.h>
     45 
     46 #include <machine/cpu.h>
     47 #include <machine/pte.h>
     48 #include <machine/vmparam.h>
     49 #include <arch/x68k/x68k/iodevice.h>
     50 
     51 #define RELOC(v, t)	*((t*)((uintptr_t)&(v) + firstpa))
     52 
     53 extern char *etext;
     54 
     55 extern psize_t physmem;
     56 extern vaddr_t kernel_reloc_offset;
     57 
     58 /*
     59  * Special purpose kernel virtual addresses, used for mapping
     60  * physical pages for a variety of temporary or permanent purposes:
     61  *
     62  *	CADDR1, CADDR2:	pmap zero/copy operations
     63  *	vmmap:		/dev/mem, crash dumps, parity error checking
     64  *	msgbufaddr:	kernel message buffer
     65  */
     66 void *CADDR1, *CADDR2;
     67 char *vmmap;
     68 extern void *msgbufaddr;
     69 
     70 paddr_t pmap_bootstrap1(paddr_t, paddr_t);
     71 
     72 /*
     73  * Bootstrap the VM system.
     74  *
     75  * Called with MMU off so we must relocate all global references by `firstpa'
     76  * (don't call any functions here!)  `nextpa' is the first available physical
     77  * memory address.  Returns an updated first PA reflecting the memory we
     78  * have allocated.  MMU is still off when we return.
     79  *
     80  * XXX assumes sizeof(u_int) == sizeof(pt_entry_t)
     81  * XXX a PIC compiler would make this much easier.
     82  */
     83 paddr_t __attribute__((no_instrument_function))
     84 pmap_bootstrap1(paddr_t nextpa, paddr_t firstpa)
     85 {
     86 	paddr_t lwp0upa, kstpa, kptmpa, kptpa;
     87 	u_int nptpages, kstsize;
     88 	st_entry_t protoste, *ste, *este;
     89 	pt_entry_t protopte, *pte, *epte;
     90 #if defined(M68040) || defined(M68060)
     91 	u_int stfree = 0;	/* XXX: gcc -Wuninitialized */
     92 #endif
     93 
     94 	nextpa = m68k_round_page(nextpa);
     95 
     96 	/*
     97 	 * Calculate important physical addresses:
     98 	 *
     99 	 *	lwp0upa		lwp0 u-area		UPAGES pages
    100 	 *
    101 	 *	kstpa		kernel segment table	1 page (!040)
    102 	 *						N pages (040)
    103 	 *
    104 	 *	kptmpa		kernel PT map		1 page
    105 	 *
    106 	 *	kptpa		statically allocated
    107 	 *			kernel PT pages		Sysptsize+ pages
    108 	 *
    109 	 * [ Sysptsize is the number of pages of PT, and IIOMAPSIZE
    110 	 *   is the number of PTEs, hence we need to round
    111 	 *   the total to a page boundary with IO maps at the end. ]
    112 	 *
    113 	 * The KVA corresponding to any of these PAs is:
    114 	 *	(PA - firstpa + KERNBASE).
    115 	 */
    116 	RELOC(kernel_reloc_offset, vaddr_t) = firstpa;
    117 
    118 	lwp0upa = nextpa;
    119 	nextpa += USPACE;
    120 	if (RELOC(mmutype, int) == MMU_68040)
    121 		kstsize = MAXKL2SIZE / (NPTEPG/SG4_LEV2SIZE);
    122 	else
    123 		kstsize = 1;
    124 	kstpa = nextpa;
    125 	nextpa += kstsize * PAGE_SIZE;
    126 	kptmpa = nextpa;
    127 	nextpa += PAGE_SIZE;
    128 	kptpa = nextpa;
    129 	nptpages = RELOC(Sysptsize, int) +
    130 	    howmany(RELOC(physmem, psize_t), NPTEPG) +
    131 	    (IIOMAPSIZE + NPTEPG - 1) / NPTEPG;
    132 	nextpa += nptpages * PAGE_SIZE;
    133 
    134 	/*
    135 	 * Clear all PTEs to zero
    136 	 */
    137 	for (pte = (pt_entry_t *)kstpa; pte < (pt_entry_t *)nextpa; pte++)
    138 		*pte = 0;
    139 
    140 	/*
    141 	 * Initialize segment table and kernel page table map.
    142 	 *
    143 	 * On 68030s and earlier MMUs the two are identical except for
    144 	 * the valid bits so both are initialized with essentially the
    145 	 * same values.  On the 68040, which has a mandatory 3-level
    146 	 * structure, the segment table holds the level 1 table and part
    147 	 * (or all) of the level 2 table and hence is considerably
    148 	 * different.  Here the first level consists of 128 descriptors
    149 	 * (512 bytes) each mapping 32mb of address space.  Each of these
    150 	 * points to blocks of 128 second level descriptors (512 bytes)
    151 	 * each mapping 256kb.  Note that there may be additional "segment
    152 	 * table" pages depending on how large MAXKL2SIZE is.
    153 	 *
    154 	 * Portions of the last segment of KVA space (0xFFC00000 -
    155 	 * 0xFFFFFFFF) are mapped for the kernel page tables.
    156 	 *
    157 	 * XXX cramming two levels of mapping into the single "segment"
    158 	 * table on the 68040 is intended as a temporary hack to get things
    159 	 * working.  The 224mb of address space that this allows will most
    160 	 * likely be insufficient in the future (at least for the kernel).
    161 	 */
    162 #if defined(M68040) || defined(M68060)
    163 	if (RELOC(mmutype, int) == MMU_68040) {
    164 		int nl1desc, nl2desc, i;
    165 
    166 		/*
    167 		 * First invalidate the entire "segment table" pages
    168 		 * (levels 1 and 2 have the same "invalid" value).
    169 		 */
    170 		ste = (st_entry_t *)kstpa;
    171 		este = &ste[kstsize * NPTEPG];
    172 		while (ste < este)
    173 			*ste++ = SG_NV;
    174 		/*
    175 		 * Initialize level 2 descriptors (which immediately
    176 		 * follow the level 1 table).  We need:
    177 		 *	NPTEPG / SG4_LEV3SIZE
    178 		 * level 2 descriptors to map each of the nptpages
    179 		 * pages of PTEs.  Note that we set the "used" bit
    180 		 * now to save the HW the expense of doing it.
    181 		 */
    182 		nl2desc = nptpages * (NPTEPG / SG4_LEV3SIZE);
    183 		ste = (st_entry_t *)kstpa;
    184 		ste = &ste[SG4_LEV1SIZE];
    185 		este = &ste[nl2desc];
    186 		protoste = kptpa | SG_U | SG_RW | SG_V;
    187 		while (ste < este) {
    188 			*ste++ = protoste;
    189 			protoste += (SG4_LEV3SIZE * sizeof(st_entry_t));
    190 		}
    191 		/*
    192 		 * Initialize level 1 descriptors.  We need:
    193 		 *	howmany(nl2desc, SG4_LEV2SIZE)
    194 		 * level 1 descriptors to map the `nl2desc' level 2's.
    195 		 */
    196 		nl1desc = howmany(nl2desc, SG4_LEV2SIZE);
    197 		ste = (st_entry_t *)kstpa;
    198 		este = &ste[nl1desc];
    199 		protoste = (paddr_t)&ste[SG4_LEV1SIZE] | SG_U | SG_RW | SG_V;
    200 		while (ste < este) {
    201 			*ste++ = protoste;
    202 			protoste += (SG4_LEV2SIZE * sizeof(st_entry_t));
    203 		}
    204 		/*
    205 		 * Initialize the final level 1 descriptor to map the next
    206 		 * block of level 2 descriptors for Sysptmap.
    207 		 */
    208 		ste = (st_entry_t *)kstpa;
    209 		ste = &ste[SG4_LEV1SIZE - 1];
    210 		*ste = protoste;
    211 		/*
    212 		 * Now initialize the final portion of that block of
    213 		 * descriptors to map Sysmap.
    214 		 */
    215 		i = SG4_LEV1SIZE + (nl1desc * SG4_LEV2SIZE);
    216 		ste = (st_entry_t *)kstpa;
    217 		ste = &ste[i + SG4_LEV2SIZE - (NPTEPG / SG4_LEV3SIZE)];
    218 		este = &ste[NPTEPG / SG4_LEV3SIZE];
    219 		protoste = kptmpa | SG_U | SG_RW | SG_V;
    220 		while (ste < este) {
    221 			*ste++ = protoste;
    222 			protoste += (SG4_LEV3SIZE * sizeof(st_entry_t));
    223 		}
    224 		/*
    225 		 * Calculate the free level 2 descriptor mask
    226 		 * noting that we have used:
    227 		 *	0:		level 1 table
    228 		 *	1 to nl1desc:	map page tables
    229 		 *	nl1desc + 1:	maps kptmpa and last-page page table
    230 		 */
    231 		/* mark an entry for level 1 table */
    232 		stfree = ~l2tobm(0);
    233 		/* mark entries for map page tables */
    234 		for (i = 1; i <= nl1desc; i++)
    235 			stfree &= ~l2tobm(i);
    236 		/* mark an entry for kptmpa */
    237 		stfree &= ~l2tobm(i);
    238 		/* mark entries not available */
    239 		for (i = MAXKL2SIZE; i < sizeof(stfree) * NBBY; i++)
    240 			stfree &= ~l2tobm(i);
    241 
    242 		/*
    243 		 * Initialize Sysptmap
    244 		 */
    245 		pte = (pt_entry_t *)kptmpa;
    246 		epte = &pte[nptpages];
    247 		protopte = kptpa | PG_RW | PG_CI | PG_V;
    248 		while (pte < epte) {
    249 			*pte++ = protopte;
    250 			protopte += PAGE_SIZE;
    251 		}
    252 		/*
    253 		 * Invalidate all remaining entries.
    254 		 */
    255 		epte = (pt_entry_t *)kptmpa;
    256 		epte = &epte[TIB_SIZE];
    257 		while (pte < epte) {
    258 			*pte++ = PG_NV;
    259 		}
    260 		/*
    261 		 * Initialize the last one to point to Sysptmap.
    262 		 */
    263 		pte = (pt_entry_t *)kptmpa;
    264 		pte = &pte[SYSMAP_VA >> SEGSHIFT];
    265 		*pte = kptmpa | PG_RW | PG_CI | PG_V;
    266 	} else
    267 #endif /* M68040 || M68060 */
    268 	{
    269 		/*
    270 		 * Map the page table pages in both the HW segment table
    271 		 * and the software Sysptmap.
    272 		 */
    273 		ste = (st_entry_t *)kstpa;
    274 		pte = (pt_entry_t *)kptmpa;
    275 		epte = &pte[nptpages];
    276 		protoste = kptpa | SG_RW | SG_V;
    277 		protopte = kptpa | PG_RW | PG_CI | PG_V;
    278 		while (pte < epte) {
    279 			*ste++ = protoste;
    280 			*pte++ = protopte;
    281 			protoste += PAGE_SIZE;
    282 			protopte += PAGE_SIZE;
    283 		}
    284 		/*
    285 		 * Invalidate all remaining entries in both.
    286 		 */
    287 		este = (st_entry_t *)kstpa;
    288 		este = &este[TIA_SIZE];
    289 		while (ste < este)
    290 			*ste++ = SG_NV;
    291 		epte = (pt_entry_t *)kptmpa;
    292 		epte = &epte[TIB_SIZE];
    293 		while (pte < epte)
    294 			*pte++ = PG_NV;
    295 		/*
    296 		 * Initialize the last one to point to Sysptmap.
    297 		 */
    298 		ste = (st_entry_t *)kstpa;
    299 		ste = &ste[SYSMAP_VA >> SEGSHIFT];
    300 		pte = (pt_entry_t *)kptmpa;
    301 		pte = &pte[SYSMAP_VA >> SEGSHIFT];
    302 		*ste = kptmpa | SG_RW | SG_V;
    303 		*pte = kptmpa | PG_RW | PG_CI | PG_V;
    304 	}
    305 
    306 	/*
    307 	 * Initialize kernel page table.
    308 	 * Start by invalidating the `nptpages' that we have allocated.
    309 	 */
    310 	pte = (pt_entry_t *)kptpa;
    311 	epte = &pte[nptpages * NPTEPG];
    312 	while (pte < epte)
    313 		*pte++ = PG_NV;
    314 	/*
    315 	 * Validate PTEs for kernel text (RO).
    316 	 */
    317 	pte = (pt_entry_t *)kptpa;
    318 	pte = &pte[m68k_btop(KERNBASE)];
    319 	epte = &pte[m68k_btop(m68k_trunc_page(&etext))];
    320 	protopte = firstpa | PG_RO | PG_V;
    321 	while (pte < epte) {
    322 		*pte++ = protopte;
    323 		protopte += PAGE_SIZE;
    324 	}
    325 	/*
    326 	 * Validate PTEs for kernel data/bss, dynamic data allocated
    327 	 * by us so far (kstpa - firstpa bytes), and pages for lwp0
    328 	 * u-area and page table allocated below (RW).
    329 	 */
    330 	epte = (pt_entry_t *)kptpa;
    331 	epte = &epte[m68k_btop(kstpa - firstpa)];
    332 	protopte = (protopte & ~PG_PROT) | PG_RW;
    333 	/*
    334 	 * Enable copy-back caching of data pages
    335 	 */
    336 	if (RELOC(mmutype, int) == MMU_68040)
    337 		protopte |= PG_CCB;
    338 	while (pte < epte) {
    339 		*pte++ = protopte;
    340 		protopte += PAGE_SIZE;
    341 	}
    342 	/*
    343 	 * Map the kernel segment table cache invalidated for 68040/68060.
    344 	 * (for the 68040 not strictly necessary, but recommended by Motorola;
    345 	 *  for the 68060 mandatory)
    346 	 */
    347 	epte = (pt_entry_t *)kptpa;
    348 	epte = &epte[m68k_btop(nextpa - firstpa)];
    349 	protopte = (protopte & ~PG_PROT) | PG_RW;
    350 	if (RELOC(mmutype, int) == MMU_68040) {
    351 		protopte &= ~PG_CCB;
    352 		protopte |= PG_CIN;
    353 	}
    354 	while (pte < epte) {
    355 		*pte++ = protopte;
    356 		protopte += PAGE_SIZE;
    357 	}
    358 
    359 	/*
    360 	 * Finally, validate the internal IO space PTEs (RW+CI).
    361 	 */
    362 
    363 #define	PTE2VA(pte)	m68k_ptob(pte - ((pt_entry_t *)kptpa))
    364 
    365 	protopte = INTIOBASE | PG_RW | PG_CI | PG_V;
    366 	epte = &pte[IIOMAPSIZE];
    367 	RELOC(intiobase, uint8_t *) = (uint8_t *)PTE2VA(pte);
    368 	while (pte < epte) {
    369 		*pte++ = protopte;
    370 		protopte += PAGE_SIZE;
    371 	}
    372 	RELOC(virtual_avail, vaddr_t) = PTE2VA(pte);
    373 
    374 	/*
    375 	 * Calculate important exported kernel addresses and related values.
    376 	 */
    377 	/*
    378 	 * Sysseg: base of kernel segment table
    379 	 */
    380 	RELOC(Sysseg, st_entry_t *) = (st_entry_t *)(kstpa - firstpa);
    381 	RELOC(Sysseg_pa, paddr_t) = kstpa;
    382 #if defined(M68040) || defined(M68060)
    383 	if (RELOC(mmutype, int) == MMU_68040)
    384 		RELOC(protostfree, u_int) = stfree;
    385 #endif
    386 	/*
    387 	 * Sysptmap: base of kernel page table map
    388 	 */
    389 	RELOC(Sysptmap, pt_entry_t *) = (pt_entry_t *)(kptmpa - firstpa);
    390 	/*
    391 	 * Sysmap: kernel page table (as mapped through Sysptmap)
    392 	 * Allocated at the end of KVA space.
    393 	 */
    394 	RELOC(Sysmap, pt_entry_t *) = (pt_entry_t *)SYSMAP_VA;
    395 
    396 	/*
    397 	 * Remember the u-area address so it can be loaded in the lwp0
    398 	 * via uvm_lwp_setuarea() later in pmap_bootstrap2().
    399 	 */
    400 	RELOC(lwp0uarea, vaddr_t) = lwp0upa - firstpa;
    401 
    402 	RELOC(virtual_end, vaddr_t) = VM_MAX_KERNEL_ADDRESS;
    403 
    404 	/*
    405 	 * Allocate some fixed, special purpose kernel virtual addresses
    406 	 */
    407 	{
    408 		vaddr_t va = RELOC(virtual_avail, vaddr_t);
    409 
    410 		RELOC(CADDR1, void *) = (void *)va;
    411 		va += PAGE_SIZE;
    412 		RELOC(CADDR2, void *) = (void *)va;
    413 		va += PAGE_SIZE;
    414 		RELOC(vmmap, void *) = (void *)va;
    415 		va += PAGE_SIZE;
    416 		RELOC(msgbufaddr, void *) = (void *)va;
    417 		va += m68k_round_page(MSGBUFSIZE);
    418 		RELOC(virtual_avail, vaddr_t) = va;
    419 	}
    420 
    421 	return nextpa;
    422 }
    423