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  /src/sys/arch/powerpc/booke/
e500_mpsubr.S 54 mr %r20, %r31
76 lis %r20, _C_LABEL(cpu_hatch_data)@h
77 ori %r20, %r20, _C_LABEL(cpu_hatch_data)@l
97 stw %r0, HATCH_RUNNING(%r20) /* progress */
100 dcbf 0, %r20
103 lwz %r1, HATCH_SP(%r20) /* get hatch SP */
104 lwz %r21, HATCH_CI(%r20) /* get cpu_info */
115 lwz %r22, HATCH_HID0(%r20) /* get HID0 */
120 lwz %r24, HATCH_TBL(%r20) /* get lower timebase value *
    [all...]
  /src/external/lgpl3/gmp/dist/mpn/pa64/
lshift.asm 63 copy %r21, %r20
67 copy %r21, %r20
71 copy %r21, %r20
75 copy %r21, %r20
78 LDEF(0) ldd -16(up), %r20
79 shrpd %r21, %r20, %sar, %r21
82 shrpd %r20, %r21, %sar, %r20
83 std %r20, -16(rp)
84 LDEF(6) ldd -32(up), %r20
    [all...]
rshift.asm 60 copy %r21, %r20
64 copy %r21, %r20
68 copy %r21, %r20
72 copy %r21, %r20
75 LDEF(0) ldd 8(up), %r20
76 shrpd %r20, %r21, %sar, %r21
79 shrpd %r21, %r20, %sar, %r20
80 std %r20, 8(rp)
81 LDEF(6) ldd 24(up), %r20
    [all...]
aors_n.asm 84 ldd 0(up), %r20
86 ADCSBC %r20, %r31, %r20
87 std %r20, 0(rp)
92 LDEF(6) ldd 16(up), %r20
94 ADCSBC %r20, %r31, %r20
95 std %r20, 16(rp)
100 LDEF(4) ldd 32(up), %r20
102 ADCSBC %r20, %r31, %r2
    [all...]
  /src/tests/kernel/arch/hppa/
contextspfunc.S 42 addil LT%_C_LABEL(contextdone), %r19 /* r20 := contextdone */
43 ldw RT%_C_LABEL(contextdone)(%r1), %r20
46 bv %r0(%r20) /* jump to contextdone */
execsp.S 66 addil LT%_C_LABEL(startsp), %r19 /* r20 := &startsp */
67 ldw RT%_C_LABEL(startsp)(%r1), %r20
73 stw %sp, 0(%r20) /* startsp := sp */
117 addil LT%_C_LABEL(dtorsp), %r19 /* r20 := &dtorsp */
118 ldw RT%_C_LABEL(dtorsp)(%r1), %r20
124 stw %sp, 0(%r20) /* startsp := sp */
  /src/external/lgpl3/gmp/dist/mpn/pa32/hppa1_1/pa7100/
lshift.asm 51 vshd %r22,%r29,%r20
55 stws,mb %r20,-4(0,%r26)
56 vshd %r29,%r22,%r20
58 stws,mb %r20,-4(0,%r26)
59 vshd %r22,%r29,%r20
61 stws,mb %r20,-4(0,%r26)
62 vshd %r29,%r22,%r20
64 stws,mb %r20,-4(0,%r26)
66 vshd %r22,%r29,%r20
74 stws,mb %r20,-4(0,%r26
    [all...]
rshift.asm 48 vshd %r29,%r22,%r20
52 stws,ma %r20,4(0,%r26)
53 vshd %r22,%r29,%r20
55 stws,ma %r20,4(0,%r26)
56 vshd %r29,%r22,%r20
58 stws,ma %r20,4(0,%r26)
59 vshd %r22,%r29,%r20
61 stws,ma %r20,4(0,%r26)
63 vshd %r29,%r22,%r20
71 stws,ma %r20,4(0,%r26
    [all...]
add_n.asm 43 ldws,ma 4(0,%r25),%r20
47 add %r20,%r19,%r28 C add first limbs ignoring cy
50 ldws,ma 4(0,%r25),%r20
53 addc %r20,%r19,%r28
54 ldws,ma 4(0,%r25),%r20
57 addc %r20,%r19,%r28
58 ldws,ma 4(0,%r25),%r20
61 addc %r20,%r19,%r28
62 ldws,ma 4(0,%r25),%r20
66 addc %r20,%r19,%r2
    [all...]
sub_n.asm 43 ldws,ma 4(0,%r25),%r20
47 sub %r20,%r19,%r28 C subtract first limbs ignoring cy
50 ldws,ma 4(0,%r25),%r20
53 subb %r20,%r19,%r28
54 ldws,ma 4(0,%r25),%r20
57 subb %r20,%r19,%r28
58 ldws,ma 4(0,%r25),%r20
61 subb %r20,%r19,%r28
62 ldws,ma 4(0,%r25),%r20
66 subb %r20,%r19,%r2
    [all...]
  /src/external/lgpl3/gmp/dist/mpn/pa32/hppa2_0/
add_n.asm 54 ldw 0(%r25),%r20
56 addc %r20,%r31,%r20
57 stw %r20,0(%r26)
66 ldw 8(%r25),%r20
68 addc %r20,%r31,%r20
69 stw %r20,8(%r26)
78 ldw 16(%r25),%r20
80 addc %r20,%r31,%r2
    [all...]
sub_n.asm 53 ldw 0(%r25),%r20
55 subb %r20,%r31,%r20
56 stw %r20,0(%r26)
65 ldw 8(%r25),%r20
67 subb %r20,%r31,%r20
68 stw %r20,8(%r26)
77 ldw 16(%r25),%r20
79 subb %r20,%r31,%r2
    [all...]
  /src/external/lgpl3/gmp/dist/mpn/alpha/
mode1o.asm 90 srl r18, 1, r20 C d >> 1
92 and r20, 127, r20 C idx = d>>1 & 0x7F
94 addq r0, r20, r21 C table + idx
97 ` ldbu r20, 0(r21) C table[idx], inverse 8 bits
99 ldq_u r20, 0(r21) C table[idx] qword
100 extbl r20, r21, r20 C table[idx], inverse 8 bits
103 mull r20, r20, r7 C i*
    [all...]
rshift.asm 48 subq r31,r19,r20
51 sll r4,r20,r0 C compute function result
63 sll r3,r20,r6
78 sll r1,r20,r7
80 sll r2,r20,r8
85 sll r3,r20,r5
89 sll r4,r20,r6
102 sll r1,r20,r7
107 sll r2,r20,r8
117 sll r3,r20,r
    [all...]
  /src/external/lgpl3/gmp/dist/mpn/pa32/
lshift.asm 50 vshd %r22,%r29,%r20
54 stws,mb %r20,-4(0,%r26)
56 vshd %r29,%r22,%r20
58 stws,mb %r20,-4(0,%r26)
60 vshd %r22,%r29,%r20
63 stws,mb %r20,-4(0,%r26)
64 vshd %r29,%r0,%r20
66 stw %r20,-4(0,%r26)
69 stws,mb %r20,-4(0,%r26)
72 vshd %r22,%r0,%r20
    [all...]
rshift.asm 47 vshd %r29,%r22,%r20
51 stws,ma %r20,4(0,%r26)
53 vshd %r22,%r29,%r20
55 stws,ma %r20,4(0,%r26)
57 vshd %r29,%r22,%r20
60 stws,ma %r20,4(0,%r26)
61 vshd %r0,%r29,%r20
63 stw %r20,0(0,%r26)
66 stws,ma %r20,4(0,%r26)
69 vshd %r0,%r22,%r20
    [all...]
  /src/external/gpl3/gdb.old/dist/sim/testsuite/pru/
dram.s 26 fill r20, 16
29 qbne F, r20, r10
34 zero r20, 16
35 qbne F, r20, 0
41 lbbo &r20, r0, 0, 7
42 qbne F, r20.b0, 0x01
43 qbne F, r20.b1, 0x23
44 qbne F, r20.b2, 0x45
45 qbne F, r20.b3, 0x67
58 lbbo &r20, r0, 0, 1
    [all...]
  /src/external/gpl3/gdb/dist/sim/testsuite/pru/
dram.s 26 fill r20, 16
29 qbne F, r20, r10
34 zero r20, 16
35 qbne F, r20, 0
41 lbbo &r20, r0, 0, 7
42 qbne F, r20.b0, 0x01
43 qbne F, r20.b1, 0x23
44 qbne F, r20.b2, 0x45
45 qbne F, r20.b3, 0x67
58 lbbo &r20, r0, 0, 1
    [all...]
  /src/external/lgpl3/gmp/dist/mpn/alpha/ev6/nails/
aors_n.asm 81 bis r31, r31, r20
94 OP rl0, r20, rl0
97 srl rl0, CYSH, r20
116 OP rl0, r20, rl0 C cy-add 0
118 srl rl0, CYSH, r20 C gen cy 0
119 OP rl1, r20, rl1 C cy-add 1
126 OP rl0, r20, rl0 C cy-add 0
128 srl rl0, CYSH, r20 C gen cy 0
131 OP rl1, r20, rl1 C cy-add 1
134 srl rl1, CYSH, r20 C gen cy
    [all...]
  /src/sys/arch/ia64/ia64/
exception.S 252 mov r20=ar.unat
294 * r18=pr, r19=length, r20=unat, r21=rsc, r22=iip, r23=TOS
313 // r18=pr, r19=length, r20=unat, r21=rsc, r22=iip, r23=TOS
322 st8 [r31]=r20,16 // unat
328 mov r20=ar.bspstore
332 // r18=pr, r19=rnat, r20=bspstore, r21=rsc, r22=iip, r23=rp
342 st8 [r31]=r20,16 // bspstore
349 extr.u r24=r20,61,3
352 // r18=fpsr, r19=rnat, r20=bspstore, r21=rsc, r22=iip, r23=ipsr
369 (p13) dep r20=r20,r21,0,9 // align dirty register
    [all...]
  /src/external/gpl3/gcc/dist/libgcc/config/epiphany/
divsi3.S 54 mov r20,0
71 movgteu r20,r0
73 add r17,r0,r20
76 movgteu r20,r17
86 orr r20,r0,r20 ; ... and combine with first bit.
87 .L0step:eor r0,r20,r19 ; restore sign
  /src/external/gpl3/gcc.old/dist/libgcc/config/epiphany/
divsi3.S 54 mov r20,0
71 movgteu r20,r0
73 add r17,r0,r20
76 movgteu r20,r17
86 orr r20,r0,r20 ; ... and combine with first bit.
87 .L0step:eor r0,r20,r19 ; restore sign
  /src/external/gpl3/gcc/dist/libgcc/config/nios2/
crtn.S 34 ldw r20, 28(sp)
48 ldw r20, 28(sp)
  /src/external/gpl3/gcc.old/dist/libgcc/config/nios2/
crtn.S 34 ldw r20, 28(sp)
48 ldw r20, 28(sp)
  /src/external/lgpl3/gmp/dist/mpn/alpha/ev6/
aorsmul_1.asm 86 and r18, 7, r20 C
88 cmpeq r20, 1, r21 C
95 CMPCY( r5, r23), r20 C
96 addq r8, r20, r0 C
103 cmpeq r20, 2, r21 C
105 cmpeq r20, 3, r21 C
107 cmpeq r20, 4, r21 C
109 cmpeq r20, 5, r21 C
111 cmpeq r20, 6, r21 C
113 cmpeq r20, 7, r21
    [all...]

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