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  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/
imx7ulp.dtsi 132 <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>;
155 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
167 assigned-clock-parents = <&scg1 IMX7ULP_CLK_FIRC>;
176 assigned-clock-parents = <&scg1 IMX7ULP_CLK_SOSC_BUS_CLK>;
186 clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>,
222 clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>,
223 <&scg1 IMX7ULP_CLK_NIC1_DIV>,
236 clocks = <&scg1 IMX7ULP_CLK_NIC1_BUS_DIV>,
237 <&scg1 IMX7ULP_CLK_NIC1_DIV>,
246 scg1: clock-controller@403e0000 label in label:ahbbridge0
    [all...]
imx7ulp-com.dts 41 assigned-clock-parents = <&scg1 IMX7ULP_CLK_APLL_PFD1>;
imx7ulp-evk.dts 81 assigned-clock-parents = <&scg1 IMX7ULP_CLK_APLL_PFD1>;

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