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    Searched refs:xffffffff (Results 1 - 25 of 2694) sorted by relevancy

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  /src/external/bsd/nsd/dist/simdzone/src/generic/
base64.h 68 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
69 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
    [all...]
  /src/external/gpl3/gcc.old/dist/libphobos/src/std/internal/
unicode_comp.d 1846 0x70007, 0x70007, 0x70007, 0x70007, 0x70007, 0x70007, 0xffffffff,
1847 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff,
1848 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff
    [all...]
unicode_tables.d 7457 0xffffffff, 0xffefffff, 0x1ffffff, 0x3, 0x1f, 0x0, 0x0, 0x20,
7459 0xffff0000, 0xffffffff, 0xaaaaaaaa, 0xaaaaa802, 0xaaaaaaaa, 0xaaaad554,
7462 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0x0, 0xffffffff,
7463 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x0, 0x0,
7470 0x3fda1562, 0xaaaaaaaa, 0xaaaaaaaa, 0xaaaaaaaa, 0x8501a, 0xffffffff,
7506 0xe6905555, 0xffffffff, 0xffff, 0x0, 0x55555555, 0x55555401
    [all...]
  /src/tests/lib/libc/inet/
t_inet_network.c 77 H_REQUIRE("4.2.3.1.", 0xffffffff);
78 H_REQUIRE("0x123456", 0xffffffff);
79 H_REQUIRE("0x12.0x345", 0xffffffff);
80 H_REQUIRE("1.2.3.4.5", 0xffffffff);
81 H_REQUIRE("1..3.4", 0xffffffff);
82 H_REQUIRE(".", 0xffffffff);
83 H_REQUIRE("1.", 0xffffffff);
84 H_REQUIRE(".1", 0xffffffff);
85 H_REQUIRE("0x", 0xffffffff);
86 H_REQUIRE("", 0xffffffff);
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/radeon/
radeon_btc_dpm.c 66 0x000008f8, 0x00000010, 0xffffffff,
67 0x000008fc, 0x00000000, 0xffffffff,
68 0x000008f8, 0x00000011, 0xffffffff,
69 0x000008fc, 0x00000000, 0xffffffff,
70 0x000008f8, 0x00000012, 0xffffffff,
71 0x000008fc, 0x00000000, 0xffffffff,
72 0x000008f8, 0x00000013, 0xffffffff,
73 0x000008fc, 0x00000000, 0xffffffff,
74 0x000008f8, 0x00000014, 0xffffffff,
75 0x000008fc, 0x00000000, 0xffffffff,
    [all...]
radeon_rv770.c 143 0x8d00, 0xffffffff, 0x0e0e0074,
144 0x8d04, 0xffffffff, 0x013a2b34,
145 0x9508, 0xffffffff, 0x00000002,
146 0x8b20, 0xffffffff, 0,
147 0x88c4, 0xffffffff, 0x000000c2,
148 0x28350, 0xffffffff, 0,
149 0x9058, 0xffffffff, 0x0fffc40f,
150 0x240c, 0xffffffff, 0x00000380,
151 0x733c, 0xffffffff, 0x00000002,
154 0x7300, 0xffffffff, 0x001000f
    [all...]
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_si.c 64 mmDB_DEBUG, 0xffffffff, 0x00000000,
76 mmPA_SC_FORCE_EOV_MAX_CNTS, 0xffffffff, 0x00ffffff,
80 0x000c, 0xffffffff, 0x0040,
88 mmTCP_CHAN_STEER_HI, 0xffffffff, 0x0000543b,
89 mmTCP_CHAN_STEER_LO, 0xffffffff, 0xa9210876,
90 mmVGT_FIFO_DEPTHS, 0xffffffff, 0x000fff40,
94 mmVM_PRT_APERTURE0_LOW_ADDR, 0x0fffffff, 0xffffffff,
107 mmGB_ADDR_CONFIG, 0xffffffff, 0x12011003,
108 mmRLC_LB_PARAMS, 0xffffffff, 0x00601005,
109 0x311f, 0xffffffff, 0x10104040
    [all...]
amdgpu_mxgpu_vi.c 52 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
53 mmGRBM_GFX_INDEX, 0xffffffff, 0xe0000000,
54 mmCB_CGTT_SCLK_CTRL, 0xffffffff, 0x00000100,
55 mmCGTT_BCI_CLK_CTRL, 0xffffffff, 0x00000100,
56 mmCGTT_CP_CLK_CTRL, 0xffffffff, 0x00000100,
57 mmCGTT_CPC_CLK_CTRL, 0xffffffff, 0x00000100,
58 mmCGTT_CPF_CLK_CTRL, 0xffffffff, 0x40000100,
59 mmCGTT_DRM_CLK_CTRL0, 0xffffffff, 0x00600100,
60 mmCGTT_GDS_CLK_CTRL, 0xffffffff, 0x00000100
    [all...]
amdgpu_cik.c 181 0x31dc, 0xffffffff, 0x00000800,
182 0x31dd, 0xffffffff, 0x00000800,
183 0x31e6, 0xffffffff, 0x00007fbf,
184 0x31e7, 0xffffffff, 0x00007faf
195 0x260c, 0xffffffff, 0x00000000,
218 0x22c9, 0xffffffff, 0x00ffffff,
229 0x2b03, 0xffffffff, 0x00001032
234 0x3108, 0xffffffff, 0xfffffffc,
235 0xc200, 0xffffffff, 0xe0000000,
236 0xf0a8, 0xffffffff, 0x00000100
    [all...]
  /src/external/gpl3/gcc/dist/gcc/config/gcn/
gcn.h 471 {0xffffffff, 0xffffffff, 0xffffffff, 0xf1, \
477 {0xffffffff, 0xffffffff, 0xffffffff, \
484 {0xffffffff, 0xffffffff, 0xffffffff, \
485 0xffffffff \
    [all...]
  /src/external/gpl2/dtc/dist/tests/
overlay_overlay_manual_fixups.dts 17 target = <0xffffffff /*&test*/>;
26 target = <0xffffffff /*&test*/>;
35 target = <0xffffffff /*&test*/>;
44 target = <0xffffffff /*&test*/>;
54 target = <0xffffffff /*&test*/>;
64 target = <0xffffffff /*&test*/>;
67 test-phandle = <0xffffffff /*&test*/>, <&local>;
72 target = <0xffffffff /*&test*/>;
80 target = <0xffffffff /*&test*/>;
overlay_bad_fixup_base.dtsi 12 target = <0xffffffff>;
  /src/external/gpl3/gcc.old/dist/gcc/config/gcn/
gcn.h 369 {0xffffffff, 0xffffffff, 0xffffffff, 0xf1, \
373 {0xffffffff, 0xffffffff, 0xffffffff, \
378 {0xffffffff, 0xffffffff, 0xffffffff, \
379 0xffffffff \
    [all...]
  /src/sys/arch/hpc/stand/include/machine/
limits.h 21 #define UINT_MAX 0xffffffff /* max value for an unsigned int */
25 #define ULONG_MAX 0xffffffff /* max value for an unsigned long */
  /src/external/gpl3/gdb/dist/sim/ppc/
altivec_expression.h 27 if (checkone && ((*vS).w[0] == 0xffffffff && \
28 (*vS).w[1] == 0xffffffff && \
29 (*vS).w[2] == 0xffffffff && \
30 (*vS).w[3] == 0xffffffff)) \
  /src/external/gpl3/gdb.old/dist/sim/ppc/
altivec_expression.h 27 if (checkone && ((*vS).w[0] == 0xffffffff && \
28 (*vS).w[1] == 0xffffffff && \
29 (*vS).w[2] == 0xffffffff && \
30 (*vS).w[3] == 0xffffffff)) \
  /src/tests/usr.bin/xlint/lint1/
msg_386.c 34 0xffffffff);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/mmhub/
mmhub_2_0_0_default.h 152 #define mmDAGB0_RESERVE0_DEFAULT 0xffffffff
153 #define mmDAGB0_RESERVE1_DEFAULT 0xffffffff
154 #define mmDAGB0_RESERVE2_DEFAULT 0xffffffff
155 #define mmDAGB0_RESERVE3_DEFAULT 0xffffffff
156 #define mmDAGB0_RESERVE4_DEFAULT 0xffffffff
157 #define mmDAGB0_RESERVE5_DEFAULT 0xffffffff
158 #define mmDAGB0_RESERVE6_DEFAULT 0xffffffff
159 #define mmDAGB0_RESERVE7_DEFAULT 0xffffffff
160 #define mmDAGB0_RESERVE8_DEFAULT 0xffffffff
161 #define mmDAGB0_RESERVE9_DEFAULT 0xffffffff
    [all...]
  /src/external/bsd/ipf/dist/lib/
fill6bits.c 26 msk[0] = 0xffffffff;
27 msk[1] = 0xffffffff;
28 msk[2] = 0xffffffff;
29 msk[3] = 0xffffffff;
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
smu_7_1_1_sh_mask.h 29 #define GCK_SMC_IND_INDEX__SMC_IND_ADDR_MASK 0xffffffff
31 #define GCK_SMC_IND_DATA__SMC_IND_DATA_MASK 0xffffffff
307 #define SMC_IND_INDEX__SMC_IND_ADDR_MASK 0xffffffff
309 #define SMC_IND_DATA__SMC_IND_DATA_MASK 0xffffffff
311 #define SMC_IND_INDEX_0__SMC_IND_ADDR_MASK 0xffffffff
313 #define SMC_IND_DATA_0__SMC_IND_DATA_MASK 0xffffffff
315 #define SMC_IND_INDEX_1__SMC_IND_ADDR_MASK 0xffffffff
317 #define SMC_IND_DATA_1__SMC_IND_DATA_MASK 0xffffffff
319 #define SMC_IND_INDEX_2__SMC_IND_ADDR_MASK 0xffffffff
321 #define SMC_IND_DATA_2__SMC_IND_DATA_MASK 0xffffffff
    [all...]
smu_7_0_1_sh_mask.h 29 #define GCK_SMC_IND_INDEX__SMC_IND_ADDR_MASK 0xffffffff
31 #define GCK_SMC_IND_DATA__SMC_IND_DATA_MASK 0xffffffff
307 #define SMC_IND_INDEX__SMC_IND_ADDR_MASK 0xffffffff
309 #define SMC_IND_DATA__SMC_IND_DATA_MASK 0xffffffff
311 #define SMC_IND_INDEX_0__SMC_IND_ADDR_MASK 0xffffffff
313 #define SMC_IND_DATA_0__SMC_IND_DATA_MASK 0xffffffff
315 #define SMC_IND_INDEX_1__SMC_IND_ADDR_MASK 0xffffffff
317 #define SMC_IND_DATA_1__SMC_IND_DATA_MASK 0xffffffff
319 #define SMC_IND_INDEX_2__SMC_IND_ADDR_MASK 0xffffffff
321 #define SMC_IND_DATA_2__SMC_IND_DATA_MASK 0xffffffff
    [all...]
smu_7_1_0_sh_mask.h 29 #define GCK_SMC_IND_INDEX__SMC_IND_ADDR_MASK 0xffffffff
31 #define GCK_SMC_IND_DATA__SMC_IND_DATA_MASK 0xffffffff
305 #define SMC_IND_INDEX__SMC_IND_ADDR_MASK 0xffffffff
307 #define SMC_IND_DATA__SMC_IND_DATA_MASK 0xffffffff
309 #define SMC_IND_INDEX_0__SMC_IND_ADDR_MASK 0xffffffff
311 #define SMC_IND_DATA_0__SMC_IND_DATA_MASK 0xffffffff
313 #define SMC_IND_INDEX_1__SMC_IND_ADDR_MASK 0xffffffff
315 #define SMC_IND_DATA_1__SMC_IND_DATA_MASK 0xffffffff
317 #define SMC_IND_INDEX_2__SMC_IND_ADDR_MASK 0xffffffff
319 #define SMC_IND_DATA_2__SMC_IND_DATA_MASK 0xffffffff
    [all...]
  /src/sys/external/bsd/acpica/dist/tests/misc/
converterSample.asl 19 0, 0xffffffff,
24 0x00000001, 0xffffffff,
32 0xffffffff, 0xffffffff,
  /src/external/gpl3/gdb.old/dist/sim/m32r/
dv-m32r_cache.h 42 #define MCCR_ADDR 0xffffffff
  /src/external/gpl3/gdb/dist/sim/m32r/
dv-m32r_cache.h 42 #define MCCR_ADDR 0xffffffff

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1 2 3 4 5 6 7 8 91011>>