1 //==-- AArch64FrameLowering.h - TargetFrameLowering for AArch64 --*- C++ -*-==// 2 // 3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions. 4 // See https://llvm.org/LICENSE.txt for license information. 5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception 6 // 7 //===----------------------------------------------------------------------===// 8 // 9 // 10 // 11 //===----------------------------------------------------------------------===// 12 13 #ifndef LLVM_LIB_TARGET_AARCH64_AARCH64FRAMELOWERING_H 14 #define LLVM_LIB_TARGET_AARCH64_AARCH64FRAMELOWERING_H 15 16 #include "llvm/Support/TypeSize.h" 17 #include "llvm/CodeGen/TargetFrameLowering.h" 18 19 namespace llvm { 20 21 class MCCFIInstruction; 22 23 class AArch64FrameLowering : public TargetFrameLowering { 24 public: 25 explicit AArch64FrameLowering() 26 : TargetFrameLowering(StackGrowsDown, Align(16), 0, Align(16), 27 true /*StackRealignable*/) {} 28 29 void 30 emitCalleeSavedFrameMoves(MachineBasicBlock &MBB, 31 MachineBasicBlock::iterator MBBI) const override; 32 33 MachineBasicBlock::iterator 34 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB, 35 MachineBasicBlock::iterator I) const override; 36 37 /// emitProlog/emitEpilog - These methods insert prolog and epilog code into 38 /// the function. 39 void emitPrologue(MachineFunction &MF, MachineBasicBlock &MBB) const override; 40 void emitEpilogue(MachineFunction &MF, MachineBasicBlock &MBB) const override; 41 42 bool canUseAsPrologue(const MachineBasicBlock &MBB) const override; 43 44 StackOffset getFrameIndexReference(const MachineFunction &MF, int FI, 45 Register &FrameReg) const override; 46 StackOffset resolveFrameIndexReference(const MachineFunction &MF, int FI, 47 Register &FrameReg, bool PreferFP, 48 bool ForSimm) const; 49 StackOffset resolveFrameOffsetReference(const MachineFunction &MF, 50 int64_t ObjectOffset, bool isFixed, 51 bool isSVE, Register &FrameReg, 52 bool PreferFP, bool ForSimm) const; 53 bool spillCalleeSavedRegisters(MachineBasicBlock &MBB, 54 MachineBasicBlock::iterator MI, 55 ArrayRef<CalleeSavedInfo> CSI, 56 const TargetRegisterInfo *TRI) const override; 57 58 bool 59 restoreCalleeSavedRegisters(MachineBasicBlock &MBB, 60 MachineBasicBlock::iterator MI, 61 MutableArrayRef<CalleeSavedInfo> CSI, 62 const TargetRegisterInfo *TRI) const override; 63 64 /// Can this function use the red zone for local allocations. 65 bool canUseRedZone(const MachineFunction &MF) const; 66 67 bool hasFP(const MachineFunction &MF) const override; 68 bool hasReservedCallFrame(const MachineFunction &MF) const override; 69 70 bool hasSwiftExtendedFrame(const MachineFunction &MF) const; 71 72 bool assignCalleeSavedSpillSlots(MachineFunction &MF, 73 const TargetRegisterInfo *TRI, 74 std::vector<CalleeSavedInfo> &CSI, 75 unsigned &MinCSFrameIndex, 76 unsigned &MaxCSFrameIndex) const override; 77 78 void determineCalleeSaves(MachineFunction &MF, BitVector &SavedRegs, 79 RegScavenger *RS) const override; 80 81 /// Returns true if the target will correctly handle shrink wrapping. 82 bool enableShrinkWrapping(const MachineFunction &MF) const override { 83 return true; 84 } 85 86 bool enableStackSlotScavenging(const MachineFunction &MF) const override; 87 TargetStackID::Value getStackIDForScalableVectors() const override; 88 89 void processFunctionBeforeFrameFinalized(MachineFunction &MF, 90 RegScavenger *RS) const override; 91 92 void 93 processFunctionBeforeFrameIndicesReplaced(MachineFunction &MF, 94 RegScavenger *RS) const override; 95 96 unsigned getWinEHParentFrameOffset(const MachineFunction &MF) const override; 97 98 unsigned getWinEHFuncletFrameSize(const MachineFunction &MF) const; 99 100 StackOffset 101 getFrameIndexReferencePreferSP(const MachineFunction &MF, int FI, 102 Register &FrameReg, 103 bool IgnoreSPUpdates) const override; 104 StackOffset getNonLocalFrameIndexReference(const MachineFunction &MF, 105 int FI) const override; 106 int getSEHFrameIndexOffset(const MachineFunction &MF, int FI) const; 107 108 bool isSupportedStackID(TargetStackID::Value ID) const override { 109 switch (ID) { 110 default: 111 return false; 112 case TargetStackID::Default: 113 case TargetStackID::ScalableVector: 114 case TargetStackID::NoAlloc: 115 return true; 116 } 117 } 118 119 bool isStackIdSafeForLocalArea(unsigned StackId) const override { 120 // We don't support putting SVE objects into the pre-allocated local 121 // frame block at the moment. 122 return StackId != TargetStackID::ScalableVector; 123 } 124 125 void 126 orderFrameObjects(const MachineFunction &MF, 127 SmallVectorImpl<int> &ObjectsToAllocate) const override; 128 129 private: 130 /// Returns true if a homogeneous prolog or epilog code can be emitted 131 /// for the size optimization. If so, HOM_Prolog/HOM_Epilog pseudo 132 /// instructions are emitted in place. When Exit block is given, this check is 133 /// for epilog. 134 bool homogeneousPrologEpilog(MachineFunction &MF, 135 MachineBasicBlock *Exit = nullptr) const; 136 137 /// Returns true if CSRs should be paired. 138 bool producePairRegisters(MachineFunction &MF) const; 139 140 bool shouldCombineCSRLocalStackBump(MachineFunction &MF, 141 uint64_t StackBumpBytes) const; 142 143 int64_t estimateSVEStackObjectOffsets(MachineFrameInfo &MF) const; 144 int64_t assignSVEStackObjectOffsets(MachineFrameInfo &MF, 145 int &MinCSFrameIndex, 146 int &MaxCSFrameIndex) const; 147 MCCFIInstruction 148 createDefCFAExpressionFromSP(const TargetRegisterInfo &TRI, 149 const StackOffset &OffsetFromSP) const; 150 MCCFIInstruction createCfaOffset(const TargetRegisterInfo &MRI, unsigned DwarfReg, 151 const StackOffset &OffsetFromDefCFA) const; 152 bool shouldCombineCSRLocalStackBumpInEpilogue(MachineBasicBlock &MBB, 153 unsigned StackBumpBytes) const; 154 }; 155 156 } // End llvm namespace 157 158 #endif 159
Indexes created Sun Jun 21 00:25:28 UTC 2026