1 /****************************************************************************** 2 * 3 * Name: actbl1.h - Additional ACPI table definitions 4 * 5 *****************************************************************************/ 6 7 /****************************************************************************** 8 * 9 * 1. Copyright Notice 10 * 11 * Some or all of this work - Copyright (c) 1999 - 2025, Intel Corp. 12 * All rights reserved. 13 * 14 * 2. License 15 * 16 * 2.1. This is your license from Intel Corp. under its intellectual property 17 * rights. You may have additional license terms from the party that provided 18 * you this software, covering your right to use that party's intellectual 19 * property rights. 20 * 21 * 2.2. Intel grants, free of charge, to any person ("Licensee") obtaining a 22 * copy of the source code appearing in this file ("Covered Code") an 23 * irrevocable, perpetual, worldwide license under Intel's copyrights in the 24 * base code distributed originally by Intel ("Original Intel Code") to copy, 25 * make derivatives, distribute, use and display any portion of the Covered 26 * Code in any form, with the right to sublicense such rights; and 27 * 28 * 2.3. Intel grants Licensee a non-exclusive and non-transferable patent 29 * license (with the right to sublicense), under only those claims of Intel 30 * patents that are infringed by the Original Intel Code, to make, use, sell, 31 * offer to sell, and import the Covered Code and derivative works thereof 32 * solely to the minimum extent necessary to exercise the above copyright 33 * license, and in no event shall the patent license extend to any additions 34 * to or modifications of the Original Intel Code. No other license or right 35 * is granted directly or by implication, estoppel or otherwise; 36 * 37 * The above copyright and patent license is granted only if the following 38 * conditions are met: 39 * 40 * 3. Conditions 41 * 42 * 3.1. Redistribution of Source with Rights to Further Distribute Source. 43 * Redistribution of source code of any substantial portion of the Covered 44 * Code or modification with rights to further distribute source must include 45 * the above Copyright Notice, the above License, this list of Conditions, 46 * and the following Disclaimer and Export Compliance provision. In addition, 47 * Licensee must cause all Covered Code to which Licensee contributes to 48 * contain a file documenting the changes Licensee made to create that Covered 49 * Code and the date of any change. Licensee must include in that file the 50 * documentation of any changes made by any predecessor Licensee. Licensee 51 * must include a prominent statement that the modification is derived, 52 * directly or indirectly, from Original Intel Code. 53 * 54 * 3.2. Redistribution of Source with no Rights to Further Distribute Source. 55 * Redistribution of source code of any substantial portion of the Covered 56 * Code or modification without rights to further distribute source must 57 * include the following Disclaimer and Export Compliance provision in the 58 * documentation and/or other materials provided with distribution. In 59 * addition, Licensee may not authorize further sublicense of source of any 60 * portion of the Covered Code, and must include terms to the effect that the 61 * license from Licensee to its licensee is limited to the intellectual 62 * property embodied in the software Licensee provides to its licensee, and 63 * not to intellectual property embodied in modifications its licensee may 64 * make. 65 * 66 * 3.3. Redistribution of Executable. Redistribution in executable form of any 67 * substantial portion of the Covered Code or modification must reproduce the 68 * above Copyright Notice, and the following Disclaimer and Export Compliance 69 * provision in the documentation and/or other materials provided with the 70 * distribution. 71 * 72 * 3.4. Intel retains all right, title, and interest in and to the Original 73 * Intel Code. 74 * 75 * 3.5. Neither the name Intel nor any other trademark owned or controlled by 76 * Intel shall be used in advertising or otherwise to promote the sale, use or 77 * other dealings in products derived from or relating to the Covered Code 78 * without prior written authorization from Intel. 79 * 80 * 4. Disclaimer and Export Compliance 81 * 82 * 4.1. INTEL MAKES NO WARRANTY OF ANY KIND REGARDING ANY SOFTWARE PROVIDED 83 * HERE. ANY SOFTWARE ORIGINATING FROM INTEL OR DERIVED FROM INTEL SOFTWARE 84 * IS PROVIDED "AS IS," AND INTEL WILL NOT PROVIDE ANY SUPPORT, ASSISTANCE, 85 * INSTALLATION, TRAINING OR OTHER SERVICES. INTEL WILL NOT PROVIDE ANY 86 * UPDATES, ENHANCEMENTS OR EXTENSIONS. INTEL SPECIFICALLY DISCLAIMS ANY 87 * IMPLIED WARRANTIES OF MERCHANTABILITY, NONINFRINGEMENT AND FITNESS FOR A 88 * PARTICULAR PURPOSE. 89 * 90 * 4.2. IN NO EVENT SHALL INTEL HAVE ANY LIABILITY TO LICENSEE, ITS LICENSEES 91 * OR ANY OTHER THIRD PARTY, FOR ANY LOST PROFITS, LOST DATA, LOSS OF USE OR 92 * COSTS OF PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES, OR FOR ANY INDIRECT, 93 * SPECIAL OR CONSEQUENTIAL DAMAGES ARISING OUT OF THIS AGREEMENT, UNDER ANY 94 * CAUSE OF ACTION OR THEORY OF LIABILITY, AND IRRESPECTIVE OF WHETHER INTEL 95 * HAS ADVANCE NOTICE OF THE POSSIBILITY OF SUCH DAMAGES. THESE LIMITATIONS 96 * SHALL APPLY NOTWITHSTANDING THE FAILURE OF THE ESSENTIAL PURPOSE OF ANY 97 * LIMITED REMEDY. 98 * 99 * 4.3. Licensee shall not export, either directly or indirectly, any of this 100 * software or system incorporating such software without first obtaining any 101 * required license or other approval from the U. S. Department of Commerce or 102 * any other agency or department of the United States Government. In the 103 * event Licensee exports any such software from the United States or 104 * re-exports any such software from a foreign destination, Licensee shall 105 * ensure that the distribution and export/re-export of the software is in 106 * compliance with all laws, regulations, orders, or other restrictions of the 107 * U.S. Export Administration Regulations. Licensee agrees that neither it nor 108 * any of its subsidiaries will export/re-export any technical data, process, 109 * software, or service, directly or indirectly, to any country for which the 110 * United States government or any agency thereof requires an export license, 111 * other governmental approval, or letter of assurance, without first obtaining 112 * such license, approval or letter. 113 * 114 ***************************************************************************** 115 * 116 * Alternatively, you may choose to be licensed under the terms of the 117 * following license: 118 * 119 * Redistribution and use in source and binary forms, with or without 120 * modification, are permitted provided that the following conditions 121 * are met: 122 * 1. Redistributions of source code must retain the above copyright 123 * notice, this list of conditions, and the following disclaimer, 124 * without modification. 125 * 2. Redistributions in binary form must reproduce at minimum a disclaimer 126 * substantially similar to the "NO WARRANTY" disclaimer below 127 * ("Disclaimer") and any redistribution must be conditioned upon 128 * including a substantially similar Disclaimer requirement for further 129 * binary redistribution. 130 * 3. Neither the names of the above-listed copyright holders nor the names 131 * of any contributors may be used to endorse or promote products derived 132 * from this software without specific prior written permission. 133 * 134 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS 135 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT 136 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR 137 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT 138 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, 139 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT 140 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, 141 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY 142 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT 143 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE 144 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE. 145 * 146 * Alternatively, you may choose to be licensed under the terms of the 147 * GNU General Public License ("GPL") version 2 as published by the Free 148 * Software Foundation. 149 * 150 *****************************************************************************/ 151 152 #ifndef __ACTBL1_H__ 153 #define __ACTBL1_H__ 154 155 156 /******************************************************************************* 157 * 158 * Additional ACPI Tables 159 * 160 * These tables are not consumed directly by the ACPICA subsystem, but are 161 * included here to support device drivers and the AML disassembler. 162 * 163 ******************************************************************************/ 164 165 166 /* 167 * Values for description table header signatures for tables defined in this 168 * file. Useful because they make it more difficult to inadvertently type in 169 * the wrong signature. 170 */ 171 #define ACPI_SIG_AEST "AEST" /* Arm Error Source Table */ 172 #define ACPI_SIG_ASF "ASF!" /* Alert Standard Format table */ 173 #define ACPI_SIG_ASPT "ASPT" /* AMD Secure Processor Table */ 174 #define ACPI_SIG_BERT "BERT" /* Boot Error Record Table */ 175 #define ACPI_SIG_BGRT "BGRT" /* Boot Graphics Resource Table */ 176 #define ACPI_SIG_BOOT "BOOT" /* Simple Boot Flag Table */ 177 #define ACPI_SIG_CEDT "CEDT" /* CXL Early Discovery Table */ 178 #define ACPI_SIG_CPEP "CPEP" /* Corrected Platform Error Polling table */ 179 #define ACPI_SIG_CSRT "CSRT" /* Core System Resource Table */ 180 #define ACPI_SIG_DBG2 "DBG2" /* Debug Port table type 2 */ 181 #define ACPI_SIG_DBGP "DBGP" /* Debug Port table */ 182 #define ACPI_SIG_DMAR "DMAR" /* DMA Remapping table */ 183 #define ACPI_SIG_DRTM "DRTM" /* Dynamic Root of Trust for Measurement table */ 184 #define ACPI_SIG_ECDT "ECDT" /* Embedded Controller Boot Resources Table */ 185 #define ACPI_SIG_EINJ "EINJ" /* Error Injection table */ 186 #define ACPI_SIG_ERST "ERST" /* Error Record Serialization Table */ 187 #define ACPI_SIG_FPDT "FPDT" /* Firmware Performance Data Table */ 188 #define ACPI_SIG_GTDT "GTDT" /* Generic Timer Description Table */ 189 #define ACPI_SIG_HEST "HEST" /* Hardware Error Source Table */ 190 #define ACPI_SIG_HMAT "HMAT" /* Heterogeneous Memory Attributes Table */ 191 #define ACPI_SIG_HPET "HPET" /* High Precision Event Timer table */ 192 #define ACPI_SIG_IBFT "IBFT" /* iSCSI Boot Firmware Table */ 193 #define ACPI_SIG_MSCT "MSCT" /* Maximum System Characteristics Table*/ 194 195 #define ACPI_SIG_S3PT "S3PT" /* S3 Performance (sub)Table */ 196 #define ACPI_SIG_PCCS "PCC" /* PCC Shared Memory Region */ 197 198 199 /* Reserved table signatures */ 200 201 #define ACPI_SIG_MATR "MATR" /* Memory Address Translation Table */ 202 #define ACPI_SIG_MSDM "MSDM" /* Microsoft Data Management Table */ 203 204 /* 205 * These tables have been seen in the field, but no definition has been found 206 */ 207 #ifdef ACPI_UNDEFINED_TABLES 208 #define ACPI_SIG_ATKG "ATKG" 209 #define ACPI_SIG_GSCI "GSCI" /* GMCH SCI table */ 210 #define ACPI_SIG_IEIT "IEIT" 211 #endif 212 213 /* 214 * All tables must be byte-packed to match the ACPI specification, since 215 * the tables are provided by the system BIOS. 216 */ 217 #pragma pack(1) 218 219 /* 220 * Note: C bitfields are not used for this reason: 221 * 222 * "Bitfields are great and easy to read, but unfortunately the C language 223 * does not specify the layout of bitfields in memory, which means they are 224 * essentially useless for dealing with packed data in on-disk formats or 225 * binary wire protocols." (Or ACPI tables and buffers.) "If you ask me, 226 * this decision was a design error in C. Ritchie could have picked an order 227 * and stuck with it." Norman Ramsey. 228 * See http://stackoverflow.com/a/1053662/41661 229 */ 230 231 232 /******************************************************************************* 233 * 234 * Common subtable headers 235 * 236 ******************************************************************************/ 237 238 /* Generic subtable header (used in MADT, SRAT, etc.) */ 239 240 typedef struct acpi_subtable_header 241 { 242 UINT8 Type; 243 UINT8 Length; 244 245 } ACPI_SUBTABLE_HEADER; 246 247 248 /* Subtable header for WHEA tables (EINJ, ERST, WDAT) */ 249 250 typedef struct acpi_whea_header 251 { 252 UINT8 Action; 253 UINT8 Instruction; 254 UINT8 Flags; 255 UINT8 Reserved; 256 ACPI_GENERIC_ADDRESS RegisterRegion; 257 UINT64 Value; /* Value used with Read/Write register */ 258 UINT64 Mask; /* Bitmask required for this register instruction */ 259 260 } ACPI_WHEA_HEADER; 261 262 263 /* Larger subtable header (when Length can exceed 255) */ 264 265 typedef struct acpi_subtbl_hdr_16 266 { 267 UINT16 Type; 268 UINT16 Length; 269 270 } ACPI_SUBTBL_HDR_16; 271 272 273 /******************************************************************************* 274 * 275 * ASF - Alert Standard Format table (Signature "ASF!") 276 * Revision 0x10 277 * 278 * Conforms to the Alert Standard Format Specification V2.0, 23 April 2003 279 * 280 ******************************************************************************/ 281 282 typedef struct acpi_table_asf 283 { 284 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 285 286 } ACPI_TABLE_ASF; 287 288 289 /* ASF subtable header */ 290 291 typedef struct acpi_asf_header 292 { 293 UINT8 Type; 294 UINT8 Reserved; 295 UINT16 Length; 296 297 } ACPI_ASF_HEADER; 298 299 300 /* Values for Type field above */ 301 302 enum AcpiAsfType 303 { 304 ACPI_ASF_TYPE_INFO = 0, 305 ACPI_ASF_TYPE_ALERT = 1, 306 ACPI_ASF_TYPE_CONTROL = 2, 307 ACPI_ASF_TYPE_BOOT = 3, 308 ACPI_ASF_TYPE_ADDRESS = 4, 309 ACPI_ASF_TYPE_RESERVED = 5 310 }; 311 312 /* 313 * ASF subtables 314 */ 315 316 /* 0: ASF Information */ 317 318 typedef struct acpi_asf_info 319 { 320 ACPI_ASF_HEADER Header; 321 UINT8 MinResetValue; 322 UINT8 MinPollInterval; 323 UINT16 SystemId; 324 UINT32 MfgId; 325 UINT8 Flags; 326 UINT8 Reserved2[3]; 327 328 } ACPI_ASF_INFO; 329 330 /* Masks for Flags field above */ 331 332 #define ACPI_ASF_SMBUS_PROTOCOLS (1) 333 334 335 /* 1: ASF Alerts */ 336 337 typedef struct acpi_asf_alert 338 { 339 ACPI_ASF_HEADER Header; 340 UINT8 AssertMask; 341 UINT8 DeassertMask; 342 UINT8 Alerts; 343 UINT8 DataLength; 344 345 } ACPI_ASF_ALERT; 346 347 typedef struct acpi_asf_alert_data 348 { 349 UINT8 Address; 350 UINT8 Command; 351 UINT8 Mask; 352 UINT8 Value; 353 UINT8 SensorType; 354 UINT8 Type; 355 UINT8 Offset; 356 UINT8 SourceType; 357 UINT8 Severity; 358 UINT8 SensorNumber; 359 UINT8 Entity; 360 UINT8 Instance; 361 362 } ACPI_ASF_ALERT_DATA; 363 364 365 /* 2: ASF Remote Control */ 366 367 typedef struct acpi_asf_remote 368 { 369 ACPI_ASF_HEADER Header; 370 UINT8 Controls; 371 UINT8 DataLength; 372 UINT16 Reserved2; 373 374 } ACPI_ASF_REMOTE; 375 376 typedef struct acpi_asf_control_data 377 { 378 UINT8 Function; 379 UINT8 Address; 380 UINT8 Command; 381 UINT8 Value; 382 383 } ACPI_ASF_CONTROL_DATA; 384 385 386 /* 3: ASF RMCP Boot Options */ 387 388 typedef struct acpi_asf_rmcp 389 { 390 ACPI_ASF_HEADER Header; 391 UINT8 Capabilities[7]; 392 UINT8 CompletionCode; 393 UINT32 EnterpriseId; 394 UINT8 Command; 395 UINT16 Parameter; 396 UINT16 BootOptions; 397 UINT16 OemParameters; 398 399 } ACPI_ASF_RMCP; 400 401 402 /* 4: ASF Address */ 403 404 typedef struct acpi_asf_address 405 { 406 ACPI_ASF_HEADER Header; 407 UINT8 EpromAddress; 408 UINT8 Devices; 409 410 } ACPI_ASF_ADDRESS; 411 412 /******************************************************************************* 413 * 414 * ASPT - AMD Secure Processor Table (Signature "ASPT") 415 * Revision 0x1 416 * 417 * Conforms to AMD Socket SP5/SP6 Platform ASPT Rev1 Specification, 418 * 12 September 2022 419 * 420 ******************************************************************************/ 421 422 typedef struct acpi_table_aspt 423 { 424 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 425 UINT32 NumEntries; 426 427 } ACPI_TABLE_ASPT; 428 429 430 /* ASPT subtable header */ 431 432 typedef struct acpi_aspt_header 433 { 434 UINT16 Type; 435 UINT16 Length; 436 437 } ACPI_ASPT_HEADER; 438 439 440 /* Values for Type field above */ 441 442 enum AcpiAsptType 443 { 444 ACPI_ASPT_TYPE_GLOBAL_REGS = 0, 445 ACPI_ASPT_TYPE_SEV_MBOX_REGS = 1, 446 ACPI_ASPT_TYPE_ACPI_MBOX_REGS = 2, 447 ACPI_ASPT_TYPE_UNKNOWN = 3, 448 }; 449 450 /* 451 * ASPT subtables 452 */ 453 454 /* 0: ASPT Global Registers */ 455 456 typedef struct acpi_aspt_global_regs 457 { 458 ACPI_ASPT_HEADER Header; 459 UINT32 Reserved; 460 UINT64 FeatureRegAddr; 461 UINT64 IrqEnRegAddr; 462 UINT64 IrqStRegAddr; 463 464 } ACPI_ASPT_GLOBAL_REGS; 465 466 467 /* 1: ASPT SEV Mailbox Registers */ 468 469 typedef struct acpi_aspt_sev_mbox_regs 470 { 471 ACPI_ASPT_HEADER Header; 472 UINT8 MboxIrqId; 473 UINT8 Reserved[3]; 474 UINT64 CmdRespRegAddr; 475 UINT64 CmdBufLoRegAddr; 476 UINT64 CmdBufHiRegAddr; 477 478 } ACPI_ASPT_SEV_MBOX_REGS; 479 480 481 /* 2: ASPT ACPI Mailbox Registers */ 482 483 typedef struct acpi_aspt_acpi_mbox_regs 484 { 485 ACPI_ASPT_HEADER Header; 486 UINT32 Reserved1; 487 UINT64 CmdRespRegAddr; 488 UINT64 Reserved2[2]; 489 490 } ACPI_ASPT_ACPI_MBOX_REGS; 491 492 493 /******************************************************************************* 494 * 495 * BERT - Boot Error Record Table (ACPI 4.0) 496 * Version 1 497 * 498 ******************************************************************************/ 499 500 typedef struct acpi_table_bert 501 { 502 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 503 UINT32 RegionLength; /* Length of the boot error region */ 504 UINT64 Address; /* Physical address of the error region */ 505 506 } ACPI_TABLE_BERT; 507 508 509 /* Boot Error Region (not a subtable, pointed to by Address field above) */ 510 511 typedef struct acpi_bert_region 512 { 513 UINT32 BlockStatus; /* Type of error information */ 514 UINT32 RawDataOffset; /* Offset to raw error data */ 515 UINT32 RawDataLength; /* Length of raw error data */ 516 UINT32 DataLength; /* Length of generic error data */ 517 UINT32 ErrorSeverity; /* Severity code */ 518 519 } ACPI_BERT_REGION; 520 521 /* Values for BlockStatus flags above */ 522 523 #define ACPI_BERT_UNCORRECTABLE (1) 524 #define ACPI_BERT_CORRECTABLE (1<<1) 525 #define ACPI_BERT_MULTIPLE_UNCORRECTABLE (1<<2) 526 #define ACPI_BERT_MULTIPLE_CORRECTABLE (1<<3) 527 #define ACPI_BERT_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 528 529 /* Values for ErrorSeverity above */ 530 531 enum AcpiBertErrorSeverity 532 { 533 ACPI_BERT_ERROR_CORRECTABLE = 0, 534 ACPI_BERT_ERROR_FATAL = 1, 535 ACPI_BERT_ERROR_CORRECTED = 2, 536 ACPI_BERT_ERROR_NONE = 3, 537 ACPI_BERT_ERROR_RESERVED = 4 /* 4 and greater are reserved */ 538 }; 539 540 /* 541 * Note: The generic error data that follows the ErrorSeverity field above 542 * uses the ACPI_HEST_GENERIC_DATA defined under the HEST table below 543 */ 544 545 546 /******************************************************************************* 547 * 548 * BGRT - Boot Graphics Resource Table (ACPI 5.0) 549 * Version 1 550 * 551 ******************************************************************************/ 552 553 typedef struct acpi_table_bgrt 554 { 555 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 556 UINT16 Version; 557 UINT8 Status; 558 UINT8 ImageType; 559 UINT64 ImageAddress; 560 UINT32 ImageOffsetX; 561 UINT32 ImageOffsetY; 562 563 } ACPI_TABLE_BGRT; 564 565 /* Flags for Status field above */ 566 567 #define ACPI_BGRT_DISPLAYED (1) 568 #define ACPI_BGRT_ORIENTATION_OFFSET (3 << 1) 569 570 571 /******************************************************************************* 572 * 573 * BOOT - Simple Boot Flag Table 574 * Version 1 575 * 576 * Conforms to the "Simple Boot Flag Specification", Version 2.1 577 * 578 ******************************************************************************/ 579 580 typedef struct acpi_table_boot 581 { 582 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 583 UINT8 CmosIndex; /* Index in CMOS RAM for the boot register */ 584 UINT8 Reserved[3]; 585 586 } ACPI_TABLE_BOOT; 587 588 589 /******************************************************************************* 590 * 591 * CDAT - Coherent Device Attribute Table 592 * Version 1 593 * 594 * Conforms to the "Coherent Device Attribute Table (CDAT) Specification 595 " (Revision 1.01, October 2020.) 596 * 597 ******************************************************************************/ 598 599 typedef struct acpi_table_cdat 600 { 601 UINT32 Length; /* Length of table in bytes, including this header */ 602 UINT8 Revision; /* ACPI Specification minor version number */ 603 UINT8 Checksum; /* To make sum of entire table == 0 */ 604 UINT8 Reserved[6]; 605 UINT32 Sequence; /* Used to detect runtime CDAT table changes */ 606 607 } ACPI_TABLE_CDAT; 608 609 610 /* CDAT common subtable header */ 611 612 typedef struct acpi_cdat_header 613 { 614 UINT8 Type; 615 UINT8 Reserved; 616 UINT16 Length; 617 618 } ACPI_CDAT_HEADER; 619 620 /* Values for Type field above */ 621 622 enum AcpiCdatType 623 { 624 ACPI_CDAT_TYPE_DSMAS = 0, 625 ACPI_CDAT_TYPE_DSLBIS = 1, 626 ACPI_CDAT_TYPE_DSMSCIS = 2, 627 ACPI_CDAT_TYPE_DSIS = 3, 628 ACPI_CDAT_TYPE_DSEMTS = 4, 629 ACPI_CDAT_TYPE_SSLBIS = 5, 630 ACPI_CDAT_TYPE_RESERVED = 6 /* 6 through 0xFF are reserved */ 631 }; 632 633 634 /* Subtable 0: Device Scoped Memory Affinity Structure (DSMAS) */ 635 636 typedef struct acpi_cdat_dsmas 637 { 638 UINT8 DsmadHandle; 639 UINT8 Flags; 640 UINT16 Reserved; 641 UINT64 DpaBaseAddress; 642 UINT64 DpaLength; 643 644 } ACPI_CDAT_DSMAS; 645 646 /* Flags for subtable above */ 647 648 #define ACPI_CDAT_DSMAS_NON_VOLATILE (1 << 2) 649 #define ACPI_CDAT_DSMAS_SHAREABLE (1 << 3) 650 #define ACPI_CDAT_DSMAS_READ_ONLY (1 << 6) 651 652 653 /* Subtable 1: Device scoped Latency and Bandwidth Information Structure (DSLBIS) */ 654 655 typedef struct acpi_cdat_dslbis 656 { 657 UINT8 Handle; 658 UINT8 Flags; /* If Handle matches a DSMAS handle, the definition of this field matches 659 * Flags field in HMAT System Locality Latency */ 660 UINT8 DataType; 661 UINT8 Reserved; 662 UINT64 EntryBaseUnit; 663 UINT16 Entry[3]; 664 UINT16 Reserved2; 665 666 } ACPI_CDAT_DSLBIS; 667 668 669 /* Subtable 2: Device Scoped Memory Side Cache Information Structure (DSMSCIS) */ 670 671 typedef struct acpi_cdat_dsmscis 672 { 673 UINT8 DsmasHandle; 674 UINT8 Reserved[3]; 675 UINT64 SideCacheSize; 676 UINT32 CacheAttributes; 677 678 } ACPI_CDAT_DSMSCIS; 679 680 681 /* Subtable 3: Device Scoped Initiator Structure (DSIS) */ 682 683 typedef struct acpi_cdat_dsis 684 { 685 UINT8 Flags; 686 UINT8 Handle; 687 UINT16 Reserved; 688 689 } ACPI_CDAT_DSIS; 690 691 /* Flags for above subtable */ 692 693 #define ACPI_CDAT_DSIS_MEM_ATTACHED (1 << 0) 694 695 696 /* Subtable 4: Device Scoped EFI Memory Type Structure (DSEMTS) */ 697 698 typedef struct acpi_cdat_dsemts 699 { 700 UINT8 DsmasHandle; 701 UINT8 MemoryType; 702 UINT16 Reserved; 703 UINT64 DpaOffset; 704 UINT64 RangeLength; 705 706 } ACPI_CDAT_DSEMTS; 707 708 709 /* Subtable 5: Switch Scoped Latency and Bandwidth Information Structure (SSLBIS) */ 710 711 typedef struct acpi_cdat_sslbis 712 { 713 UINT8 DataType; 714 UINT8 Reserved[3]; 715 UINT64 EntryBaseUnit; 716 717 } ACPI_CDAT_SSLBIS; 718 719 720 /* Sub-subtable for above, SslbeEntries field */ 721 722 typedef struct acpi_cdat_sslbe 723 { 724 UINT16 PortxId; 725 UINT16 PortyId; 726 UINT16 LatencyOrBandwidth; 727 UINT16 Reserved; 728 729 } ACPI_CDAT_SSLBE; 730 731 #define ACPI_CDAT_SSLBIS_US_PORT 0x0100 732 #define ACPI_CDAT_SSLBIS_ANY_PORT 0xffff 733 734 /******************************************************************************* 735 * 736 * CEDT - CXL Early Discovery Table 737 * Version 1 738 * 739 * Conforms to the "CXL Early Discovery Table" (CXL 2.0, October 2020) 740 * 741 ******************************************************************************/ 742 743 typedef struct acpi_table_cedt 744 { 745 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 746 747 } ACPI_TABLE_CEDT; 748 749 /* CEDT subtable header (Performance Record Structure) */ 750 751 typedef struct acpi_cedt_header 752 { 753 UINT8 Type; 754 UINT8 Reserved; 755 UINT16 Length; 756 757 } ACPI_CEDT_HEADER; 758 759 /* Values for Type field above */ 760 761 enum AcpiCedtType 762 { 763 ACPI_CEDT_TYPE_CHBS = 0, 764 ACPI_CEDT_TYPE_CFMWS = 1, 765 ACPI_CEDT_TYPE_CXIMS = 2, 766 ACPI_CEDT_TYPE_RDPAS = 3, 767 ACPI_CEDT_TYPE_RESERVED = 4, 768 }; 769 770 /* Values for version field above */ 771 772 #define ACPI_CEDT_CHBS_VERSION_CXL11 (0) 773 #define ACPI_CEDT_CHBS_VERSION_CXL20 (1) 774 775 /* Values for length field above */ 776 777 #define ACPI_CEDT_CHBS_LENGTH_CXL11 (0x2000) 778 #define ACPI_CEDT_CHBS_LENGTH_CXL20 (0x10000) 779 780 /* 781 * CEDT subtables 782 */ 783 784 /* 0: CXL Host Bridge Structure */ 785 786 typedef struct acpi_cedt_chbs 787 { 788 ACPI_CEDT_HEADER Header; 789 UINT32 Uid; 790 UINT32 CxlVersion; 791 UINT32 Reserved; 792 UINT64 Base; 793 UINT64 Length; 794 795 } ACPI_CEDT_CHBS; 796 797 798 /* 1: CXL Fixed Memory Window Structure */ 799 800 typedef struct acpi_cedt_cfmws 801 { 802 ACPI_CEDT_HEADER Header; 803 UINT32 Reserved1; 804 UINT64 BaseHpa; 805 UINT64 WindowSize; 806 UINT8 InterleaveWays; 807 UINT8 InterleaveArithmetic; 808 UINT16 Reserved2; 809 UINT32 Granularity; 810 UINT16 Restrictions; 811 UINT16 QtgId; 812 UINT32 InterleaveTargets[]; 813 814 } ACPI_CEDT_CFMWS; 815 816 typedef struct acpi_cedt_cfmws_target_element 817 { 818 UINT32 InterleaveTarget; 819 820 } ACPI_CEDT_CFMWS_TARGET_ELEMENT; 821 822 /* Values for Interleave Arithmetic field above */ 823 824 #define ACPI_CEDT_CFMWS_ARITHMETIC_MODULO (0) 825 #define ACPI_CEDT_CFMWS_ARITHMETIC_XOR (1) 826 827 /* Values for Restrictions field above */ 828 829 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE2 (1) 830 #define ACPI_CEDT_CFMWS_RESTRICT_TYPE3 (1<<1) 831 #define ACPI_CEDT_CFMWS_RESTRICT_VOLATILE (1<<2) 832 #define ACPI_CEDT_CFMWS_RESTRICT_PMEM (1<<3) 833 #define ACPI_CEDT_CFMWS_RESTRICT_FIXED (1<<4) 834 835 /* 2: CXL XOR Interleave Math Structure */ 836 837 typedef struct acpi_cedt_cxims { 838 ACPI_CEDT_HEADER Header; 839 UINT16 Reserved1; 840 UINT8 Hbig; 841 UINT8 NrXormaps; 842 UINT64 XormapList[]; 843 } ACPI_CEDT_CXIMS; 844 845 typedef struct acpi_cedt_cxims_target_element 846 { 847 UINT64 Xormap; 848 849 } ACPI_CEDT_CXIMS_TARGET_ELEMENT; 850 851 852 /* 3: CXL RCEC Downstream Port Association Structure */ 853 854 struct acpi_cedt_rdpas { 855 ACPI_CEDT_HEADER Header; 856 UINT8 Reserved1; 857 UINT16 Length; 858 UINT16 Segment; 859 UINT16 Bdf; 860 UINT8 Protocol; 861 UINT64 Address; 862 }; 863 864 /* Masks for bdf field above */ 865 #define ACPI_CEDT_RDPAS_BUS_MASK 0xff00 866 #define ACPI_CEDT_RDPAS_DEVICE_MASK 0x00f8 867 #define ACPI_CEDT_RDPAS_FUNCTION_MASK 0x0007 868 869 #define ACPI_CEDT_RDPAS_PROTOCOL_IO (0) 870 #define ACPI_CEDT_RDPAS_PROTOCOL_CACHEMEM (1) 871 872 /******************************************************************************* 873 * 874 * CPEP - Corrected Platform Error Polling table (ACPI 4.0) 875 * Version 1 876 * 877 ******************************************************************************/ 878 879 typedef struct acpi_table_cpep 880 { 881 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 882 UINT64 Reserved; 883 884 } ACPI_TABLE_CPEP; 885 886 887 /* Subtable */ 888 889 typedef struct acpi_cpep_polling 890 { 891 ACPI_SUBTABLE_HEADER Header; 892 UINT8 Id; /* Processor ID */ 893 UINT8 Eid; /* Processor EID */ 894 UINT32 Interval; /* Polling interval (msec) */ 895 896 } ACPI_CPEP_POLLING; 897 898 899 /******************************************************************************* 900 * 901 * CSRT - Core System Resource Table 902 * Version 0 903 * 904 * Conforms to the "Core System Resource Table (CSRT)", November 14, 2011 905 * 906 ******************************************************************************/ 907 908 typedef struct acpi_table_csrt 909 { 910 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 911 912 } ACPI_TABLE_CSRT; 913 914 915 /* Resource Group subtable */ 916 917 typedef struct acpi_csrt_group 918 { 919 UINT32 Length; 920 UINT32 VendorId; 921 UINT32 SubvendorId; 922 UINT16 DeviceId; 923 UINT16 SubdeviceId; 924 UINT16 Revision; 925 UINT16 Reserved; 926 UINT32 SharedInfoLength; 927 928 /* Shared data immediately follows (Length = SharedInfoLength) */ 929 930 } ACPI_CSRT_GROUP; 931 932 /* Shared Info subtable */ 933 934 typedef struct acpi_csrt_shared_info 935 { 936 UINT16 MajorVersion; 937 UINT16 MinorVersion; 938 UINT32 MmioBaseLow; 939 UINT32 MmioBaseHigh; 940 UINT32 GsiInterrupt; 941 UINT8 InterruptPolarity; 942 UINT8 InterruptMode; 943 UINT8 NumChannels; 944 UINT8 DmaAddressWidth; 945 UINT16 BaseRequestLine; 946 UINT16 NumHandshakeSignals; 947 UINT32 MaxBlockSize; 948 949 /* Resource descriptors immediately follow (Length = Group Length - SharedInfoLength) */ 950 951 } ACPI_CSRT_SHARED_INFO; 952 953 /* Resource Descriptor subtable */ 954 955 typedef struct acpi_csrt_descriptor 956 { 957 UINT32 Length; 958 UINT16 Type; 959 UINT16 Subtype; 960 UINT32 Uid; 961 962 /* Resource-specific information immediately follows */ 963 964 } ACPI_CSRT_DESCRIPTOR; 965 966 967 /* Resource Types */ 968 969 #define ACPI_CSRT_TYPE_INTERRUPT 0x0001 970 #define ACPI_CSRT_TYPE_TIMER 0x0002 971 #define ACPI_CSRT_TYPE_DMA 0x0003 972 973 /* Resource Subtypes */ 974 975 #define ACPI_CSRT_XRUPT_LINE 0x0000 976 #define ACPI_CSRT_XRUPT_CONTROLLER 0x0001 977 #define ACPI_CSRT_TIMER 0x0000 978 #define ACPI_CSRT_DMA_CHANNEL 0x0000 979 #define ACPI_CSRT_DMA_CONTROLLER 0x0001 980 981 982 /******************************************************************************* 983 * 984 * DBG2 - Debug Port Table 2 985 * Version 0 (Both main table and subtables) 986 * 987 * Conforms to "Microsoft Debug Port Table 2 (DBG2)", September 21, 2020 988 * 989 ******************************************************************************/ 990 991 typedef struct acpi_table_dbg2 992 { 993 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 994 UINT32 InfoOffset; 995 UINT32 InfoCount; 996 997 } ACPI_TABLE_DBG2; 998 999 1000 typedef struct acpi_dbg2_header 1001 { 1002 UINT32 InfoOffset; 1003 UINT32 InfoCount; 1004 1005 } ACPI_DBG2_HEADER; 1006 1007 1008 /* Debug Device Information Subtable */ 1009 1010 typedef struct acpi_dbg2_device 1011 { 1012 UINT8 Revision; 1013 UINT16 Length; 1014 UINT8 RegisterCount; /* Number of BaseAddress registers */ 1015 UINT16 NamepathLength; 1016 UINT16 NamepathOffset; 1017 UINT16 OemDataLength; 1018 UINT16 OemDataOffset; 1019 UINT16 PortType; 1020 UINT16 PortSubtype; 1021 UINT16 Reserved; 1022 UINT16 BaseAddressOffset; 1023 UINT16 AddressSizeOffset; 1024 /* 1025 * Data that follows: 1026 * BaseAddress (required) - Each in 12-byte Generic Address Structure format. 1027 * AddressSize (required) - Array of UINT32 sizes corresponding to each BaseAddress register. 1028 * Namepath (required) - Null terminated string. Single dot if not supported. 1029 * OemData (optional) - Length is OemDataLength. 1030 */ 1031 } ACPI_DBG2_DEVICE; 1032 1033 /* Types for PortType field above */ 1034 1035 #define ACPI_DBG2_SERIAL_PORT 0x8000 1036 #define ACPI_DBG2_1394_PORT 0x8001 1037 #define ACPI_DBG2_USB_PORT 0x8002 1038 #define ACPI_DBG2_NET_PORT 0x8003 1039 1040 /* Subtypes for PortSubtype field above */ 1041 1042 #define ACPI_DBG2_16550_COMPATIBLE 0x0000 1043 #define ACPI_DBG2_16550_SUBSET 0x0001 1044 #define ACPI_DBG2_MAX311XE_SPI 0x0002 1045 #define ACPI_DBG2_ARM_PL011 0x0003 1046 #define ACPI_DBG2_MSM8X60 0x0004 1047 #define ACPI_DBG2_16550_NVIDIA 0x0005 1048 #define ACPI_DBG2_TI_OMAP 0x0006 1049 #define ACPI_DBG2_APM88XXXX 0x0008 1050 #define ACPI_DBG2_MSM8974 0x0009 1051 #define ACPI_DBG2_SAM5250 0x000A 1052 #define ACPI_DBG2_INTEL_USIF 0x000B 1053 #define ACPI_DBG2_IMX6 0x000C 1054 #define ACPI_DBG2_ARM_SBSA_32BIT 0x000D 1055 #define ACPI_DBG2_ARM_SBSA_GENERIC 0x000E 1056 #define ACPI_DBG2_ARM_DCC 0x000F 1057 #define ACPI_DBG2_BCM2835 0x0010 1058 #define ACPI_DBG2_SDM845_1_8432MHZ 0x0011 1059 #define ACPI_DBG2_16550_WITH_GAS 0x0012 1060 #define ACPI_DBG2_SDM845_7_372MHZ 0x0013 1061 #define ACPI_DBG2_INTEL_LPSS 0x0014 1062 1063 #define ACPI_DBG2_1394_STANDARD 0x0000 1064 1065 #define ACPI_DBG2_USB_XHCI 0x0000 1066 #define ACPI_DBG2_USB_EHCI 0x0001 1067 1068 1069 /******************************************************************************* 1070 * 1071 * DBGP - Debug Port table 1072 * Version 1 1073 * 1074 * Conforms to the "Debug Port Specification", Version 1.00, 2/9/2000 1075 * 1076 ******************************************************************************/ 1077 1078 typedef struct acpi_table_dbgp 1079 { 1080 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1081 UINT8 Type; /* 0=full 16550, 1=subset of 16550 */ 1082 UINT8 Reserved[3]; 1083 ACPI_GENERIC_ADDRESS DebugPort; 1084 1085 } ACPI_TABLE_DBGP; 1086 1087 1088 /******************************************************************************* 1089 * 1090 * DMAR - DMA Remapping table 1091 * Version 1 1092 * 1093 * Conforms to "Intel Virtualization Technology for Directed I/O", 1094 * Version 2.3, October 2014 1095 * 1096 ******************************************************************************/ 1097 1098 typedef struct acpi_table_dmar 1099 { 1100 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1101 UINT8 Width; /* Host Address Width */ 1102 UINT8 Flags; 1103 UINT8 Reserved[10]; 1104 1105 } ACPI_TABLE_DMAR; 1106 1107 /* Masks for Flags field above */ 1108 1109 #define ACPI_DMAR_INTR_REMAP (1) 1110 #define ACPI_DMAR_X2APIC_OPT_OUT (1<<1) 1111 #define ACPI_DMAR_X2APIC_MODE (1<<2) 1112 1113 1114 /* DMAR subtable header */ 1115 1116 typedef struct acpi_dmar_header 1117 { 1118 UINT16 Type; 1119 UINT16 Length; 1120 1121 } ACPI_DMAR_HEADER; 1122 1123 /* Values for subtable type in ACPI_DMAR_HEADER */ 1124 1125 enum AcpiDmarType 1126 { 1127 ACPI_DMAR_TYPE_HARDWARE_UNIT = 0, 1128 ACPI_DMAR_TYPE_RESERVED_MEMORY = 1, 1129 ACPI_DMAR_TYPE_ROOT_ATS = 2, 1130 ACPI_DMAR_TYPE_HARDWARE_AFFINITY = 3, 1131 ACPI_DMAR_TYPE_NAMESPACE = 4, 1132 ACPI_DMAR_TYPE_SATC = 5, 1133 ACPI_DMAR_TYPE_SIDP = 6, 1134 ACPI_DMAR_TYPE_RESERVED = 7 /* 7 and greater are reserved */ 1135 }; 1136 1137 1138 /* DMAR Device Scope structure */ 1139 1140 typedef struct acpi_dmar_device_scope 1141 { 1142 UINT8 EntryType; 1143 UINT8 Length; 1144 UINT8 Flags; 1145 UINT8 Reserved; 1146 UINT8 EnumerationId; 1147 UINT8 Bus; 1148 1149 } ACPI_DMAR_DEVICE_SCOPE; 1150 1151 /* Values for EntryType in ACPI_DMAR_DEVICE_SCOPE - device types */ 1152 1153 enum AcpiDmarScopeType 1154 { 1155 ACPI_DMAR_SCOPE_TYPE_NOT_USED = 0, 1156 ACPI_DMAR_SCOPE_TYPE_ENDPOINT = 1, 1157 ACPI_DMAR_SCOPE_TYPE_BRIDGE = 2, 1158 ACPI_DMAR_SCOPE_TYPE_IOAPIC = 3, 1159 ACPI_DMAR_SCOPE_TYPE_HPET = 4, 1160 ACPI_DMAR_SCOPE_TYPE_NAMESPACE = 5, 1161 ACPI_DMAR_SCOPE_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 1162 }; 1163 1164 typedef struct acpi_dmar_pci_path 1165 { 1166 UINT8 Device; 1167 UINT8 Function; 1168 1169 } ACPI_DMAR_PCI_PATH; 1170 1171 1172 /* 1173 * DMAR Subtables, correspond to Type in ACPI_DMAR_HEADER 1174 */ 1175 1176 /* 0: Hardware Unit Definition */ 1177 1178 typedef struct acpi_dmar_hardware_unit 1179 { 1180 ACPI_DMAR_HEADER Header; 1181 UINT8 Flags; 1182 UINT8 Size; 1183 UINT16 Segment; 1184 UINT64 Address; /* Register Base Address */ 1185 1186 } ACPI_DMAR_HARDWARE_UNIT; 1187 1188 /* Masks for Flags field above */ 1189 1190 #define ACPI_DMAR_INCLUDE_ALL (1) 1191 1192 1193 /* 1: Reserved Memory Definition */ 1194 1195 typedef struct acpi_dmar_reserved_memory 1196 { 1197 ACPI_DMAR_HEADER Header; 1198 UINT16 Reserved; 1199 UINT16 Segment; 1200 UINT64 BaseAddress; /* 4K aligned base address */ 1201 UINT64 EndAddress; /* 4K aligned limit address */ 1202 1203 } ACPI_DMAR_RESERVED_MEMORY; 1204 1205 /* Masks for Flags field above */ 1206 1207 #define ACPI_DMAR_ALLOW_ALL (1) 1208 1209 1210 /* 2: Root Port ATS Capability Reporting Structure */ 1211 1212 typedef struct acpi_dmar_atsr 1213 { 1214 ACPI_DMAR_HEADER Header; 1215 UINT8 Flags; 1216 UINT8 Reserved; 1217 UINT16 Segment; 1218 1219 } ACPI_DMAR_ATSR; 1220 1221 /* Masks for Flags field above */ 1222 1223 #define ACPI_DMAR_ALL_PORTS (1) 1224 1225 1226 /* 3: Remapping Hardware Static Affinity Structure */ 1227 1228 typedef struct acpi_dmar_rhsa 1229 { 1230 ACPI_DMAR_HEADER Header; 1231 UINT32 Reserved; 1232 UINT64 BaseAddress; 1233 UINT32 ProximityDomain; 1234 1235 } ACPI_DMAR_RHSA; 1236 1237 1238 /* 4: ACPI Namespace Device Declaration Structure */ 1239 1240 typedef struct acpi_dmar_andd 1241 { 1242 ACPI_DMAR_HEADER Header; 1243 UINT8 Reserved[3]; 1244 UINT8 DeviceNumber; 1245 union { 1246 char __pad; 1247 ACPI_FLEX_ARRAY(char, DeviceName); 1248 }; 1249 1250 } ACPI_DMAR_ANDD; 1251 1252 1253 /* 5: SoC Integrated Address Translation Cache (SATC) */ 1254 1255 typedef struct acpi_dmar_satc 1256 { 1257 ACPI_DMAR_HEADER Header; 1258 UINT8 Flags; 1259 UINT8 Reserved; 1260 UINT16 Segment; 1261 1262 } ACPI_DMAR_SATC; 1263 1264 1265 /* 6: SoC Integrated Device Property Reporting Structure */ 1266 1267 typedef struct acpi_dmar_sidp 1268 { 1269 ACPI_DMAR_HEADER Header; 1270 UINT16 Reserved; 1271 UINT16 Segment; 1272 1273 } ACPI_DMAR_SIDP; 1274 1275 1276 /******************************************************************************* 1277 * 1278 * DRTM - Dynamic Root of Trust for Measurement table 1279 * Conforms to "TCG D-RTM Architecture" June 17 2013, Version 1.0.0 1280 * Table version 1 1281 * 1282 ******************************************************************************/ 1283 1284 typedef struct acpi_table_drtm 1285 { 1286 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1287 UINT64 EntryBaseAddress; 1288 UINT64 EntryLength; 1289 UINT32 EntryAddress32; 1290 UINT64 EntryAddress64; 1291 UINT64 ExitAddress; 1292 UINT64 LogAreaAddress; 1293 UINT32 LogAreaLength; 1294 UINT64 ArchDependentAddress; 1295 UINT32 Flags; 1296 1297 } ACPI_TABLE_DRTM; 1298 1299 /* Flag Definitions for above */ 1300 1301 #define ACPI_DRTM_ACCESS_ALLOWED (1) 1302 #define ACPI_DRTM_ENABLE_GAP_CODE (1<<1) 1303 #define ACPI_DRTM_INCOMPLETE_MEASUREMENTS (1<<2) 1304 #define ACPI_DRTM_AUTHORITY_ORDER (1<<3) 1305 1306 1307 /* 1) Validated Tables List (64-bit addresses) */ 1308 1309 typedef struct acpi_drtm_vtable_list 1310 { 1311 UINT32 ValidatedTableCount; 1312 UINT64 ValidatedTables[]; 1313 1314 } ACPI_DRTM_VTABLE_LIST; 1315 1316 /* 2) Resources List (of Resource Descriptors) */ 1317 1318 /* Resource Descriptor */ 1319 1320 typedef struct acpi_drtm_resource 1321 { 1322 UINT8 Size[7]; 1323 UINT8 Type; 1324 UINT64 Address; 1325 1326 } ACPI_DRTM_RESOURCE; 1327 1328 typedef struct acpi_drtm_resource_list 1329 { 1330 UINT32 ResourceCount; 1331 ACPI_DRTM_RESOURCE Resources[]; 1332 1333 } ACPI_DRTM_RESOURCE_LIST; 1334 1335 /* 3) Platform-specific Identifiers List */ 1336 1337 typedef struct acpi_drtm_dps_id 1338 { 1339 UINT32 DpsIdLength; 1340 UINT8 DpsId[16]; 1341 1342 } ACPI_DRTM_DPS_ID; 1343 1344 1345 /******************************************************************************* 1346 * 1347 * ECDT - Embedded Controller Boot Resources Table 1348 * Version 1 1349 * 1350 ******************************************************************************/ 1351 1352 typedef struct acpi_table_ecdt 1353 { 1354 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1355 ACPI_GENERIC_ADDRESS Control; /* Address of EC command/status register */ 1356 ACPI_GENERIC_ADDRESS Data; /* Address of EC data register */ 1357 UINT32 Uid; /* Unique ID - must be same as the EC _UID method */ 1358 UINT8 Gpe; /* The GPE for the EC */ 1359 UINT8 Id[]; /* Full namepath of the EC in the ACPI namespace */ 1360 1361 } ACPI_TABLE_ECDT; 1362 1363 1364 /******************************************************************************* 1365 * 1366 * EINJ - Error Injection Table (ACPI 4.0) 1367 * Version 1 1368 * 1369 ******************************************************************************/ 1370 1371 typedef struct acpi_table_einj 1372 { 1373 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1374 UINT32 HeaderLength; 1375 UINT8 Flags; 1376 UINT8 Reserved[3]; 1377 UINT32 Entries; 1378 1379 } ACPI_TABLE_EINJ; 1380 1381 1382 /* EINJ Injection Instruction Entries (actions) */ 1383 1384 typedef struct acpi_einj_entry 1385 { 1386 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */ 1387 1388 } ACPI_EINJ_ENTRY; 1389 1390 /* Masks for Flags field above */ 1391 1392 #define ACPI_EINJ_PRESERVE (1) 1393 1394 /* Values for Action field above */ 1395 1396 enum AcpiEinjActions 1397 { 1398 ACPI_EINJ_BEGIN_OPERATION = 0x0, 1399 ACPI_EINJ_GET_TRIGGER_TABLE = 0x1, 1400 ACPI_EINJ_SET_ERROR_TYPE = 0x2, 1401 ACPI_EINJ_GET_ERROR_TYPE = 0x3, 1402 ACPI_EINJ_END_OPERATION = 0x4, 1403 ACPI_EINJ_EXECUTE_OPERATION = 0x5, 1404 ACPI_EINJ_CHECK_BUSY_STATUS = 0x6, 1405 ACPI_EINJ_GET_COMMAND_STATUS = 0x7, 1406 ACPI_EINJ_SET_ERROR_TYPE_WITH_ADDRESS = 0x8, 1407 ACPI_EINJ_GET_EXECUTE_TIMINGS = 0x9, 1408 ACPI_EINJV2_GET_ERROR_TYPE = 0x11, 1409 ACPI_EINJ_ACTION_RESERVED = 0x12, /* 0x12 and greater are reserved */ 1410 ACPI_EINJ_TRIGGER_ERROR = 0xFF /* Except for this value */ 1411 }; 1412 1413 /* Values for Instruction field above */ 1414 1415 enum AcpiEinjInstructions 1416 { 1417 ACPI_EINJ_READ_REGISTER = 0, 1418 ACPI_EINJ_READ_REGISTER_VALUE = 1, 1419 ACPI_EINJ_WRITE_REGISTER = 2, 1420 ACPI_EINJ_WRITE_REGISTER_VALUE = 3, 1421 ACPI_EINJ_NOOP = 4, 1422 ACPI_EINJ_FLUSH_CACHELINE = 5, 1423 ACPI_EINJ_INSTRUCTION_RESERVED = 6 /* 6 and greater are reserved */ 1424 }; 1425 1426 typedef struct acpi_einj_error_type_with_addr 1427 { 1428 UINT32 ErrorType; 1429 UINT32 VendorStructOffset; 1430 UINT32 Flags; 1431 UINT32 ApicId; 1432 UINT64 Address; 1433 UINT64 Range; 1434 UINT32 PcieId; 1435 1436 } ACPI_EINJ_ERROR_TYPE_WITH_ADDR; 1437 1438 typedef struct acpi_einj_vendor 1439 { 1440 UINT32 Length; 1441 UINT32 PcieId; 1442 UINT16 VendorId; 1443 UINT16 DeviceId; 1444 UINT8 RevisionId; 1445 UINT8 Reserved[3]; 1446 1447 } ACPI_EINJ_VENDOR; 1448 1449 1450 /* EINJ Trigger Error Action Table */ 1451 1452 typedef struct acpi_einj_trigger 1453 { 1454 UINT32 HeaderSize; 1455 UINT32 Revision; 1456 UINT32 TableSize; 1457 UINT32 EntryCount; 1458 1459 } ACPI_EINJ_TRIGGER; 1460 1461 /* Command status return values */ 1462 1463 enum AcpiEinjCommandStatus 1464 { 1465 ACPI_EINJ_SUCCESS = 0, 1466 ACPI_EINJ_FAILURE = 1, 1467 ACPI_EINJ_INVALID_ACCESS = 2, 1468 ACPI_EINJ_STATUS_RESERVED = 3 /* 3 and greater are reserved */ 1469 }; 1470 1471 1472 /* Error types returned from ACPI_EINJ_GET_ERROR_TYPE (bitfield) */ 1473 1474 #define ACPI_EINJ_PROCESSOR_CORRECTABLE (1) 1475 #define ACPI_EINJ_PROCESSOR_UNCORRECTABLE (1<<1) 1476 #define ACPI_EINJ_PROCESSOR_FATAL (1<<2) 1477 #define ACPI_EINJ_MEMORY_CORRECTABLE (1<<3) 1478 #define ACPI_EINJ_MEMORY_UNCORRECTABLE (1<<4) 1479 #define ACPI_EINJ_MEMORY_FATAL (1<<5) 1480 #define ACPI_EINJ_PCIX_CORRECTABLE (1<<6) 1481 #define ACPI_EINJ_PCIX_UNCORRECTABLE (1<<7) 1482 #define ACPI_EINJ_PCIX_FATAL (1<<8) 1483 #define ACPI_EINJ_PLATFORM_CORRECTABLE (1<<9) 1484 #define ACPI_EINJ_PLATFORM_UNCORRECTABLE (1<<10) 1485 #define ACPI_EINJ_PLATFORM_FATAL (1<<11) 1486 #define ACPI_EINJ_CXL_CACHE_CORRECTABLE (1<<12) 1487 #define ACPI_EINJ_CXL_CACHE_UNCORRECTABLE (1<<13) 1488 #define ACPI_EINJ_CXL_CACHE_FATAL (1<<14) 1489 #define ACPI_EINJ_CXL_MEM_CORRECTABLE (1<<15) 1490 #define ACPI_EINJ_CXL_MEM_UNCORRECTABLE (1<<16) 1491 #define ACPI_EINJ_CXL_MEM_FATAL (1<<17) 1492 #define ACPI_EINJ_VENDOR_DEFINED (1<<31) 1493 1494 1495 /******************************************************************************* 1496 * 1497 * ERST - Error Record Serialization Table (ACPI 4.0) 1498 * Version 1 1499 * 1500 ******************************************************************************/ 1501 1502 typedef struct acpi_table_erst 1503 { 1504 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1505 UINT32 HeaderLength; 1506 UINT32 Reserved; 1507 UINT32 Entries; 1508 1509 } ACPI_TABLE_ERST; 1510 1511 1512 /* ERST Serialization Entries (actions) */ 1513 1514 typedef struct acpi_erst_entry 1515 { 1516 ACPI_WHEA_HEADER WheaHeader; /* Common header for WHEA tables */ 1517 1518 } ACPI_ERST_ENTRY; 1519 1520 /* Masks for Flags field above */ 1521 1522 #define ACPI_ERST_PRESERVE (1) 1523 1524 /* Values for Action field above */ 1525 1526 enum AcpiErstActions 1527 { 1528 ACPI_ERST_BEGIN_WRITE = 0, 1529 ACPI_ERST_BEGIN_READ = 1, 1530 ACPI_ERST_BEGIN_CLEAR = 2, 1531 ACPI_ERST_END = 3, 1532 ACPI_ERST_SET_RECORD_OFFSET = 4, 1533 ACPI_ERST_EXECUTE_OPERATION = 5, 1534 ACPI_ERST_CHECK_BUSY_STATUS = 6, 1535 ACPI_ERST_GET_COMMAND_STATUS = 7, 1536 ACPI_ERST_GET_RECORD_ID = 8, 1537 ACPI_ERST_SET_RECORD_ID = 9, 1538 ACPI_ERST_GET_RECORD_COUNT = 10, 1539 ACPI_ERST_BEGIN_DUMMY_WRIITE = 11, 1540 ACPI_ERST_NOT_USED = 12, 1541 ACPI_ERST_GET_ERROR_RANGE = 13, 1542 ACPI_ERST_GET_ERROR_LENGTH = 14, 1543 ACPI_ERST_GET_ERROR_ATTRIBUTES = 15, 1544 ACPI_ERST_EXECUTE_TIMINGS = 16, 1545 ACPI_ERST_ACTION_RESERVED = 17 /* 17 and greater are reserved */ 1546 }; 1547 1548 /* Values for Instruction field above */ 1549 1550 enum AcpiErstInstructions 1551 { 1552 ACPI_ERST_READ_REGISTER = 0, 1553 ACPI_ERST_READ_REGISTER_VALUE = 1, 1554 ACPI_ERST_WRITE_REGISTER = 2, 1555 ACPI_ERST_WRITE_REGISTER_VALUE = 3, 1556 ACPI_ERST_NOOP = 4, 1557 ACPI_ERST_LOAD_VAR1 = 5, 1558 ACPI_ERST_LOAD_VAR2 = 6, 1559 ACPI_ERST_STORE_VAR1 = 7, 1560 ACPI_ERST_ADD = 8, 1561 ACPI_ERST_SUBTRACT = 9, 1562 ACPI_ERST_ADD_VALUE = 10, 1563 ACPI_ERST_SUBTRACT_VALUE = 11, 1564 ACPI_ERST_STALL = 12, 1565 ACPI_ERST_STALL_WHILE_TRUE = 13, 1566 ACPI_ERST_SKIP_NEXT_IF_TRUE = 14, 1567 ACPI_ERST_GOTO = 15, 1568 ACPI_ERST_SET_SRC_ADDRESS_BASE = 16, 1569 ACPI_ERST_SET_DST_ADDRESS_BASE = 17, 1570 ACPI_ERST_MOVE_DATA = 18, 1571 ACPI_ERST_INSTRUCTION_RESERVED = 19 /* 19 and greater are reserved */ 1572 }; 1573 1574 /* Command status return values */ 1575 1576 enum AcpiErstCommandStatus 1577 { 1578 ACPI_ERST_SUCCESS = 0, 1579 ACPI_ERST_NO_SPACE = 1, 1580 ACPI_ERST_NOT_AVAILABLE = 2, 1581 ACPI_ERST_FAILURE = 3, 1582 ACPI_ERST_RECORD_EMPTY = 4, 1583 ACPI_ERST_NOT_FOUND = 5, 1584 ACPI_ERST_STATUS_RESERVED = 6 /* 6 and greater are reserved */ 1585 }; 1586 1587 1588 /* Error Record Serialization Information */ 1589 1590 typedef struct acpi_erst_info 1591 { 1592 UINT16 Signature; /* Should be "ER" */ 1593 UINT8 Data[48]; 1594 1595 } ACPI_ERST_INFO; 1596 1597 1598 /******************************************************************************* 1599 * 1600 * FPDT - Firmware Performance Data Table (ACPI 5.0) 1601 * Version 1 1602 * 1603 ******************************************************************************/ 1604 1605 typedef struct acpi_table_fpdt 1606 { 1607 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1608 1609 } ACPI_TABLE_FPDT; 1610 1611 1612 /* FPDT subtable header (Performance Record Structure) */ 1613 1614 typedef struct acpi_fpdt_header 1615 { 1616 UINT16 Type; 1617 UINT8 Length; 1618 UINT8 Revision; 1619 1620 } ACPI_FPDT_HEADER; 1621 1622 /* Values for Type field above */ 1623 1624 enum AcpiFpdtType 1625 { 1626 ACPI_FPDT_TYPE_BOOT = 0, 1627 ACPI_FPDT_TYPE_S3PERF = 1 1628 }; 1629 1630 1631 /* 1632 * FPDT subtables 1633 */ 1634 1635 /* 0: Firmware Basic Boot Performance Record */ 1636 1637 typedef struct acpi_fpdt_boot_pointer 1638 { 1639 ACPI_FPDT_HEADER Header; 1640 UINT8 Reserved[4]; 1641 UINT64 Address; 1642 1643 } ACPI_FPDT_BOOT_POINTER; 1644 1645 1646 /* 1: S3 Performance Table Pointer Record */ 1647 1648 typedef struct acpi_fpdt_s3pt_pointer 1649 { 1650 ACPI_FPDT_HEADER Header; 1651 UINT8 Reserved[4]; 1652 UINT64 Address; 1653 1654 } ACPI_FPDT_S3PT_POINTER; 1655 1656 1657 /* 1658 * S3PT - S3 Performance Table. This table is pointed to by the 1659 * S3 Pointer Record above. 1660 */ 1661 typedef struct acpi_table_s3pt 1662 { 1663 UINT8 Signature[4]; /* "S3PT" */ 1664 UINT32 Length; 1665 1666 } ACPI_TABLE_S3PT; 1667 1668 1669 /* 1670 * S3PT Subtables (Not part of the actual FPDT) 1671 */ 1672 1673 /* Values for Type field in S3PT header */ 1674 1675 enum AcpiS3ptType 1676 { 1677 ACPI_S3PT_TYPE_RESUME = 0, 1678 ACPI_S3PT_TYPE_SUSPEND = 1, 1679 ACPI_FPDT_BOOT_PERFORMANCE = 2 1680 }; 1681 1682 typedef struct acpi_s3pt_resume 1683 { 1684 ACPI_FPDT_HEADER Header; 1685 UINT32 ResumeCount; 1686 UINT64 FullResume; 1687 UINT64 AverageResume; 1688 1689 } ACPI_S3PT_RESUME; 1690 1691 typedef struct acpi_s3pt_suspend 1692 { 1693 ACPI_FPDT_HEADER Header; 1694 UINT64 SuspendStart; 1695 UINT64 SuspendEnd; 1696 1697 } ACPI_S3PT_SUSPEND; 1698 1699 1700 /* 1701 * FPDT Boot Performance Record (Not part of the actual FPDT) 1702 */ 1703 typedef struct acpi_fpdt_boot 1704 { 1705 ACPI_FPDT_HEADER Header; 1706 UINT8 Reserved[4]; 1707 UINT64 ResetEnd; 1708 UINT64 LoadStart; 1709 UINT64 StartupStart; 1710 UINT64 ExitServicesEntry; 1711 UINT64 ExitServicesExit; 1712 1713 } ACPI_FPDT_BOOT; 1714 1715 1716 /******************************************************************************* 1717 * 1718 * GTDT - Generic Timer Description Table (ACPI 5.1) 1719 * Version 2 1720 * 1721 ******************************************************************************/ 1722 1723 typedef struct acpi_table_gtdt 1724 { 1725 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1726 UINT64 CounterBlockAddresss; 1727 UINT32 Reserved; 1728 UINT32 SecureEl1Interrupt; 1729 UINT32 SecureEl1Flags; 1730 UINT32 NonSecureEl1Interrupt; 1731 UINT32 NonSecureEl1Flags; 1732 UINT32 VirtualTimerInterrupt; 1733 UINT32 VirtualTimerFlags; 1734 UINT32 NonSecureEl2Interrupt; 1735 UINT32 NonSecureEl2Flags; 1736 UINT64 CounterReadBlockAddress; 1737 UINT32 PlatformTimerCount; 1738 UINT32 PlatformTimerOffset; 1739 1740 } ACPI_TABLE_GTDT; 1741 1742 /* Flag Definitions: Timer Block Physical Timers and Virtual timers */ 1743 1744 #define ACPI_GTDT_INTERRUPT_MODE (1) 1745 #define ACPI_GTDT_INTERRUPT_POLARITY (1<<1) 1746 #define ACPI_GTDT_ALWAYS_ON (1<<2) 1747 1748 typedef struct acpi_gtdt_el2 1749 { 1750 UINT32 VirtualEL2TimerGsiv; 1751 UINT32 VirtualEL2TimerFlags; 1752 } ACPI_GTDT_EL2; 1753 1754 1755 /* Common GTDT subtable header */ 1756 1757 typedef struct acpi_gtdt_header 1758 { 1759 UINT8 Type; 1760 UINT16 Length; 1761 1762 } ACPI_GTDT_HEADER; 1763 1764 /* Values for GTDT subtable type above */ 1765 1766 enum AcpiGtdtType 1767 { 1768 ACPI_GTDT_TYPE_TIMER_BLOCK = 0, 1769 ACPI_GTDT_TYPE_WATCHDOG = 1, 1770 ACPI_GTDT_TYPE_RESERVED = 2 /* 2 and greater are reserved */ 1771 }; 1772 1773 1774 /* GTDT Subtables, correspond to Type in acpi_gtdt_header */ 1775 1776 /* 0: Generic Timer Block */ 1777 1778 typedef struct acpi_gtdt_timer_block 1779 { 1780 ACPI_GTDT_HEADER Header; 1781 UINT8 Reserved; 1782 UINT64 BlockAddress; 1783 UINT32 TimerCount; 1784 UINT32 TimerOffset; 1785 1786 } ACPI_GTDT_TIMER_BLOCK; 1787 1788 /* Timer Sub-Structure, one per timer */ 1789 1790 typedef struct acpi_gtdt_timer_entry 1791 { 1792 UINT8 FrameNumber; 1793 UINT8 Reserved[3]; 1794 UINT64 BaseAddress; 1795 UINT64 El0BaseAddress; 1796 UINT32 TimerInterrupt; 1797 UINT32 TimerFlags; 1798 UINT32 VirtualTimerInterrupt; 1799 UINT32 VirtualTimerFlags; 1800 UINT32 CommonFlags; 1801 1802 } ACPI_GTDT_TIMER_ENTRY; 1803 1804 /* Flag Definitions: TimerFlags and VirtualTimerFlags above */ 1805 1806 #define ACPI_GTDT_GT_IRQ_MODE (1) 1807 #define ACPI_GTDT_GT_IRQ_POLARITY (1<<1) 1808 1809 /* Flag Definitions: CommonFlags above */ 1810 1811 #define ACPI_GTDT_GT_IS_SECURE_TIMER (1) 1812 #define ACPI_GTDT_GT_ALWAYS_ON (1<<1) 1813 1814 1815 /* 1: SBSA Generic Watchdog Structure */ 1816 1817 typedef struct acpi_gtdt_watchdog 1818 { 1819 ACPI_GTDT_HEADER Header; 1820 UINT8 Reserved; 1821 UINT64 RefreshFrameAddress; 1822 UINT64 ControlFrameAddress; 1823 UINT32 TimerInterrupt; 1824 UINT32 TimerFlags; 1825 1826 } ACPI_GTDT_WATCHDOG; 1827 1828 /* Flag Definitions: TimerFlags above */ 1829 1830 #define ACPI_GTDT_WATCHDOG_IRQ_MODE (1) 1831 #define ACPI_GTDT_WATCHDOG_IRQ_POLARITY (1<<1) 1832 #define ACPI_GTDT_WATCHDOG_SECURE (1<<2) 1833 1834 1835 /******************************************************************************* 1836 * 1837 * HEST - Hardware Error Source Table (ACPI 4.0) 1838 * Version 1 1839 * 1840 ******************************************************************************/ 1841 1842 typedef struct acpi_table_hest 1843 { 1844 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 1845 UINT32 ErrorSourceCount; 1846 1847 } ACPI_TABLE_HEST; 1848 1849 1850 /* HEST subtable header */ 1851 1852 typedef struct acpi_hest_header 1853 { 1854 UINT16 Type; 1855 UINT16 SourceId; 1856 1857 } ACPI_HEST_HEADER; 1858 1859 1860 /* Values for Type field above for subtables */ 1861 1862 enum AcpiHestTypes 1863 { 1864 ACPI_HEST_TYPE_IA32_CHECK = 0, 1865 ACPI_HEST_TYPE_IA32_CORRECTED_CHECK = 1, 1866 ACPI_HEST_TYPE_IA32_NMI = 2, 1867 ACPI_HEST_TYPE_NOT_USED3 = 3, 1868 ACPI_HEST_TYPE_NOT_USED4 = 4, 1869 ACPI_HEST_TYPE_NOT_USED5 = 5, 1870 ACPI_HEST_TYPE_AER_ROOT_PORT = 6, 1871 ACPI_HEST_TYPE_AER_ENDPOINT = 7, 1872 ACPI_HEST_TYPE_AER_BRIDGE = 8, 1873 ACPI_HEST_TYPE_GENERIC_ERROR = 9, 1874 ACPI_HEST_TYPE_GENERIC_ERROR_V2 = 10, 1875 ACPI_HEST_TYPE_IA32_DEFERRED_CHECK = 11, 1876 ACPI_HEST_TYPE_RESERVED = 12 /* 12 and greater are reserved */ 1877 }; 1878 1879 1880 /* 1881 * HEST substructures contained in subtables 1882 */ 1883 1884 /* 1885 * IA32 Error Bank(s) - Follows the ACPI_HEST_IA_MACHINE_CHECK and 1886 * ACPI_HEST_IA_CORRECTED structures. 1887 */ 1888 typedef struct acpi_hest_ia_error_bank 1889 { 1890 UINT8 BankNumber; 1891 UINT8 ClearStatusOnInit; 1892 UINT8 StatusFormat; 1893 UINT8 Reserved; 1894 UINT32 ControlRegister; 1895 UINT64 ControlData; 1896 UINT32 StatusRegister; 1897 UINT32 AddressRegister; 1898 UINT32 MiscRegister; 1899 1900 } ACPI_HEST_IA_ERROR_BANK; 1901 1902 1903 /* Common HEST sub-structure for PCI/AER structures below (6,7,8) */ 1904 1905 typedef struct acpi_hest_aer_common 1906 { 1907 UINT16 Reserved1; 1908 UINT8 Flags; 1909 UINT8 Enabled; 1910 UINT32 RecordsToPreallocate; 1911 UINT32 MaxSectionsPerRecord; 1912 UINT32 Bus; /* Bus and Segment numbers */ 1913 UINT16 Device; 1914 UINT16 Function; 1915 UINT16 DeviceControl; 1916 UINT16 Reserved2; 1917 UINT32 UncorrectableMask; 1918 UINT32 UncorrectableSeverity; 1919 UINT32 CorrectableMask; 1920 UINT32 AdvancedCapabilities; 1921 1922 } ACPI_HEST_AER_COMMON; 1923 1924 /* Masks for HEST Flags fields */ 1925 1926 #define ACPI_HEST_FIRMWARE_FIRST (1) 1927 #define ACPI_HEST_GLOBAL (1<<1) 1928 #define ACPI_HEST_GHES_ASSIST (1<<2) 1929 1930 /* 1931 * Macros to access the bus/segment numbers in Bus field above: 1932 * Bus number is encoded in bits 7:0 1933 * Segment number is encoded in bits 23:8 1934 */ 1935 #define ACPI_HEST_BUS(Bus) ((Bus) & 0xFF) 1936 #define ACPI_HEST_SEGMENT(Bus) (((Bus) >> 8) & 0xFFFF) 1937 1938 1939 /* Hardware Error Notification */ 1940 1941 typedef struct acpi_hest_notify 1942 { 1943 UINT8 Type; 1944 UINT8 Length; 1945 UINT16 ConfigWriteEnable; 1946 UINT32 PollInterval; 1947 UINT32 Vector; 1948 UINT32 PollingThresholdValue; 1949 UINT32 PollingThresholdWindow; 1950 UINT32 ErrorThresholdValue; 1951 UINT32 ErrorThresholdWindow; 1952 1953 } ACPI_HEST_NOTIFY; 1954 1955 /* Values for Notify Type field above */ 1956 1957 enum AcpiHestNotifyTypes 1958 { 1959 ACPI_HEST_NOTIFY_POLLED = 0, 1960 ACPI_HEST_NOTIFY_EXTERNAL = 1, 1961 ACPI_HEST_NOTIFY_LOCAL = 2, 1962 ACPI_HEST_NOTIFY_SCI = 3, 1963 ACPI_HEST_NOTIFY_NMI = 4, 1964 ACPI_HEST_NOTIFY_CMCI = 5, /* ACPI 5.0 */ 1965 ACPI_HEST_NOTIFY_MCE = 6, /* ACPI 5.0 */ 1966 ACPI_HEST_NOTIFY_GPIO = 7, /* ACPI 6.0 */ 1967 ACPI_HEST_NOTIFY_SEA = 8, /* ACPI 6.1 */ 1968 ACPI_HEST_NOTIFY_SEI = 9, /* ACPI 6.1 */ 1969 ACPI_HEST_NOTIFY_GSIV = 10, /* ACPI 6.1 */ 1970 ACPI_HEST_NOTIFY_SOFTWARE_DELEGATED = 11, /* ACPI 6.2 */ 1971 ACPI_HEST_NOTIFY_RESERVED = 12 /* 12 and greater are reserved */ 1972 }; 1973 1974 /* Values for ConfigWriteEnable bitfield above */ 1975 1976 #define ACPI_HEST_TYPE (1) 1977 #define ACPI_HEST_POLL_INTERVAL (1<<1) 1978 #define ACPI_HEST_POLL_THRESHOLD_VALUE (1<<2) 1979 #define ACPI_HEST_POLL_THRESHOLD_WINDOW (1<<3) 1980 #define ACPI_HEST_ERR_THRESHOLD_VALUE (1<<4) 1981 #define ACPI_HEST_ERR_THRESHOLD_WINDOW (1<<5) 1982 1983 1984 /* 1985 * HEST subtables 1986 */ 1987 1988 /* 0: IA32 Machine Check Exception */ 1989 1990 typedef struct acpi_hest_ia_machine_check 1991 { 1992 ACPI_HEST_HEADER Header; 1993 UINT16 Reserved1; 1994 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 1995 UINT8 Enabled; 1996 UINT32 RecordsToPreallocate; 1997 UINT32 MaxSectionsPerRecord; 1998 UINT64 GlobalCapabilityData; 1999 UINT64 GlobalControlData; 2000 UINT8 NumHardwareBanks; 2001 UINT8 Reserved3[7]; 2002 2003 } ACPI_HEST_IA_MACHINE_CHECK; 2004 2005 2006 /* 1: IA32 Corrected Machine Check */ 2007 2008 typedef struct acpi_hest_ia_corrected 2009 { 2010 ACPI_HEST_HEADER Header; 2011 UINT16 Reserved1; 2012 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 2013 UINT8 Enabled; 2014 UINT32 RecordsToPreallocate; 2015 UINT32 MaxSectionsPerRecord; 2016 ACPI_HEST_NOTIFY Notify; 2017 UINT8 NumHardwareBanks; 2018 UINT8 Reserved2[3]; 2019 2020 } ACPI_HEST_IA_CORRECTED; 2021 2022 2023 /* 2: IA32 Non-Maskable Interrupt */ 2024 2025 typedef struct acpi_hest_ia_nmi 2026 { 2027 ACPI_HEST_HEADER Header; 2028 UINT32 Reserved; 2029 UINT32 RecordsToPreallocate; 2030 UINT32 MaxSectionsPerRecord; 2031 UINT32 MaxRawDataLength; 2032 2033 } ACPI_HEST_IA_NMI; 2034 2035 2036 /* 3,4,5: Not used */ 2037 2038 /* 6: PCI Express Root Port AER */ 2039 2040 typedef struct acpi_hest_aer_root 2041 { 2042 ACPI_HEST_HEADER Header; 2043 ACPI_HEST_AER_COMMON Aer; 2044 UINT32 RootErrorCommand; 2045 2046 } ACPI_HEST_AER_ROOT; 2047 2048 2049 /* 7: PCI Express AER (AER Endpoint) */ 2050 2051 typedef struct acpi_hest_aer 2052 { 2053 ACPI_HEST_HEADER Header; 2054 ACPI_HEST_AER_COMMON Aer; 2055 2056 } ACPI_HEST_AER; 2057 2058 2059 /* 8: PCI Express/PCI-X Bridge AER */ 2060 2061 typedef struct acpi_hest_aer_bridge 2062 { 2063 ACPI_HEST_HEADER Header; 2064 ACPI_HEST_AER_COMMON Aer; 2065 UINT32 UncorrectableMask2; 2066 UINT32 UncorrectableSeverity2; 2067 UINT32 AdvancedCapabilities2; 2068 2069 } ACPI_HEST_AER_BRIDGE; 2070 2071 2072 /* 9: Generic Hardware Error Source */ 2073 2074 typedef struct acpi_hest_generic 2075 { 2076 ACPI_HEST_HEADER Header; 2077 UINT16 RelatedSourceId; 2078 UINT8 Reserved; 2079 UINT8 Enabled; 2080 UINT32 RecordsToPreallocate; 2081 UINT32 MaxSectionsPerRecord; 2082 UINT32 MaxRawDataLength; 2083 ACPI_GENERIC_ADDRESS ErrorStatusAddress; 2084 ACPI_HEST_NOTIFY Notify; 2085 UINT32 ErrorBlockLength; 2086 2087 } ACPI_HEST_GENERIC; 2088 2089 2090 /* 10: Generic Hardware Error Source, version 2 */ 2091 2092 typedef struct acpi_hest_generic_v2 2093 { 2094 ACPI_HEST_HEADER Header; 2095 UINT16 RelatedSourceId; 2096 UINT8 Reserved; 2097 UINT8 Enabled; 2098 UINT32 RecordsToPreallocate; 2099 UINT32 MaxSectionsPerRecord; 2100 UINT32 MaxRawDataLength; 2101 ACPI_GENERIC_ADDRESS ErrorStatusAddress; 2102 ACPI_HEST_NOTIFY Notify; 2103 UINT32 ErrorBlockLength; 2104 ACPI_GENERIC_ADDRESS ReadAckRegister; 2105 UINT64 ReadAckPreserve; 2106 UINT64 ReadAckWrite; 2107 2108 } ACPI_HEST_GENERIC_V2; 2109 2110 2111 /* Generic Error Status block */ 2112 2113 typedef struct acpi_hest_generic_status 2114 { 2115 UINT32 BlockStatus; 2116 UINT32 RawDataOffset; 2117 UINT32 RawDataLength; 2118 UINT32 DataLength; 2119 UINT32 ErrorSeverity; 2120 2121 } ACPI_HEST_GENERIC_STATUS; 2122 2123 /* Values for BlockStatus flags above */ 2124 2125 #define ACPI_HEST_UNCORRECTABLE (1) 2126 #define ACPI_HEST_CORRECTABLE (1<<1) 2127 #define ACPI_HEST_MULTIPLE_UNCORRECTABLE (1<<2) 2128 #define ACPI_HEST_MULTIPLE_CORRECTABLE (1<<3) 2129 #define ACPI_HEST_ERROR_ENTRY_COUNT (0xFF<<4) /* 8 bits, error count */ 2130 2131 2132 /* Generic Error Data entry */ 2133 2134 typedef struct acpi_hest_generic_data 2135 { 2136 UINT8 SectionType[16]; 2137 UINT32 ErrorSeverity; 2138 UINT16 Revision; 2139 UINT8 ValidationBits; 2140 UINT8 Flags; 2141 UINT32 ErrorDataLength; 2142 UINT8 FruId[16]; 2143 UINT8 FruText[20]; 2144 2145 } ACPI_HEST_GENERIC_DATA; 2146 2147 /* Extension for revision 0x0300 */ 2148 2149 typedef struct acpi_hest_generic_data_v300 2150 { 2151 UINT8 SectionType[16]; 2152 UINT32 ErrorSeverity; 2153 UINT16 Revision; 2154 UINT8 ValidationBits; 2155 UINT8 Flags; 2156 UINT32 ErrorDataLength; 2157 UINT8 FruId[16]; 2158 UINT8 FruText[20]; 2159 UINT64 TimeStamp; 2160 2161 } ACPI_HEST_GENERIC_DATA_V300; 2162 2163 /* Values for ErrorSeverity above */ 2164 2165 #define ACPI_HEST_GEN_ERROR_RECOVERABLE 0 2166 #define ACPI_HEST_GEN_ERROR_FATAL 1 2167 #define ACPI_HEST_GEN_ERROR_CORRECTED 2 2168 #define ACPI_HEST_GEN_ERROR_NONE 3 2169 2170 /* Flags for ValidationBits above */ 2171 2172 #define ACPI_HEST_GEN_VALID_FRU_ID (1) 2173 #define ACPI_HEST_GEN_VALID_FRU_STRING (1<<1) 2174 #define ACPI_HEST_GEN_VALID_TIMESTAMP (1<<2) 2175 2176 2177 /* 11: IA32 Deferred Machine Check Exception (ACPI 6.2) */ 2178 2179 typedef struct acpi_hest_ia_deferred_check 2180 { 2181 ACPI_HEST_HEADER Header; 2182 UINT16 Reserved1; 2183 UINT8 Flags; /* See flags ACPI_HEST_GLOBAL, etc. above */ 2184 UINT8 Enabled; 2185 UINT32 RecordsToPreallocate; 2186 UINT32 MaxSectionsPerRecord; 2187 ACPI_HEST_NOTIFY Notify; 2188 UINT8 NumHardwareBanks; 2189 UINT8 Reserved2[3]; 2190 2191 } ACPI_HEST_IA_DEFERRED_CHECK; 2192 2193 2194 /******************************************************************************* 2195 * 2196 * HMAT - Heterogeneous Memory Attributes Table (ACPI 6.3) 2197 * 2198 ******************************************************************************/ 2199 2200 typedef struct acpi_table_hmat 2201 { 2202 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2203 UINT32 Reserved; 2204 2205 } ACPI_TABLE_HMAT; 2206 2207 2208 /* Values for HMAT structure types */ 2209 2210 enum AcpiHmatType 2211 { 2212 ACPI_HMAT_TYPE_ADDRESS_RANGE = 0, /* Memory subsystem address range */ 2213 ACPI_HMAT_TYPE_LOCALITY = 1, /* System locality latency and bandwidth information */ 2214 ACPI_HMAT_TYPE_CACHE = 2, /* Memory side cache information */ 2215 ACPI_HMAT_TYPE_RESERVED = 3 /* 3 and greater are reserved */ 2216 }; 2217 2218 typedef struct acpi_hmat_structure 2219 { 2220 UINT16 Type; 2221 UINT16 Reserved; 2222 UINT32 Length; 2223 2224 } ACPI_HMAT_STRUCTURE; 2225 2226 2227 /* 2228 * HMAT Structures, correspond to Type in ACPI_HMAT_STRUCTURE 2229 */ 2230 2231 /* 0: Memory proximity domain attributes */ 2232 2233 typedef struct acpi_hmat_proximity_domain 2234 { 2235 ACPI_HMAT_STRUCTURE Header; 2236 UINT16 Flags; 2237 UINT16 Reserved1; 2238 UINT32 InitiatorPD; /* Attached Initiator proximity domain */ 2239 UINT32 MemoryPD; /* Memory proximity domain */ 2240 UINT32 Reserved2; 2241 UINT64 Reserved3; 2242 UINT64 Reserved4; 2243 2244 } ACPI_HMAT_PROXIMITY_DOMAIN; 2245 2246 /* Masks for Flags field above */ 2247 2248 #define ACPI_HMAT_INITIATOR_PD_VALID (1) /* 1: InitiatorPD field is valid */ 2249 2250 2251 /* 1: System locality latency and bandwidth information */ 2252 2253 typedef struct acpi_hmat_locality 2254 { 2255 ACPI_HMAT_STRUCTURE Header; 2256 UINT8 Flags; 2257 UINT8 DataType; 2258 UINT8 MinTransferSize; 2259 UINT8 Reserved1; 2260 UINT32 NumberOfInitiatorPDs; 2261 UINT32 NumberOfTargetPDs; 2262 UINT32 Reserved2; 2263 UINT64 EntryBaseUnit; 2264 2265 } ACPI_HMAT_LOCALITY; 2266 2267 /* Masks for Flags field above */ 2268 2269 #define ACPI_HMAT_MEMORY_HIERARCHY (0x0F) /* Bits 0-3 */ 2270 2271 /* Values for Memory Hierarchy flags */ 2272 2273 #define ACPI_HMAT_MEMORY 0 2274 #define ACPI_HMAT_1ST_LEVEL_CACHE 1 2275 #define ACPI_HMAT_2ND_LEVEL_CACHE 2 2276 #define ACPI_HMAT_3RD_LEVEL_CACHE 3 2277 #define ACPI_HMAT_MINIMUM_XFER_SIZE 0x10 /* Bit 4: ACPI 6.4 */ 2278 #define ACPI_HMAT_NON_SEQUENTIAL_XFERS 0x20 /* Bit 5: ACPI 6.4 */ 2279 2280 2281 /* Values for DataType field above */ 2282 2283 #define ACPI_HMAT_ACCESS_LATENCY 0 2284 #define ACPI_HMAT_READ_LATENCY 1 2285 #define ACPI_HMAT_WRITE_LATENCY 2 2286 #define ACPI_HMAT_ACCESS_BANDWIDTH 3 2287 #define ACPI_HMAT_READ_BANDWIDTH 4 2288 #define ACPI_HMAT_WRITE_BANDWIDTH 5 2289 2290 2291 /* 2: Memory side cache information */ 2292 2293 typedef struct acpi_hmat_cache 2294 { 2295 ACPI_HMAT_STRUCTURE Header; 2296 UINT32 MemoryPD; 2297 UINT32 Reserved1; 2298 UINT64 CacheSize; 2299 UINT32 CacheAttributes; 2300 UINT16 AddressMode; 2301 UINT16 NumberOfSMBIOSHandles; 2302 2303 } ACPI_HMAT_CACHE; 2304 2305 /* Masks for CacheAttributes field above */ 2306 2307 #define ACPI_HMAT_TOTAL_CACHE_LEVEL (0x0000000F) 2308 #define ACPI_HMAT_CACHE_LEVEL (0x000000F0) 2309 #define ACPI_HMAT_CACHE_ASSOCIATIVITY (0x00000F00) 2310 #define ACPI_HMAT_WRITE_POLICY (0x0000F000) 2311 #define ACPI_HMAT_CACHE_LINE_SIZE (0xFFFF0000) 2312 2313 #define ACPI_HMAT_CACHE_MODE_UNKNOWN (0) 2314 #define ACPI_HMAT_CACHE_MODE_EXTENDED_LINEAR (1) 2315 2316 /* Values for cache associativity flag */ 2317 2318 #define ACPI_HMAT_CA_NONE (0) 2319 #define ACPI_HMAT_CA_DIRECT_MAPPED (1) 2320 #define ACPI_HMAT_CA_COMPLEX_CACHE_INDEXING (2) 2321 2322 /* Values for write policy flag */ 2323 2324 #define ACPI_HMAT_CP_NONE (0) 2325 #define ACPI_HMAT_CP_WB (1) 2326 #define ACPI_HMAT_CP_WT (2) 2327 2328 2329 /******************************************************************************* 2330 * 2331 * HPET - High Precision Event Timer table 2332 * Version 1 2333 * 2334 * Conforms to "IA-PC HPET (High Precision Event Timers) Specification", 2335 * Version 1.0a, October 2004 2336 * 2337 ******************************************************************************/ 2338 2339 typedef struct acpi_table_hpet 2340 { 2341 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2342 UINT32 Id; /* Hardware ID of event timer block */ 2343 ACPI_GENERIC_ADDRESS Address; /* Address of event timer block */ 2344 UINT8 Sequence; /* HPET sequence number */ 2345 UINT16 MinimumTick; /* Main counter min tick, periodic mode */ 2346 UINT8 Flags; 2347 2348 } ACPI_TABLE_HPET; 2349 2350 /* Masks for Flags field above */ 2351 2352 #define ACPI_HPET_PAGE_PROTECT_MASK (3) 2353 2354 /* Values for Page Protect flags */ 2355 2356 enum AcpiHpetPageProtect 2357 { 2358 ACPI_HPET_NO_PAGE_PROTECT = 0, 2359 ACPI_HPET_PAGE_PROTECT4 = 1, 2360 ACPI_HPET_PAGE_PROTECT64 = 2 2361 }; 2362 2363 2364 /******************************************************************************* 2365 * 2366 * IBFT - Boot Firmware Table 2367 * Version 1 2368 * 2369 * Conforms to "iSCSI Boot Firmware Table (iBFT) as Defined in ACPI 3.0b 2370 * Specification", Version 1.01, March 1, 2007 2371 * 2372 * Note: It appears that this table is not intended to appear in the RSDT/XSDT. 2373 * Therefore, it is not currently supported by the disassembler. 2374 * 2375 ******************************************************************************/ 2376 2377 typedef struct acpi_table_ibft 2378 { 2379 ACPI_TABLE_HEADER Header; /* Common ACPI table header */ 2380 UINT8 Reserved[12]; 2381 2382 } ACPI_TABLE_IBFT; 2383 2384 2385 /* IBFT common subtable header */ 2386 2387 typedef struct acpi_ibft_header 2388 { 2389 UINT8 Type; 2390 UINT8 Version; 2391 UINT16 Length; 2392 UINT8 Index; 2393 UINT8 Flags; 2394 2395 } ACPI_IBFT_HEADER; 2396 2397 /* Values for Type field above */ 2398 2399 enum AcpiIbftType 2400 { 2401 ACPI_IBFT_TYPE_NOT_USED = 0, 2402 ACPI_IBFT_TYPE_CONTROL = 1, 2403 ACPI_IBFT_TYPE_INITIATOR = 2, 2404 ACPI_IBFT_TYPE_NIC = 3, 2405 ACPI_IBFT_TYPE_TARGET = 4, 2406 ACPI_IBFT_TYPE_EXTENSIONS = 5, 2407 ACPI_IBFT_TYPE_RESERVED = 6 /* 6 and greater are reserved */ 2408 }; 2409 2410 2411 /* IBFT subtables */ 2412 2413 typedef struct acpi_ibft_control 2414 { 2415 ACPI_IBFT_HEADER Header; 2416 UINT16 Extensions; 2417 UINT16 InitiatorOffset; 2418 UINT16 Nic0Offset; 2419 UINT16 Target0Offset; 2420 UINT16 Nic1Offset; 2421 UINT16 Target1Offset; 2422 2423 } ACPI_IBFT_CONTROL; 2424 2425 typedef struct acpi_ibft_initiator 2426 { 2427 ACPI_IBFT_HEADER Header; 2428 UINT8 SnsServer[16]; 2429 UINT8 SlpServer[16]; 2430 UINT8 PrimaryServer[16]; 2431 UINT8 SecondaryServer[16]; 2432 UINT16 NameLength; 2433 UINT16 NameOffset; 2434 2435 } ACPI_IBFT_INITIATOR; 2436 2437 typedef struct acpi_ibft_nic 2438 { 2439 ACPI_IBFT_HEADER Header; 2440 UINT8 IpAddress[16]; 2441 UINT8 SubnetMaskPrefix; 2442 UINT8 Origin; 2443 UINT8 Gateway[16]; 2444 UINT8 PrimaryDns[16]; 2445 UINT8 SecondaryDns[16]; 2446 UINT8 Dhcp[16]; 2447 UINT16 Vlan; 2448 UINT8 MacAddress[6]; 2449 UINT16 PciAddress; 2450 UINT16 NameLength; 2451 UINT16 NameOffset; 2452 2453 } ACPI_IBFT_NIC; 2454 2455 typedef struct acpi_ibft_target 2456 { 2457 ACPI_IBFT_HEADER Header; 2458 UINT8 TargetIpAddress[16]; 2459 UINT16 TargetIpSocket; 2460 UINT8 TargetBootLun[8]; 2461 UINT8 ChapType; 2462 UINT8 NicAssociation; 2463 UINT16 TargetNameLength; 2464 UINT16 TargetNameOffset; 2465 UINT16 ChapNameLength; 2466 UINT16 ChapNameOffset; 2467 UINT16 ChapSecretLength; 2468 UINT16 ChapSecretOffset; 2469 UINT16 ReverseChapNameLength; 2470 UINT16 ReverseChapNameOffset; 2471 UINT16 ReverseChapSecretLength; 2472 UINT16 ReverseChapSecretOffset; 2473 2474 } ACPI_IBFT_TARGET; 2475 2476 2477 /* Reset to default packing */ 2478 2479 #pragma pack() 2480 2481 #endif /* __ACTBL1_H__ */ 2482
Indexes created Sun Sep 21 20:09:37 GMT 2025