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      1 /*	$NetBSD: pte.h,v 1.10 2020/07/06 08:17:01 rin Exp $	*/
      2 
      3 /*-
      4  * Copyright (C) 2003 Matt Thomas
      5  * Copyright (C) 1995, 1996 Wolfgang Solfrank.
      6  * Copyright (C) 1995, 1996 TooLs GmbH.
      7  * All rights reserved.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. All advertising materials mentioning features or use of this software
     18  *    must display the following acknowledgement:
     19  *	This product includes software developed by TooLs GmbH.
     20  * 4. The name of TooLs GmbH may not be used to endorse or promote products
     21  *    derived from this software without specific prior written permission.
     22  *
     23  * THIS SOFTWARE IS PROVIDED BY TOOLS GMBH ``AS IS'' AND ANY EXPRESS OR
     24  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     25  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     26  * IN NO EVENT SHALL TOOLS GMBH BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
     27  * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
     28  * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS;
     29  * OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY,
     30  * WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR
     31  * OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF
     32  * ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     33  */
     34 
     35 #ifndef	_POWERPC_OEA_PTE_H_
     36 #define	_POWERPC_OEA_PTE_H_
     37 
     38 #include <sys/queue.h>
     39 
     40 /*
     41  * Page Table Entries
     42  */
     43 #ifndef	_LOCORE
     44 #if defined(PMAP_OEA64) || defined(PMAP_OEA64_BRIDGE)
     45 struct pte {
     46 	register64_t pte_hi;
     47 	register64_t pte_lo;
     48 };
     49 #else	/* PMAP_OEA */
     50 struct pte {
     51 	register_t pte_hi;
     52 	register_t pte_lo;
     53 };
     54 #endif
     55 
     56 struct pteg {
     57 	struct pte pt[8];
     58 };
     59 #endif	/* _LOCORE */
     60 
     61 /* High word: */
     62 #if defined (PMAP_OEA64)
     63 #define	PTE_VALID	0x00000001
     64 #define	PTE_HID		0x00000002
     65 #define	PTE_API		0x00000f80
     66 #define	PTE_API_SHFT	7
     67 #define	PTE_VSID_SHFT	12
     68 #define	PTE_VSID	(~0xfffL)
     69 #elif defined (PMAP_OEA64_BRIDGE)
     70 #define	PTE_VALID	0x00000001
     71 #define	PTE_HID		0x00000002
     72 #define	PTE_API		0x00000f80
     73 #define	PTE_API_SHFT	7
     74 #define	PTE_VSID_SHFT	12
     75 #define	PTE_VSID	(~0xfffULL)
     76 #else
     77 #define	PTE_VALID	0x80000000
     78 #define	PTE_VSID	0x7fffff80
     79 #define	PTE_VSID_SHFT	7
     80 #define	PTE_VSID_LEN	24
     81 #define	PTE_HID		0x00000040
     82 #define	PTE_API		0x0000003f
     83 #define	PTE_API_SHFT	0
     84 #endif	/* PMAP_OEA64 */
     85 
     86 
     87 /* Low word: */
     88 #if defined (PMAP_OEA64_BRIDGE)
     89 #define	PTE_RPGN	(~0xfffULL)
     90 #else
     91 #define	PTE_RPGN	(~0xfffUL)
     92 #endif
     93 #define	PTE_RPGN_SHFT	12
     94 #define	PTE_REF		0x00000100
     95 #define	PTE_CHG		0x00000080
     96 #define	PTE_W		0x00000040	/* 1 = write-through, 0 = write-back */
     97 #define	PTE_I		0x00000020	/* cache inhibit */
     98 #define	PTE_M		0x00000010	/* memory coherency enable */
     99 #define	PTE_G		0x00000008	/* guarded region (not on 601) */
    100 #define	PTE_WIMG	(PTE_W|PTE_I|PTE_M|PTE_G)
    101 #define	PTE_IG		(PTE_I|PTE_G)
    102 #define	PTE_PP		0x00000003
    103 #define	PTE_SO		0x00000000	/* Super. Only       (U: XX, S: RW) */
    104 #define	PTE_SW		0x00000001	/* Super. Write-Only (U: RO, S: RW) */
    105 #define	PTE_BW		0x00000002	/* Supervisor        (U: RW, S: RW) */
    106 #define	PTE_BR		0x00000003	/* Both Read Only    (U: RO, S: RO) */
    107 #define	PTE_RW		PTE_BW
    108 #define	PTE_RO		PTE_BR
    109 
    110 #define	PTE_EXEC	0x00000200	/* pseudo bit; page is exec */
    111 
    112 /*
    113  * Extract bits from address
    114  */
    115 #define	ADDR_SR	        (~0x0fffffffL)
    116 #define	ADDR_SR_SHFT	28
    117 #define	ADDR_PIDX	0x0ffff000
    118 #define	ADDR_PIDX_SHFT	12
    119 #if defined (PMAP_OEA64) || defined (PMAP_OEA64_BRIDGE)
    120 #define	ADDR_API_SHFT	23	/* API is 5 bits */
    121 #else
    122 #define	ADDR_API_SHFT	22	/* API is 6 bits */
    123 #endif /* PMAP_OEA64 */
    124 #define	ADDR_POFF	0x00000fff
    125 
    126 #ifdef PMAP_OEA64
    127 /*
    128  * Segment Table Element
    129  */
    130 #ifndef	_LOCORE
    131 struct ste {
    132 	register_t ste_hi;
    133 	register_t ste_lo;
    134 };
    135 
    136 struct steg {
    137 	struct ste st[8];
    138 };
    139 #endif	/* _LOCORE */
    140 
    141 /* High Word */
    142 #define	STE_VALID	0x00000080
    143 #define	STE_TYPE	0x00000040
    144 #define	STE_SUKEY	0x00000020	/* Super-state protection */
    145 #define	STE_PRKEY	0x00000010	/* User-state protection */
    146 #define	STE_NOEXEC	0x00000008	/* No-execute protection bit */
    147 #define	STE_ESID	(~0x0fffffffL)	/* Effective Segment ID */
    148 #define	STE_ESID_SHFT	28
    149 #define	STE_ESID_MASK	0x0000001f	/* low 5 bits of the ESID */
    150 
    151 /* Low Word */
    152 #define	STE_VSID	(~0xfffL)	/* Virtual Segment ID */
    153 #define	STE_VSID_SHFT	12
    154 #define	STE_VSID_WIDTH	52
    155 
    156 #define	SR_VSID_SHFT	STE_VSID_SHFT	/* compatibility with PPC_OEA */
    157 #define	SR_VSID_WIDTH	STE_VSID_WIDTH	/* compatibility with PPC_OEA */
    158 
    159 #define	SR_KEY_LEN	9		/* 64 groups of 8 segment entries */
    160 #else	/* !defined(PMAP_OEA64) */
    161 
    162 /*
    163  * Segment registers
    164  */
    165 #define	SR_KEY_LEN	4		/* 16 segment registers */
    166 #define	SR_TYPE		0x80000000	/* T=0 selects memory format */
    167 #define	SR_SUKEY	0x40000000	/* Supervisor protection key */
    168 #define	SR_PRKEY	0x20000000	/* User protection key */
    169 #define	SR_NOEXEC	0x10000000	/* No-execute protection bit */
    170 #define	SR_VSID_SHFT	0		/* Starts at LSB */
    171 #define	SR_VSID_WIDTH	24		/* Goes for 24 bits */
    172 
    173 #endif	/* PMAP_OEA64 */
    174 
    175 					/* Virtual segment ID */
    176 #define	SR_VSID		(((1L << SR_VSID_WIDTH) - 1) << SR_VSID_SHFT)
    177 
    178 #endif	/* _POWERPC_OEA_PTE_H_ */
    179