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      1 /*	$NetBSD: pptable_v1_0.h,v 1.2 2021/12/18 23:45:26 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2015 Advanced Micro Devices, Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  *
     24  */
     25 
     26 #ifndef TONGA_PPTABLE_H
     27 #define TONGA_PPTABLE_H
     28 
     29 /** \file
     30  * This is a PowerPlay table header file
     31  */
     32 #pragma pack(push, 1)
     33 
     34 #include "hwmgr.h"
     35 
     36 #define ATOM_TONGA_PP_FANPARAMETERS_TACHOMETER_PULSES_PER_REVOLUTION_MASK 0x0f
     37 #define ATOM_TONGA_PP_FANPARAMETERS_NOFAN                                 0x80    /* No fan is connected to this controller. */
     38 
     39 #define ATOM_TONGA_PP_THERMALCONTROLLER_NONE      0
     40 #define ATOM_TONGA_PP_THERMALCONTROLLER_LM96163   17
     41 #define ATOM_TONGA_PP_THERMALCONTROLLER_TONGA     21
     42 #define ATOM_TONGA_PP_THERMALCONTROLLER_FIJI      22
     43 
     44 /*
     45  * Thermal controller 'combo type' to use an external controller for Fan control and an internal controller for thermal.
     46  * We probably should reserve the bit 0x80 for this use.
     47  * To keep the number of these types low we should also use the same code for all ASICs (i.e. do not distinguish RV6xx and RV7xx Internal here).
     48  * The driver can pick the correct internal controller based on the ASIC.
     49  */
     50 
     51 #define ATOM_TONGA_PP_THERMALCONTROLLER_ADT7473_WITH_INTERNAL   0x89    /* ADT7473 Fan Control + Internal Thermal Controller */
     52 #define ATOM_TONGA_PP_THERMALCONTROLLER_EMC2103_WITH_INTERNAL   0x8D    /* EMC2103 Fan Control + Internal Thermal Controller */
     53 
     54 /*/* ATOM_TONGA_POWERPLAYTABLE::ulPlatformCaps */
     55 #define ATOM_TONGA_PP_PLATFORM_CAP_VDDGFX_CONTROL              0x1            /* This cap indicates whether vddgfx will be a separated power rail. */
     56 #define ATOM_TONGA_PP_PLATFORM_CAP_POWERPLAY                   0x2            /* This cap indicates whether this is a mobile part and CCC need to show Powerplay page. */
     57 #define ATOM_TONGA_PP_PLATFORM_CAP_SBIOSPOWERSOURCE            0x4            /* This cap indicates whether power source notificaiton is done by SBIOS directly. */
     58 #define ATOM_TONGA_PP_PLATFORM_CAP_DISABLE_VOLTAGE_ISLAND      0x8            /* Enable the option to overwrite voltage island feature to be disabled, regardless of VddGfx power rail support. */
     59 #define ____RETIRE16____                                0x10
     60 #define ATOM_TONGA_PP_PLATFORM_CAP_HARDWAREDC                 0x20            /* This cap indicates whether power source notificaiton is done by GPIO directly. */
     61 #define ____RETIRE64____                                0x40
     62 #define ____RETIRE128____                               0x80
     63 #define ____RETIRE256____                              0x100
     64 #define ____RETIRE512____                              0x200
     65 #define ____RETIRE1024____                             0x400
     66 #define ____RETIRE2048____                             0x800
     67 #define ATOM_TONGA_PP_PLATFORM_CAP_MVDD_CONTROL             0x1000            /* This cap indicates dynamic MVDD is required. Uncheck to disable it. */
     68 #define ____RETIRE2000____                            0x2000
     69 #define ____RETIRE4000____                            0x4000
     70 #define ATOM_TONGA_PP_PLATFORM_CAP_VDDCI_CONTROL            0x8000            /* This cap indicates dynamic VDDCI is required. Uncheck to disable it. */
     71 #define ____RETIRE10000____                          0x10000
     72 #define ATOM_TONGA_PP_PLATFORM_CAP_BACO                    0x20000            /* Enable to indicate the driver supports BACO state. */
     73 
     74 #define ATOM_TONGA_PP_PLATFORM_CAP_OUTPUT_THERMAL2GPIO17         0x100000     /* Enable to indicate the driver supports thermal2GPIO17. */
     75 #define ATOM_TONGA_PP_PLATFORM_COMBINE_PCC_WITH_THERMAL_SIGNAL  0x1000000     /* Enable to indicate if thermal and PCC are sharing the same GPIO */
     76 #define ATOM_TONGA_PLATFORM_LOAD_POST_PRODUCTION_FIRMWARE       0x2000000
     77 
     78 /* ATOM_PPLIB_NONCLOCK_INFO::usClassification */
     79 #define ATOM_PPLIB_CLASSIFICATION_UI_MASK               0x0007
     80 #define ATOM_PPLIB_CLASSIFICATION_UI_SHIFT              0
     81 #define ATOM_PPLIB_CLASSIFICATION_UI_NONE               0
     82 #define ATOM_PPLIB_CLASSIFICATION_UI_BATTERY            1
     83 #define ATOM_PPLIB_CLASSIFICATION_UI_BALANCED           3
     84 #define ATOM_PPLIB_CLASSIFICATION_UI_PERFORMANCE        5
     85 /* 2, 4, 6, 7 are reserved */
     86 
     87 #define ATOM_PPLIB_CLASSIFICATION_BOOT                  0x0008
     88 #define ATOM_PPLIB_CLASSIFICATION_THERMAL               0x0010
     89 #define ATOM_PPLIB_CLASSIFICATION_LIMITEDPOWERSOURCE    0x0020
     90 #define ATOM_PPLIB_CLASSIFICATION_REST                  0x0040
     91 #define ATOM_PPLIB_CLASSIFICATION_FORCED                0x0080
     92 #define ATOM_PPLIB_CLASSIFICATION_ACPI                  0x1000
     93 
     94 /* ATOM_PPLIB_NONCLOCK_INFO::usClassification2 */
     95 #define ATOM_PPLIB_CLASSIFICATION2_LIMITEDPOWERSOURCE_2 0x0001
     96 
     97 #define ATOM_Tonga_DISALLOW_ON_DC                       0x00004000
     98 #define ATOM_Tonga_ENABLE_VARIBRIGHT                    0x00008000
     99 
    100 #define ATOM_Tonga_TABLE_REVISION_TONGA                 7
    101 
    102 typedef struct _ATOM_Tonga_POWERPLAYTABLE {
    103 	ATOM_COMMON_TABLE_HEADER sHeader;
    104 
    105 	UCHAR  ucTableRevision;
    106 	USHORT usTableSize;						/*the size of header structure */
    107 
    108 	ULONG	ulGoldenPPID;
    109 	ULONG	ulGoldenRevision;
    110 	USHORT	usFormatID;
    111 
    112 	USHORT	usVoltageTime;					 /*in microseconds */
    113 	ULONG	ulPlatformCaps;					  /*See ATOM_Tonga_CAPS_* */
    114 
    115 	ULONG	ulMaxODEngineClock; 			   /*For Overdrive.  */
    116 	ULONG	ulMaxODMemoryClock; 			   /*For Overdrive. */
    117 
    118 	USHORT	usPowerControlLimit;
    119 	USHORT	usUlvVoltageOffset;				  /*in mv units */
    120 
    121 	USHORT	usStateArrayOffset;				  /*points to ATOM_Tonga_State_Array */
    122 	USHORT	usFanTableOffset;				  /*points to ATOM_Tonga_Fan_Table */
    123 	USHORT	usThermalControllerOffset;		   /*points to ATOM_Tonga_Thermal_Controller */
    124 	USHORT	usReserv;						   /*CustomThermalPolicy removed for Tonga. Keep this filed as reserved. */
    125 
    126 	USHORT	usMclkDependencyTableOffset;	   /*points to ATOM_Tonga_MCLK_Dependency_Table */
    127 	USHORT	usSclkDependencyTableOffset;	   /*points to ATOM_Tonga_SCLK_Dependency_Table */
    128 	USHORT	usVddcLookupTableOffset;		   /*points to ATOM_Tonga_Voltage_Lookup_Table */
    129 	USHORT	usVddgfxLookupTableOffset; 		/*points to ATOM_Tonga_Voltage_Lookup_Table */
    130 
    131 	USHORT	usMMDependencyTableOffset;		  /*points to ATOM_Tonga_MM_Dependency_Table */
    132 
    133 	USHORT	usVCEStateTableOffset;			   /*points to ATOM_Tonga_VCE_State_Table; */
    134 
    135 	USHORT	usPPMTableOffset;				  /*points to ATOM_Tonga_PPM_Table */
    136 	USHORT	usPowerTuneTableOffset;			  /*points to ATOM_PowerTune_Table */
    137 
    138 	USHORT	usHardLimitTableOffset; 		   /*points to ATOM_Tonga_Hard_Limit_Table */
    139 
    140 	USHORT	usPCIETableOffset;				  /*points to ATOM_Tonga_PCIE_Table */
    141 
    142 	USHORT	usGPIOTableOffset;				  /*points to ATOM_Tonga_GPIO_Table */
    143 
    144 	USHORT	usReserved[6];					   /*TODO: modify reserved size to fit structure aligning */
    145 } ATOM_Tonga_POWERPLAYTABLE;
    146 
    147 typedef struct _ATOM_Tonga_State {
    148 	UCHAR  ucEngineClockIndexHigh;
    149 	UCHAR  ucEngineClockIndexLow;
    150 
    151 	UCHAR  ucMemoryClockIndexHigh;
    152 	UCHAR  ucMemoryClockIndexLow;
    153 
    154 	UCHAR  ucPCIEGenLow;
    155 	UCHAR  ucPCIEGenHigh;
    156 
    157 	UCHAR  ucPCIELaneLow;
    158 	UCHAR  ucPCIELaneHigh;
    159 
    160 	USHORT usClassification;
    161 	ULONG ulCapsAndSettings;
    162 	USHORT usClassification2;
    163 	UCHAR  ucUnused[4];
    164 } ATOM_Tonga_State;
    165 
    166 typedef struct _ATOM_Tonga_State_Array {
    167 	UCHAR ucRevId;
    168 	UCHAR ucNumEntries;		/* Number of entries. */
    169 	ATOM_Tonga_State entries[1];	/* Dynamically allocate entries. */
    170 } ATOM_Tonga_State_Array;
    171 
    172 typedef struct _ATOM_Tonga_MCLK_Dependency_Record {
    173 	UCHAR  ucVddcInd;	/* Vddc voltage */
    174 	USHORT usVddci;
    175 	USHORT usVddgfxOffset;	/* Offset relative to Vddc voltage */
    176 	USHORT usMvdd;
    177 	ULONG ulMclk;
    178 	USHORT usReserved;
    179 } ATOM_Tonga_MCLK_Dependency_Record;
    180 
    181 typedef struct _ATOM_Tonga_MCLK_Dependency_Table {
    182 	UCHAR ucRevId;
    183 	UCHAR ucNumEntries; 										/* Number of entries. */
    184 	ATOM_Tonga_MCLK_Dependency_Record entries[1];				/* Dynamically allocate entries. */
    185 } ATOM_Tonga_MCLK_Dependency_Table;
    186 
    187 typedef struct _ATOM_Tonga_SCLK_Dependency_Record {
    188 	UCHAR  ucVddInd;											/* Base voltage */
    189 	USHORT usVddcOffset;										/* Offset relative to base voltage */
    190 	ULONG ulSclk;
    191 	USHORT usEdcCurrent;
    192 	UCHAR  ucReliabilityTemperature;
    193 	UCHAR  ucCKSVOffsetandDisable;							  /* Bits 0~6: Voltage offset for CKS, Bit 7: Disable/enable for the SCLK level. */
    194 } ATOM_Tonga_SCLK_Dependency_Record;
    195 
    196 typedef struct _ATOM_Tonga_SCLK_Dependency_Table {
    197 	UCHAR ucRevId;
    198 	UCHAR ucNumEntries; 										/* Number of entries. */
    199 	ATOM_Tonga_SCLK_Dependency_Record entries[1];				 /* Dynamically allocate entries. */
    200 } ATOM_Tonga_SCLK_Dependency_Table;
    201 
    202 typedef struct _ATOM_Polaris_SCLK_Dependency_Record {
    203 	UCHAR  ucVddInd;											/* Base voltage */
    204 	USHORT usVddcOffset;										/* Offset relative to base voltage */
    205 	ULONG ulSclk;
    206 	USHORT usEdcCurrent;
    207 	UCHAR  ucReliabilityTemperature;
    208 	UCHAR  ucCKSVOffsetandDisable;			/* Bits 0~6: Voltage offset for CKS, Bit 7: Disable/enable for the SCLK level. */
    209 	ULONG  ulSclkOffset;
    210 } ATOM_Polaris_SCLK_Dependency_Record;
    211 
    212 typedef struct _ATOM_Polaris_SCLK_Dependency_Table {
    213 	UCHAR ucRevId;
    214 	UCHAR ucNumEntries;							/* Number of entries. */
    215 	ATOM_Polaris_SCLK_Dependency_Record entries[1];				 /* Dynamically allocate entries. */
    216 } ATOM_Polaris_SCLK_Dependency_Table;
    217 
    218 typedef struct _ATOM_Tonga_PCIE_Record {
    219 	UCHAR ucPCIEGenSpeed;
    220 	UCHAR usPCIELaneWidth;
    221 	UCHAR ucReserved[2];
    222 } ATOM_Tonga_PCIE_Record;
    223 
    224 typedef struct _ATOM_Tonga_PCIE_Table {
    225 	UCHAR ucRevId;
    226 	UCHAR ucNumEntries; 										/* Number of entries. */
    227 	ATOM_Tonga_PCIE_Record entries[1];							/* Dynamically allocate entries. */
    228 } ATOM_Tonga_PCIE_Table;
    229 
    230 typedef struct _ATOM_Polaris10_PCIE_Record {
    231 	UCHAR ucPCIEGenSpeed;
    232 	UCHAR usPCIELaneWidth;
    233 	UCHAR ucReserved[2];
    234 	ULONG ulPCIE_Sclk;
    235 } ATOM_Polaris10_PCIE_Record;
    236 
    237 typedef struct _ATOM_Polaris10_PCIE_Table {
    238 	UCHAR ucRevId;
    239 	UCHAR ucNumEntries;                                         /* Number of entries. */
    240 	ATOM_Polaris10_PCIE_Record entries[1];                      /* Dynamically allocate entries. */
    241 } ATOM_Polaris10_PCIE_Table;
    242 
    243 
    244 typedef struct _ATOM_Tonga_MM_Dependency_Record {
    245 	UCHAR   ucVddcInd;											 /* VDDC voltage */
    246 	USHORT  usVddgfxOffset;									  /* Offset relative to VDDC voltage */
    247 	ULONG  ulDClk;												/* UVD D-clock */
    248 	ULONG  ulVClk;												/* UVD V-clock */
    249 	ULONG  ulEClk;												/* VCE clock */
    250 	ULONG  ulAClk;												/* ACP clock */
    251 	ULONG  ulSAMUClk;											/* SAMU clock */
    252 } ATOM_Tonga_MM_Dependency_Record;
    253 
    254 typedef struct _ATOM_Tonga_MM_Dependency_Table {
    255 	UCHAR ucRevId;
    256 	UCHAR ucNumEntries; 										/* Number of entries. */
    257 	ATOM_Tonga_MM_Dependency_Record entries[1]; 			   /* Dynamically allocate entries. */
    258 } ATOM_Tonga_MM_Dependency_Table;
    259 
    260 typedef struct _ATOM_Tonga_Voltage_Lookup_Record {
    261 	USHORT usVdd;											   /* Base voltage */
    262 	USHORT usCACLow;
    263 	USHORT usCACMid;
    264 	USHORT usCACHigh;
    265 } ATOM_Tonga_Voltage_Lookup_Record;
    266 
    267 typedef struct _ATOM_Tonga_Voltage_Lookup_Table {
    268 	UCHAR ucRevId;
    269 	UCHAR ucNumEntries; 										/* Number of entries. */
    270 	ATOM_Tonga_Voltage_Lookup_Record entries[1];				/* Dynamically allocate entries. */
    271 } ATOM_Tonga_Voltage_Lookup_Table;
    272 
    273 typedef struct _ATOM_Tonga_Fan_Table {
    274 	UCHAR   ucRevId;						 /* Change this if the table format changes or version changes so that the other fields are not the same. */
    275 	UCHAR   ucTHyst;						 /* Temperature hysteresis. Integer. */
    276 	USHORT  usTMin; 						 /* The temperature, in 0.01 centigrades, below which we just run at a minimal PWM. */
    277 	USHORT  usTMed; 						 /* The middle temperature where we change slopes. */
    278 	USHORT  usTHigh;						 /* The high point above TMed for adjusting the second slope. */
    279 	USHORT  usPWMMin;						 /* The minimum PWM value in percent (0.01% increments). */
    280 	USHORT  usPWMMed;						 /* The PWM value (in percent) at TMed. */
    281 	USHORT  usPWMHigh;						 /* The PWM value at THigh. */
    282 	USHORT  usTMax; 						 /* The max temperature */
    283 	UCHAR   ucFanControlMode;				  /* Legacy or Fuzzy Fan mode */
    284 	USHORT  usFanPWMMax;					  /* Maximum allowed fan power in percent */
    285 	USHORT  usFanOutputSensitivity;		  /* Sensitivity of fan reaction to temepature changes */
    286 	USHORT  usFanRPMMax;					  /* The default value in RPM */
    287 	ULONG  ulMinFanSCLKAcousticLimit;	   /* Minimum Fan Controller SCLK Frequency Acoustic Limit. */
    288 	UCHAR   ucTargetTemperature;			 /* Advanced fan controller target temperature. */
    289 	UCHAR   ucMinimumPWMLimit; 			  /* The minimum PWM that the advanced fan controller can set.	This should be set to the highest PWM that will run the fan at its lowest RPM. */
    290 	USHORT  usReserved;
    291 } ATOM_Tonga_Fan_Table;
    292 
    293 typedef struct _ATOM_Fiji_Fan_Table {
    294 	UCHAR   ucRevId;						 /* Change this if the table format changes or version changes so that the other fields are not the same. */
    295 	UCHAR   ucTHyst;						 /* Temperature hysteresis. Integer. */
    296 	USHORT  usTMin; 						 /* The temperature, in 0.01 centigrades, below which we just run at a minimal PWM. */
    297 	USHORT  usTMed; 						 /* The middle temperature where we change slopes. */
    298 	USHORT  usTHigh;						 /* The high point above TMed for adjusting the second slope. */
    299 	USHORT  usPWMMin;						 /* The minimum PWM value in percent (0.01% increments). */
    300 	USHORT  usPWMMed;						 /* The PWM value (in percent) at TMed. */
    301 	USHORT  usPWMHigh;						 /* The PWM value at THigh. */
    302 	USHORT  usTMax; 						 /* The max temperature */
    303 	UCHAR   ucFanControlMode;				  /* Legacy or Fuzzy Fan mode */
    304 	USHORT  usFanPWMMax;					  /* Maximum allowed fan power in percent */
    305 	USHORT  usFanOutputSensitivity;		  /* Sensitivity of fan reaction to temepature changes */
    306 	USHORT  usFanRPMMax;					  /* The default value in RPM */
    307 	ULONG  ulMinFanSCLKAcousticLimit;		/* Minimum Fan Controller SCLK Frequency Acoustic Limit. */
    308 	UCHAR   ucTargetTemperature;			 /* Advanced fan controller target temperature. */
    309 	UCHAR   ucMinimumPWMLimit; 			  /* The minimum PWM that the advanced fan controller can set.	This should be set to the highest PWM that will run the fan at its lowest RPM. */
    310 	USHORT  usFanGainEdge;
    311 	USHORT  usFanGainHotspot;
    312 	USHORT  usFanGainLiquid;
    313 	USHORT  usFanGainVrVddc;
    314 	USHORT  usFanGainVrMvdd;
    315 	USHORT  usFanGainPlx;
    316 	USHORT  usFanGainHbm;
    317 	USHORT  usReserved;
    318 } ATOM_Fiji_Fan_Table;
    319 
    320 typedef struct _ATOM_Tonga_Thermal_Controller {
    321 	UCHAR ucRevId;
    322 	UCHAR ucType;		   /* one of ATOM_TONGA_PP_THERMALCONTROLLER_* */
    323 	UCHAR ucI2cLine;		/* as interpreted by DAL I2C */
    324 	UCHAR ucI2cAddress;
    325 	UCHAR ucFanParameters;	/* Fan Control Parameters. */
    326 	UCHAR ucFanMinRPM; 	 /* Fan Minimum RPM (hundreds) -- for display purposes only. */
    327 	UCHAR ucFanMaxRPM; 	 /* Fan Maximum RPM (hundreds) -- for display purposes only. */
    328 	UCHAR ucReserved;
    329 	UCHAR ucFlags;		   /* to be defined */
    330 } ATOM_Tonga_Thermal_Controller;
    331 
    332 typedef struct _ATOM_Tonga_VCE_State_Record {
    333 	UCHAR  ucVCEClockIndex;	/*index into usVCEDependencyTableOffset of 'ATOM_Tonga_MM_Dependency_Table' type */
    334 	UCHAR  ucFlag;		/* 2 bits indicates memory p-states */
    335 	UCHAR  ucSCLKIndex;		/*index into ATOM_Tonga_SCLK_Dependency_Table */
    336 	UCHAR  ucMCLKIndex;		/*index into ATOM_Tonga_MCLK_Dependency_Table */
    337 } ATOM_Tonga_VCE_State_Record;
    338 
    339 typedef struct _ATOM_Tonga_VCE_State_Table {
    340 	UCHAR ucRevId;
    341 	UCHAR ucNumEntries;
    342 	ATOM_Tonga_VCE_State_Record entries[1];
    343 } ATOM_Tonga_VCE_State_Table;
    344 
    345 typedef struct _ATOM_Tonga_PowerTune_Table {
    346 	UCHAR  ucRevId;
    347 	USHORT usTDP;
    348 	USHORT usConfigurableTDP;
    349 	USHORT usTDC;
    350 	USHORT usBatteryPowerLimit;
    351 	USHORT usSmallPowerLimit;
    352 	USHORT usLowCACLeakage;
    353 	USHORT usHighCACLeakage;
    354 	USHORT usMaximumPowerDeliveryLimit;
    355 	USHORT usTjMax;
    356 	USHORT usPowerTuneDataSetID;
    357 	USHORT usEDCLimit;
    358 	USHORT usSoftwareShutdownTemp;
    359 	USHORT usClockStretchAmount;
    360 	USHORT usReserve[2];
    361 } ATOM_Tonga_PowerTune_Table;
    362 
    363 typedef struct _ATOM_Fiji_PowerTune_Table {
    364 	UCHAR  ucRevId;
    365 	USHORT usTDP;
    366 	USHORT usConfigurableTDP;
    367 	USHORT usTDC;
    368 	USHORT usBatteryPowerLimit;
    369 	USHORT usSmallPowerLimit;
    370 	USHORT usLowCACLeakage;
    371 	USHORT usHighCACLeakage;
    372 	USHORT usMaximumPowerDeliveryLimit;
    373 	USHORT usTjMax;  /* For Fiji, this is also usTemperatureLimitEdge; */
    374 	USHORT usPowerTuneDataSetID;
    375 	USHORT usEDCLimit;
    376 	USHORT usSoftwareShutdownTemp;
    377 	USHORT usClockStretchAmount;
    378 	USHORT usTemperatureLimitHotspot;  /*The following are added for Fiji */
    379 	USHORT usTemperatureLimitLiquid1;
    380 	USHORT usTemperatureLimitLiquid2;
    381 	USHORT usTemperatureLimitVrVddc;
    382 	USHORT usTemperatureLimitVrMvdd;
    383 	USHORT usTemperatureLimitPlx;
    384 	UCHAR  ucLiquid1_I2C_address;  /*Liquid */
    385 	UCHAR  ucLiquid2_I2C_address;
    386 	UCHAR  ucLiquid_I2C_Line;
    387 	UCHAR  ucVr_I2C_address;	/*VR */
    388 	UCHAR  ucVr_I2C_Line;
    389 	UCHAR  ucPlx_I2C_address;  /*PLX */
    390 	UCHAR  ucPlx_I2C_Line;
    391 	USHORT usReserved;
    392 } ATOM_Fiji_PowerTune_Table;
    393 
    394 #define ATOM_PPM_A_A    1
    395 #define ATOM_PPM_A_I    2
    396 typedef struct _ATOM_Tonga_PPM_Table {
    397 	UCHAR   ucRevId;
    398 	UCHAR   ucPpmDesign;		  /*A+I or A+A */
    399 	USHORT  usCpuCoreNumber;
    400 	ULONG  ulPlatformTDP;
    401 	ULONG  ulSmallACPlatformTDP;
    402 	ULONG  ulPlatformTDC;
    403 	ULONG  ulSmallACPlatformTDC;
    404 	ULONG  ulApuTDP;
    405 	ULONG  ulDGpuTDP;
    406 	ULONG  ulDGpuUlvPower;
    407 	ULONG  ulTjmax;
    408 } ATOM_Tonga_PPM_Table;
    409 
    410 typedef struct _ATOM_Tonga_Hard_Limit_Record {
    411 	ULONG  ulSCLKLimit;
    412 	ULONG  ulMCLKLimit;
    413 	USHORT  usVddcLimit;
    414 	USHORT  usVddciLimit;
    415 	USHORT  usVddgfxLimit;
    416 } ATOM_Tonga_Hard_Limit_Record;
    417 
    418 typedef struct _ATOM_Tonga_Hard_Limit_Table {
    419 	UCHAR ucRevId;
    420 	UCHAR ucNumEntries;
    421 	ATOM_Tonga_Hard_Limit_Record entries[1];
    422 } ATOM_Tonga_Hard_Limit_Table;
    423 
    424 typedef struct _ATOM_Tonga_GPIO_Table {
    425 	UCHAR  ucRevId;
    426 	UCHAR  ucVRHotTriggeredSclkDpmIndex;		/* If VRHot signal is triggered SCLK will be limited to this DPM level */
    427 	UCHAR  ucReserve[5];
    428 } ATOM_Tonga_GPIO_Table;
    429 
    430 typedef struct _PPTable_Generic_SubTable_Header {
    431 	UCHAR  ucRevId;
    432 } PPTable_Generic_SubTable_Header;
    433 
    434 
    435 #pragma pack(pop)
    436 
    437 
    438 #endif
    439