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    Searched defs:Acc (Results 1 - 10 of 10) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
ExpandReductions.cpp 123 Value *Acc = II->getArgOperand(0);
126 Rdx = getOrderedReduction(Builder, Acc, Vec, getOpcode(ID), RK);
134 Acc, Rdx, "bin.rdx");
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCPreEmitPeephole.cpp 365 // Initially, none of the acc registers are candidates.
374 Register Acc = BBI.getOperand(0).getReg();
375 assert(PPC::ACCRCRegClass.contains(Acc) &&
377 Candidates[Acc - PPC::ACC0] = &BBI;
382 Register Acc = BBI.getOperand(0).getReg();
383 assert(PPC::ACCRCRegClass.contains(Acc) &&
385 if (!Candidates[Acc - PPC::ACC0])
388 InstrsToErase.insert(Candidates[Acc - PPC::ACC0]);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonStoreWidening.cpp 400 unsigned Acc = 0; // Value accumulator.
412 Acc |= Val;
423 if (Acc < 0x10000) {
424 // Create mem[hw] = #Acc
429 int Val = (TotalSize == 2) ? int16_t(Acc) : int(Acc);
441 // Create vreg = A2_tfrsi #Acc; mem[hw] = vreg
446 .addImm(int(Acc));
HexagonConstPropagation.cpp 2997 MachineOperand &Acc = MI.getOperand(1);
2998 RegisterSubReg R1(Acc);
3005 .addReg(R1.Reg, getRegState(Acc), R1.SubReg);
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMParallelDSP.cpp 87 Value *Acc = nullptr;
122 if (Add == Acc)
135 if (Acc)
137 Acc = V;
167 Value *getAccumulator() { return Acc; }
193 LLVM_DEBUG(if (Acc) dbgs() << "Acc in: " << *Acc << "\n")
633 Value *Acc, bool Exchange,
637 Value* Args[] = { WideLd0, WideLd1, Acc };
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  /src/external/apache2/llvm/dist/clang/utils/TableGen/
NeonEmitter.cpp 122 TypeSpec Acc;
125 Acc.push_back(I);
126 Ret.push_back(TypeSpec(Acc));
127 Acc.clear();
129 Acc.push_back(I);
SveEmitter.cpp 1017 TypeSpec Acc;
1019 Acc.push_back(I);
1021 TypeSpecs.push_back(TypeSpec(Acc));
1022 Acc.clear();
  /src/external/apache2/llvm/dist/llvm/lib/Analysis/
MemorySSAUpdater.cpp 610 const MemorySSA::AccessList *Acc = MSSA->getBlockAccesses(BB);
611 if (!Acc)
613 for (const MemoryAccess &MA : *Acc) {
1385 if (MemorySSA::AccessList *Acc = MSSA->getWritableBlockAccesses(BB))
1386 for (MemoryAccess &MA : *Acc)
1392 MemorySSA::AccessList *Acc = MSSA->getWritableBlockAccesses(BB);
1393 if (!Acc)
1395 for (MemoryAccess &MA : llvm::make_early_inc_range(*Acc)) {
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/
GVNHoist.cpp 634 const MemorySSA::AccessList *Acc = MSSA->getBlockAccesses(BB);
635 if (!Acc)
643 for (const MemoryAccess &MA : *Acc)
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
LegalizerHelper.cpp 4304 Register Acc = PartialReductions[0];
4308 {Acc, PartialReductions[Part]});
4310 Acc = MIRBuilder
4311 .buildInstr(ScalarOpc, {DstTy}, {Acc, PartialReductions[Part]})

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