HomeSort by: relevance | last modified time | path
    Searched defs:BASE_INNER (Results 1 - 23 of 23) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dce120/
amdgpu_hw_translate_dce120.c 49 #define BASE_INNER(seg) \
54 BASE_INNER(seg)
amdgpu_hw_factory_dce120.c 58 #define BASE_INNER(seg) \
63 BASE_INNER(seg)
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn10/
amdgpu_hw_translate_dcn10.c 49 #define BASE_INNER(seg) \
54 BASE_INNER(seg)
amdgpu_hw_factory_dcn10.c 55 #define BASE_INNER(seg) \
60 BASE_INNER(seg)
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dmub/src/
amdgpu_dmub_dcn21.c 39 #define BASE_INNER(seg) DMU_BASE__INST0_SEG##seg
amdgpu_dmub_dcn20.c 40 #define BASE_INNER(seg) DCN_BASE__INST0_SEG##seg
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/
dcn20_vmid.h 33 #define BASE_INNER(seg) \
37 BASE_INNER(seg)
dcn20_mmhubbub.h 35 #define BASE_INNER(seg) \
39 BASE_INNER(seg)
dcn20_dwb.h 33 #define BASE_INNER(seg) \
37 BASE_INNER(seg)
amdgpu_dcn20_resource.c 378 #undef BASE_INNER
379 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
381 #define BASE(seg) BASE_INNER(seg)
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn20/
amdgpu_hw_translate_dcn20.c 54 #undef BASE_INNER
55 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
57 #define BASE(seg) BASE_INNER(seg)
amdgpu_hw_factory_dcn20.c 57 #undef BASE_INNER
58 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
60 #define BASE(seg) BASE_INNER(seg)
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/gpio/dcn21/
amdgpu_hw_translate_dcn21.c 54 #undef BASE_INNER
55 #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg
57 #define BASE(seg) BASE_INNER(seg)
amdgpu_hw_factory_dcn21.c 55 #undef BASE_INNER
56 #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg
58 #define BASE(seg) BASE_INNER(seg)
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dce120/
amdgpu_irq_service_dce120.c 99 #define BASE_INNER(seg) \
103 BASE_INNER(seg)
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn10/
amdgpu_irq_service_dcn10.c 180 #define BASE_INNER(seg) \
184 BASE_INNER(seg)
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn20/
amdgpu_irq_service_dcn20.c 180 #undef BASE_INNER
181 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
185 BASE_INNER(seg)
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/irq/dcn21/
amdgpu_irq_service_dcn21.c 176 #undef BASE_INNER
177 #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg
181 BASE_INNER(seg)
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/clk_mgr/dcn20/
amdgpu_dcn20_clk_mgr.c 53 #define BASE_INNER(seg) DCN_BASE__INST0_SEG ## seg
55 #define BASE(seg) BASE_INNER(seg)
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn10/
dcn10_dwb.h 32 #define BASE_INNER(seg) \
36 BASE_INNER(seg)
amdgpu_dcn10_resource.c 170 #define BASE_INNER(seg) \
174 BASE_INNER(seg)
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/
amdgpu_dce120_resource.c 129 #define BASE_INNER(seg) \
140 BASE_INNER(seg)
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/
amdgpu_dcn21_resource.c 289 #undef BASE_INNER
290 #define BASE_INNER(seg) DMU_BASE__INST0_SEG ## seg
292 #define BASE(seg) BASE_INNER(seg)

Completed in 69 milliseconds