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      1 /*	$NetBSD: lpc18xx-cgu.h,v 1.1.1.1 2017/06/15 20:14:23 jmcneill Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 2015 Joachim Eastwood <manabian (at) gmail.com>
      5  *
      6  * This code is released using a dual license strategy: BSD/GPL
      7  * You can choose the licence that better fits your requirements.
      8  *
      9  * Released under the terms of 3-clause BSD License
     10  * Released under the terms of GNU General Public License Version 2.0
     11  *
     12  */
     13 
     14 /* LPC18xx/43xx base clock ids */
     15 #define BASE_SAFE_CLK		0
     16 #define BASE_USB0_CLK		1
     17 #define BASE_PERIPH_CLK		2
     18 #define BASE_USB1_CLK		3
     19 #define BASE_CPU_CLK		4
     20 #define BASE_SPIFI_CLK		5
     21 #define BASE_SPI_CLK		6
     22 #define BASE_PHY_RX_CLK		7
     23 #define BASE_PHY_TX_CLK		8
     24 #define BASE_APB1_CLK		9
     25 #define BASE_APB3_CLK		10
     26 #define BASE_LCD_CLK		11
     27 #define BASE_ADCHS_CLK		12
     28 #define BASE_SDIO_CLK		13
     29 #define BASE_SSP0_CLK		14
     30 #define BASE_SSP1_CLK		15
     31 #define BASE_UART0_CLK		16
     32 #define BASE_UART1_CLK		17
     33 #define BASE_UART2_CLK		18
     34 #define BASE_UART3_CLK		19
     35 #define BASE_OUT_CLK		20
     36 #define BASE_RES1_CLK		21
     37 #define BASE_RES2_CLK		22
     38 #define BASE_RES3_CLK		23
     39 #define BASE_RES4_CLK		24
     40 #define BASE_AUDIO_CLK		25
     41 #define BASE_CGU_OUT0_CLK	26
     42 #define BASE_CGU_OUT1_CLK	27
     43 #define BASE_CLK_MAX		(BASE_CGU_OUT1_CLK + 1)
     44