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    Searched defs:BaseOp1 (Results 1 - 3 of 3) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonSubtarget.cpp 362 MachineOperand *BaseOp1 = HII.getBaseAndOffset(L1, Offset1, Size1);
363 if (BaseOp1 == nullptr || !BaseOp1->isReg() || Size1 >= 32 ||
364 BaseOp0->getReg() != BaseOp1->getReg())
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64InstrInfo.cpp 3092 const MachineOperand &BaseOp1 = *BaseOps1.front();
3094 const MachineInstr &FirstLdSt = *BaseOp1.getParent();
3096 if (BaseOp1.getType() != BaseOp2.getType())
3099 assert((BaseOp1.isReg() || BaseOp1.isFI()) &&
3103 if (BaseOp1.isReg() && BaseOp1.getReg() != BaseOp2.getReg())
3140 if (BaseOp1.isFI()) {
3141 assert((!BaseOp1.isIdenticalTo(BaseOp2) || Offset1 <= Offset2) &&
3146 return shouldClusterFI(MFI, BaseOp1.getIndex(), Offset1, FirstOpc
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
MachinePipeliner.cpp 774 const MachineOperand *BaseOp1, *BaseOp2;
777 if (TII->getMemOperandWithOffset(LdMI, BaseOp1, Offset1,
781 if (BaseOp1->isIdenticalTo(*BaseOp2) &&

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