| /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/MCTargetDesc/ |
| SystemZMCAsmBackend.cpp | 96 unsigned BitSize = getFixupKindInfo(Kind).TargetSize;
97 unsigned Size = (BitSize + 7) / 8;
103 if (BitSize < 64)
104 Value &= ((uint64_t)1 << BitSize) - 1;
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| /src/external/apache2/llvm/dist/llvm/include/llvm/Transforms/IPO/ |
| LowerTypeTests.h | 41 uint64_t BitSize;
53 return Bits.size() == BitSize;
187 /// Allocate BitSize bits in the byte array where Bits contains the bits to
192 void allocate(const std::set<uint64_t> &Bits, uint64_t BitSize,
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| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/AsmPrinter/ |
| DwarfCompileUnit.h | 138 BaseTypeRef(unsigned BitSize, dwarf::TypeKind Encoding) :
139 BitSize(BitSize), Encoding(Encoding) {}
140 unsigned BitSize;
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| DwarfExpression.cpp | 435 unsigned DwarfExpression::getOrCreateBaseType(unsigned BitSize,
441 if (CU.ExprRefedBaseTypes[I].BitSize == BitSize &&
446 CU.ExprRefedBaseTypes.emplace_back(BitSize, Encoding);
574 unsigned BitSize = Op->getArg(0);
584 emitBaseTypeRef(getOrCreateBaseType(BitSize, Encoding));
586 if (PrevConvertOp && PrevConvertOp->getArg(0) < BitSize) {
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| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| IntrinsicLowering.cpp | 56 unsigned BitSize = V->getType()->getScalarSizeInBits();
60 switch(BitSize) {
159 unsigned BitSize = V->getType()->getPrimitiveSizeInBits();
160 unsigned WordSize = (BitSize + 63) / 64;
165 for (unsigned i = 1, ct = 0; i < (BitSize>64 ? 64 : BitSize);
176 if (BitSize > 64) {
179 BitSize -= 64;
191 unsigned BitSize = V->getType()->getPrimitiveSizeInBits();
192 for (unsigned i = 1; i < BitSize; i <<= 1)
[all...] |
| TargetLoweringBase.cpp | 954 unsigned BitSize = VT.getSizeInBits();
956 if (BitSize < 8 || !isPowerOf2_32(BitSize)) {
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| TargetInstrInfo.cpp | 399 unsigned BitSize = TRI->getSubRegIdxSize(SubIdx);
401 if (BitSize % 8)
408 Size = BitSize / 8;
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| /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| ValueTypes.h | 216 unsigned BitSize = getSizeInBits();
217 return BitSize >= 8 && !(BitSize & (BitSize - 1));
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| /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| PPCTargetTransformInfo.cpp | 177 unsigned BitSize = Ty->getPrimitiveSizeInBits();
178 if (BitSize == 0)
208 unsigned BitSize = Ty->getPrimitiveSizeInBits();
209 if (BitSize == 0)
244 unsigned BitSize = Ty->getPrimitiveSizeInBits();
245 if (BitSize == 0)
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| PPCISelLowering.cpp | 16082 unsigned BitSize = Ty->getPrimitiveSizeInBits();
16083 return !(BitSize == 0 || BitSize > 64);
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| /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/ |
| SystemZTargetTransformInfo.cpp | 37 unsigned BitSize = Ty->getPrimitiveSizeInBits();
40 if (BitSize == 0)
43 if (BitSize > 64)
72 unsigned BitSize = Ty->getPrimitiveSizeInBits();
75 if (BitSize == 0)
78 if (BitSize > 64)
94 if (BitSize == 8)
143 if (BitSize <= 32)
154 if (TII->isRxSBGMask(Imm.getZExtValue(), BitSize, Start, End))
192 unsigned BitSize = Ty->getPrimitiveSizeInBits()
[all...] |
| SystemZISelDAGToDAG.cpp | 116 // otherwise. The output value has BitSize bits, although Input may be
121 : Opcode(Op), BitSize(N.getValueSizeInBits()),
122 Mask(allOnes(BitSize)), Input(N), Start(64 - BitSize), End(63),
126 unsigned BitSize;
761 if (TII->isRxSBGMask(Mask, RxSBG.BitSize, RxSBG.Start, RxSBG.End)) {
783 uint64_t BitSize = N.getValueSizeInBits();
784 uint64_t Mask = allOnes(BitSize);
838 if (RxSBG.BitSize != 64 || N.getValueType() != MVT::i64)
869 unsigned BitSize = N.getValueSizeInBits()
[all...] |
| SystemZISelLowering.cpp | 2339 // CCMask says which comparison result is being tested and BitSize is
2342 static unsigned getTestUnderMaskCond(unsigned BitSize, unsigned CCMask,
2480 unsigned BitSize = NewC.Op0.getValueSizeInBits();
2487 (NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask,
2498 (NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask,
2505 NewCCMask = getTestUnderMaskCond(BitSize, NewC.CCMask, MaskVal, CmpVal,
3821 int64_t BitSize = (int64_t)1 << Log2_32_Ceil(NumSignificantBits);
3822 BitSize = std::min(BitSize, OrigBitSize);
3830 // position larger than BitSize remain zero throughout
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/Instrumentation/ |
| ThreadSanitizer.cpp | 265 const unsigned BitSize = ByteSize * 8;
267 std::string BitSizeStr = utostr(BitSize);
311 Type *Ty = Type::getIntNTy(M.getContext(), BitSize);
341 SmallString<32> RMWName("__tsan_atomic" + itostr(BitSize) + NamePart);
749 const unsigned BitSize = ByteSize * 8;
750 Type *Ty = Type::getIntNTy(IRB.getContext(), BitSize);
764 const unsigned BitSize = ByteSize * 8;
765 Type *Ty = Type::getIntNTy(IRB.getContext(), BitSize);
781 const unsigned BitSize = ByteSize * 8;
782 Type *Ty = Type::getIntNTy(IRB.getContext(), BitSize);
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| AArch64TargetTransformInfo.cpp | 67 unsigned BitSize = Ty->getPrimitiveSizeInBits();
68 if (BitSize == 0)
73 if (BitSize & 0x3f)
74 ImmVal = Imm.sext((BitSize + 63) & ~0x3fU);
79 for (unsigned ShiftVal = 0; ShiftVal < BitSize; ShiftVal += 64) {
94 unsigned BitSize = Ty->getPrimitiveSizeInBits();
97 if (BitSize == 0)
147 int NumConstants = (BitSize + 63) / 64;
162 unsigned BitSize = Ty->getPrimitiveSizeInBits();
165 if (BitSize == 0
[all...] |
| AArch64ISelDAGToDAG.cpp | 535 unsigned BitSize = N.getValueSizeInBits();
536 unsigned Val = RHS->getZExtValue() & (BitSize - 1);
|
| AArch64ISelLowering.cpp | 9738 unsigned BitSize = VT.getVectorElementType().getSizeInBits();
9739 APInt Val(BitSize,
9740 Const->getAPIntValue().zextOrTrunc(BitSize).getZExtValue());
11846 unsigned BitSize = Ty->getPrimitiveSizeInBits();
11847 if (BitSize == 0)
11851 if (Val == 0 || AArch64_AM::isLogicalImmediate(Val, BitSize))
11856 if (BitSize == 32)
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| /src/external/apache2/llvm/dist/llvm/include/llvm/DebugInfo/CodeView/ |
| TypeRecord.h | 538 BitFieldRecord(TypeIndex Type, uint8_t BitSize, uint8_t BitOffset)
539 : TypeRecord(TypeRecordKind::BitField), Type(Type), BitSize(BitSize),
544 uint8_t getBitSize() const { return BitSize; }
547 uint8_t BitSize = 0;
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| /src/external/apache2/llvm/dist/llvm/lib/Transforms/IPO/ |
| LowerTypeTests.cpp | 128 if (BitOffset >= BitSize)
135 OS << "offset " << ByteOffset << " size " << BitSize << " align "
173 BSI.BitSize = ((Max - Min) >> BSI.AlignLog2) + 1;
212 uint64_t BitSize, uint64_t &AllocByteOffset,
223 unsigned ReqSize = AllocByteOffset + BitSize;
248 uint64_t BitSize;
609 BAI->BitSize = BSI.BitSize;
618 return BAI1.BitSize > BAI2.BitSize;
[all...] |
| /src/external/apache2/llvm/dist/clang/lib/AST/ |
| ItaniumMangle.cpp | 3432 unsigned BitSize = (T->getNumElements() *
3434 if (BitSize == 64)
3437 assert(BitSize == 128 && "Neon vector type not 64 or 128 bits");
3491 unsigned BitSize =
3493 (void)BitSize; // Silence warning.
3495 assert((BitSize == 64 || BitSize == 128) &&
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| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86TargetTransformInfo.cpp | 4099 unsigned BitSize = Ty->getPrimitiveSizeInBits();
4100 if (BitSize == 0)
4107 if (BitSize > 128)
4115 if (BitSize % 64 != 0)
4116 ImmVal = Imm.sext(alignTo(BitSize, 64));
4121 for (unsigned ShiftVal = 0; ShiftVal < BitSize; ShiftVal += 64) {
4136 unsigned BitSize = Ty->getPrimitiveSizeInBits();
4139 if (BitSize == 0)
4219 int NumConstants = divideCeil(BitSize, 64);
4234 unsigned BitSize = Ty->getPrimitiveSizeInBits()
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| TargetLowering.cpp | 4077 // the bitsize is 1 in which case the false value is the same
4694 unsigned BitSize = DL.getTypeSizeInBits(OpTy);
4695 switch (BitSize) {
4704 MVT::getVT(IntegerType::get(OpTy->getContext(), BitSize), true);
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| SelectionDAGBuilder.cpp | 8106 unsigned BitSize = DL.getTypeSizeInBits(OpTy);
8107 switch (BitSize) {
8115 OpTy = IntegerType::get(Context, BitSize);
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| DAGCombiner.cpp | 8109 unsigned Bitsize = VT.getScalarSizeInBits();
8115 // fold (rot x, c) -> x iff (c % BitSize) == 0
8116 if (isPowerOf2_32(Bitsize) && Bitsize > 1) {
8117 APInt ModuloMask(N1.getScalarValueSizeInBits(), Bitsize - 1);
8122 // fold (rot x, c) -> (rot x, c % BitSize)
8124 auto MatchOutOfRange = [Bitsize, &OutOfRange](ConstantSDNode *C) {
8125 OutOfRange |= C->getAPIntValue().uge(Bitsize);
8130 SDValue Bits = DAG.getConstant(Bitsize, dl, AmtVT);
8154 // fold (rot* (rot* x, c2), c1) -> (rot* x, c1 +- c2 % bitsize)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| AMDGPUISelLowering.cpp | 1673 unsigned BitSize = VT.getSizeInBits();
1675 unsigned DivBits = BitSize - SignBits;
1688 // jq = jq >> (bitsize - 2)
1690 DAG.getConstant(BitSize - 2, DL, VT));
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