1 /* 2 * Copyright 1999, 2000 ATI Technologies Inc., Markham, Ontario, 3 * Precision Insight, Inc., Cedar Park, Texas, and 4 * VA Linux Systems Inc., Fremont, California. 5 * 6 * All Rights Reserved. 7 * 8 * Permission is hereby granted, free of charge, to any person obtaining 9 * a copy of this software and associated documentation files (the 10 * "Software"), to deal in the Software without restriction, including 11 * without limitation on the rights to use, copy, modify, merge, 12 * publish, distribute, sublicense, and/or sell copies of the Software, 13 * and to permit persons to whom the Software is furnished to do so, 14 * subject to the following conditions: 15 * 16 * The above copyright notice and this permission notice (including the 17 * next paragraph) shall be included in all copies or substantial 18 * portions of the Software. 19 * 20 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, 21 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF 22 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND 23 * NON-INFRINGEMENT. IN NO EVENT SHALL ATI, PRECISION INSIGHT, VA LINUX 24 * SYSTEMS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR 25 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 26 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 27 * OTHER DEALINGS IN THE SOFTWARE. 28 */ 29 30 /* 31 * Authors: 32 * Rickard E. Faith <faith (at) valinux.com> 33 * Kevin E. Martin <martin (at) valinux.com> 34 * 35 */ 36 37 #ifndef _R128_H_ 38 #define _R128_H_ 39 40 #include <unistd.h> 41 #include "xf86str.h" 42 43 /* PCI support */ 44 #include "xf86Pci.h" 45 46 /* EXA support */ 47 #ifdef USE_EXA 48 #include "exa.h" 49 #endif 50 51 /* Offscreen & Cursor Support */ 52 #include "xf86fbman.h" 53 #include "xf86Cursor.h" 54 55 /* DDC support */ 56 #include "xf86DDC.h" 57 58 /* Xv support */ 59 #include "xf86xv.h" 60 61 /* DRI support */ 62 #ifndef XF86DRI 63 #undef R128DRI 64 #endif 65 66 #if R128DRI 67 #define _XF86DRI_SERVER_ 68 #include "r128_dripriv.h" 69 #include "dri.h" 70 #endif 71 72 #include "fb.h" 73 #include "xf86Crtc.h" 74 75 #include "compat-api.h" 76 #include "atipcirename.h" 77 78 #include "r128_probe.h" 79 80 #if HAVE_BYTESWAP_H 81 #include <byteswap.h> 82 #elif defined(USE_SYS_ENDIAN_H) 83 #include <sys/endian.h> 84 #else 85 #define bswap_16(value) \ 86 ((((value) & 0xff) << 8) | ((value) >> 8)) 87 88 #define bswap_32(value) \ 89 (((uint32_t)bswap_16((uint16_t)((value) & 0xffff)) << 16) | \ 90 (uint32_t)bswap_16((uint16_t)((value) >> 16))) 91 92 #define bswap_64(value) \ 93 (((uint64_t)bswap_32((uint32_t)((value) & 0xffffffff)) \ 94 << 32) | \ 95 (uint64_t)bswap_32((uint32_t)((value) >> 32))) 96 #endif 97 98 #if X_BYTE_ORDER == X_BIG_ENDIAN 99 #define le32_to_cpu(x) bswap_32(x) 100 #define le16_to_cpu(x) bswap_16(x) 101 #define cpu_to_le32(x) bswap_32(x) 102 #define cpu_to_le16(x) bswap_16(x) 103 #else 104 #define le32_to_cpu(x) (x) 105 #define le16_to_cpu(x) (x) 106 #define cpu_to_le32(x) (x) 107 #define cpu_to_le16(x) (x) 108 #endif 109 110 #define R128_DEBUG 0 /* Turn off debugging output */ 111 #define R128_IDLE_RETRY 32 /* Fall out of idle loops after this count */ 112 #define R128_TIMEOUT 2000000 /* Fall out of wait loops after this count */ 113 #define R128_MMIOSIZE 0x4000 114 115 #define R128_VBIOS_SIZE 0x00010000 116 #define R128_NAME "R128" 117 118 #if R128_DEBUG 119 #include "r128_version.h" 120 121 #endif 122 123 #if R128_DEBUG 124 #define DEBUG(x) x 125 126 #else 127 #define DEBUG(x) 128 129 #endif 130 131 132 /* Other macros */ 133 #define R128_ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0])) 134 #define R128_ALIGN(x,bytes) (((x) + ((bytes) - 1)) & ~((bytes) - 1)) 135 #define R128PTR(pScrn) ((R128InfoPtr)(pScrn)->driverPrivate) 136 137 #define R128_BIOS8(v) ((info->VBIOS[(v)])) 138 #define R128_BIOS16(v) ((info->VBIOS[(v)]) | \ 139 (info->VBIOS[(v) + 1] << 8)) 140 #define R128_BIOS32(v) ((info->VBIOS[(v)]) | \ 141 (info->VBIOS[(v) + 1] << 8) | \ 142 (info->VBIOS[(v) + 2] << 16) | \ 143 (info->VBIOS[(v) + 3] << 24)) 144 145 typedef struct { /* All values in XCLKS */ 146 int ML; /* Memory Read Latency */ 147 int MB; /* Memory Burst Length */ 148 int Trcd; /* RAS to CAS delay */ 149 int Trp; /* RAS percentage */ 150 int Twr; /* Write Recovery */ 151 int CL; /* CAS Latency */ 152 int Tr2w; /* Read to Write Delay */ 153 int Rloop; /* Loop Latency */ 154 int Rloop_fudge; /* Add to ML to get Rloop */ 155 const char *name; 156 } R128RAMRec, *R128RAMPtr; 157 158 typedef struct { 159 /* Common registers */ 160 uint32_t ovr_clr; 161 uint32_t ovr_wid_left_right; 162 uint32_t ovr_wid_top_bottom; 163 uint32_t ov0_scale_cntl; 164 uint32_t mpp_tb_config; 165 uint32_t mpp_gp_config; 166 uint32_t subpic_cntl; 167 uint32_t viph_control; 168 uint32_t i2c_cntl_1; 169 uint32_t gen_int_cntl; 170 uint32_t cap0_trig_cntl; 171 uint32_t cap1_trig_cntl; 172 uint32_t bus_cntl; 173 uint32_t config_cntl; 174 175 /* Other registers to save for VT switches */ 176 uint32_t dp_datatype; 177 uint32_t gen_reset_cntl; 178 uint32_t clock_cntl_index; 179 uint32_t amcgpio_en_reg; 180 uint32_t amcgpio_mask; 181 182 /* CRTC registers */ 183 uint32_t crtc_gen_cntl; 184 uint32_t crtc_ext_cntl; 185 uint32_t dac_cntl; 186 uint32_t crtc_h_total_disp; 187 uint32_t crtc_h_sync_strt_wid; 188 uint32_t crtc_v_total_disp; 189 uint32_t crtc_v_sync_strt_wid; 190 uint32_t crtc_offset; 191 uint32_t crtc_offset_cntl; 192 uint32_t crtc_pitch; 193 194 /* CRTC2 registers */ 195 uint32_t crtc2_gen_cntl; 196 uint32_t crtc2_h_total_disp; 197 uint32_t crtc2_h_sync_strt_wid; 198 uint32_t crtc2_v_total_disp; 199 uint32_t crtc2_v_sync_strt_wid; 200 uint32_t crtc2_offset; 201 uint32_t crtc2_offset_cntl; 202 uint32_t crtc2_pitch; 203 204 /* Flat panel registers */ 205 uint32_t fp_crtc_h_total_disp; 206 uint32_t fp_crtc_v_total_disp; 207 uint32_t fp_gen_cntl; 208 uint32_t fp_h_sync_strt_wid; 209 uint32_t fp_horz_stretch; 210 uint32_t fp_panel_cntl; 211 uint32_t fp_v_sync_strt_wid; 212 uint32_t fp_vert_stretch; 213 uint32_t lvds_gen_cntl; 214 uint32_t tmds_crc; 215 uint32_t tmds_transmitter_cntl; 216 217 /* Computed values for PLL */ 218 uint32_t dot_clock_freq; 219 uint32_t pll_output_freq; 220 int feedback_div; 221 int post_div; 222 223 /* PLL registers */ 224 uint32_t ppll_ref_div; 225 uint32_t ppll_div_3; 226 uint32_t ppll_div_0; 227 uint32_t htotal_cntl; 228 229 /* Computed values for PLL2 */ 230 uint32_t dot_clock_freq_2; 231 uint32_t pll_output_freq_2; 232 int feedback_div_2; 233 int post_div_2; 234 235 /* PLL2 registers */ 236 uint32_t p2pll_ref_div; 237 uint32_t p2pll_div_0; 238 uint32_t htotal_cntl2; 239 240 /* DDA register */ 241 uint32_t dda_config; 242 uint32_t dda_on_off; 243 244 /* DDA2 register */ 245 uint32_t dda2_config; 246 uint32_t dda2_on_off; 247 248 /* Pallet */ 249 Bool palette_valid; 250 uint32_t palette[256]; 251 uint32_t palette2[256]; 252 } R128SaveRec, *R128SavePtr; 253 254 typedef struct { 255 uint16_t reference_freq; 256 uint16_t reference_div; 257 unsigned min_pll_freq; 258 unsigned max_pll_freq; 259 uint16_t xclk; 260 } R128PLLRec, *R128PLLPtr; 261 262 typedef struct { 263 int bitsPerPixel; 264 int depth; 265 int displayWidth; 266 int pixel_code; 267 int pixel_bytes; 268 DisplayModePtr mode; 269 } R128FBLayout; 270 271 #ifdef USE_EXA 272 struct r128_2d_state { 273 Bool in_use; 274 Bool composite_setup; 275 uint32_t dst_pitch_offset; 276 uint32_t src_pitch_offset; 277 uint32_t dp_gui_master_cntl; 278 uint32_t dp_cntl; 279 uint32_t dp_write_mask; 280 uint32_t dp_brush_frgd_clr; 281 uint32_t dp_brush_bkgd_clr; 282 uint32_t dp_src_frgd_clr; 283 uint32_t dp_src_bkgd_clr; 284 uint32_t default_sc_bottom_right; 285 #if defined(R128DRI) && defined(RENDER) 286 Bool has_mask; 287 int x_offset; 288 int y_offset; 289 int widths[2]; 290 int heights[2]; 291 Bool is_transform[2]; 292 PictTransform *transform[2]; 293 PixmapPtr src_pix; 294 PixmapPtr msk_pix; 295 #endif 296 }; 297 #endif 298 299 typedef struct { 300 EntityInfoPtr pEnt; 301 pciVideoPtr PciInfo; 302 #ifndef XSERVER_LIBPCIACCESS 303 PCITAG PciTag; 304 #endif 305 int Chipset; 306 307 #ifndef AVOID_FBDEV 308 Bool FBDev; 309 #endif 310 311 #ifdef HAVE_DEV_WSCONS_WSCONSIO_H 312 Bool HaveWSDisplay; 313 Bool HaveBacklightControl; 314 #endif 315 316 unsigned long LinearAddr; /* Frame buffer physical address */ 317 unsigned long MMIOAddr; /* MMIO region physical address */ 318 unsigned long BIOSAddr; /* BIOS physical address */ 319 320 void *MMIO; /* Map of MMIO region */ 321 void *FB; /* Map of frame buffer */ 322 uint8_t *VBIOS; /* Video BIOS for mode validation on FPs */ 323 int FPBIOSstart; /* Start of the flat panel info */ 324 325 uint32_t MemCntl; 326 uint32_t BusCntl; 327 unsigned long FbMapSize; /* Size of frame buffer, in bytes */ 328 Bool HasPanelRegs; /* Current chip can connect to a FP */ 329 330 R128PLLRec pll; 331 R128RAMPtr ram; 332 333 R128SaveRec SavedReg; /* Original (text) mode */ 334 R128SaveRec ModeReg; /* Current mode */ 335 Bool (*CloseScreen)(ScreenPtr pScreen); 336 void (*BlockHandler)(BLOCKHANDLER_ARGS_DECL); 337 338 Bool PaletteSavedOnVT; /* Palette saved on last VT switch */ 339 340 Bool noAccel; 341 Bool accelOn; 342 Bool useEXA; 343 Bool RenderAccel; 344 #ifdef USE_EXA 345 ExaDriverPtr ExaDriver; 346 XF86ModReqInfo exaReq; 347 struct r128_2d_state state_2d; 348 #endif 349 350 int fifo_slots; /* Free slots in the FIFO (64 max) */ 351 int pix24bpp; /* Depth of pixmap for 24bpp framebuffer */ 352 Bool dac6bits; /* Use 6 bit DAC? */ 353 Bool swCursor; 354 355 /* Computed values for Rage 128 */ 356 int pitch; 357 int datatype; 358 uint32_t dp_gui_master_cntl; 359 360 /* Saved values for ScreenToScreenCopy */ 361 int xdir; 362 int ydir; 363 364 /* ScanlineScreenToScreenColorExpand support */ 365 unsigned char *scratch_buffer[1]; 366 unsigned char *scratch_save; 367 int scanline_x; 368 int scanline_y; 369 int scanline_w; 370 int scanline_h; 371 #ifdef R128DRI 372 int scanline_hpass; 373 int scanline_x1clip; 374 int scanline_x2clip; 375 int scanline_rop; 376 int scanline_fg; 377 int scanline_bg; 378 #endif /* R128DRI */ 379 int scanline_words; 380 int scanline_direct; 381 int scanline_bpp; /* Only used for ImageWrite */ 382 383 R128FBLayout CurrentLayout; 384 #ifdef R128DRI 385 Bool directRenderingEnabled; 386 DRIInfoPtr pDRIInfo; 387 int drmFD; 388 drm_context_t drmCtx; 389 390 drm_handle_t fbHandle; 391 392 drmSize registerSize; 393 drm_handle_t registerHandle; 394 395 Bool IsPCI; /* Current card is a PCI card */ 396 drmSize pciSize; 397 drm_handle_t pciMemHandle; 398 drmAddress PCI; /* Map */ 399 400 Bool allowPageFlip; /* Enable 3d page flipping */ 401 Bool have3DWindows; /* Are there any 3d clients? */ 402 int drmMinor; 403 404 drmSize agpSize; 405 drm_handle_t agpMemHandle; /* Handle from drmAgpAlloc */ 406 unsigned long agpOffset; 407 drmAddress AGP; /* Map */ 408 int agpMode; 409 410 Bool CCEInUse; /* CCE is currently active */ 411 int CCEMode; /* CCE mode that server/clients use */ 412 int CCEFifoSize; /* Size of the CCE command FIFO */ 413 Bool CCESecure; /* CCE security enabled */ 414 int CCEusecTimeout; /* CCE timeout in usecs */ 415 416 /* CCE ring buffer data */ 417 unsigned long ringStart; /* Offset into AGP space */ 418 drm_handle_t ringHandle; /* Handle from drmAddMap */ 419 drmSize ringMapSize; /* Size of map */ 420 int ringSize; /* Size of ring (in MB) */ 421 drmAddress ring; /* Map */ 422 int ringSizeLog2QW; 423 424 unsigned long ringReadOffset; /* Offset into AGP space */ 425 drm_handle_t ringReadPtrHandle;/* Handle from drmAddMap */ 426 drmSize ringReadMapSize; /* Size of map */ 427 drmAddress ringReadPtr; /* Map */ 428 429 /* CCE vertex/indirect buffer data */ 430 unsigned long bufStart; /* Offset into AGP space */ 431 drm_handle_t bufHandle; /* Handle from drmAddMap */ 432 drmSize bufMapSize; /* Size of map */ 433 int bufSize; /* Size of buffers (in MB) */ 434 drmAddress buf; /* Map */ 435 int bufNumBufs; /* Number of buffers */ 436 drmBufMapPtr buffers; /* Buffer map */ 437 438 /* CCE AGP Texture data */ 439 unsigned long agpTexStart; /* Offset into AGP space */ 440 drm_handle_t agpTexHandle; /* Handle from drmAddMap */ 441 drmSize agpTexMapSize; /* Size of map */ 442 int agpTexSize; /* Size of AGP tex space (in MB) */ 443 drmAddress agpTex; /* Map */ 444 int log2AGPTexGran; 445 446 /* CCE 2D acceleration */ 447 drmBufPtr indirectBuffer; 448 int indirectStart; 449 450 /* DRI screen private data */ 451 int fbX; 452 int fbY; 453 int backX; 454 int backY; 455 int depthX; 456 int depthY; 457 458 int frontOffset; 459 int frontPitch; 460 int backOffset; 461 int backPitch; 462 int depthOffset; 463 int depthPitch; 464 int spanOffset; 465 int textureOffset; 466 int textureSize; 467 int log2TexGran; 468 469 /* Saved scissor values */ 470 uint32_t sc_left; 471 uint32_t sc_right; 472 uint32_t sc_top; 473 uint32_t sc_bottom; 474 475 uint32_t re_top_left; 476 uint32_t re_width_height; 477 478 uint32_t aux_sc_cntl; 479 480 int irq; 481 uint32_t gen_int_cntl; 482 483 Bool DMAForXv; 484 #endif 485 486 XF86VideoAdaptorPtr adaptor; 487 void (*VideoTimerCallback)(ScrnInfoPtr, Time); 488 int videoKey; 489 Bool showCache; 490 OptionInfoPtr Options; 491 492 Bool isDFP; 493 Bool isPro2; 494 Bool SwitchingMode; 495 Bool DDC; 496 497 Bool VGAAccess; 498 } R128InfoRec, *R128InfoPtr; 499 500 #define R128WaitForFifo(pScrn, entries) \ 501 do { \ 502 if (info->fifo_slots < entries) R128WaitForFifoFunction(pScrn, entries); \ 503 info->fifo_slots -= entries; \ 504 } while (0) 505 506 /* Compute n/d with rounding. */ 507 static inline int R128Div(int n, int d) 508 { 509 return (n + (d / 2)) / d; 510 } 511 512 extern int getR128EntityIndex(void); 513 514 extern R128EntPtr R128EntPriv(ScrnInfoPtr pScrn); 515 extern void R128WaitForFifoFunction(ScrnInfoPtr pScrn, int entries); 516 extern void R128WaitForIdle(ScrnInfoPtr pScrn); 517 extern void R128EngineReset(ScrnInfoPtr pScrn); 518 extern void R128EngineFlush(ScrnInfoPtr pScrn); 519 520 extern unsigned R128INPLL(ScrnInfoPtr pScrn, int addr); 521 extern void R128WaitForVerticalSync(ScrnInfoPtr pScrn); 522 523 extern void R128EngineInit(ScrnInfoPtr pScrn); 524 extern Bool R128CursorInit(ScreenPtr pScreen); 525 526 extern int R128MinBits(int val); 527 extern xf86OutputPtr R128FirstOutput(xf86CrtcPtr crtc); 528 529 extern void R128InitVideo(ScreenPtr pScreen); 530 531 extern void R128InitCommonRegisters(R128SavePtr save, R128InfoPtr info); 532 extern void R128InitRMXRegisters(R128SavePtr orig, R128SavePtr save, xf86OutputPtr output, DisplayModePtr mode); 533 extern void R128InitFPRegisters(R128SavePtr orig, R128SavePtr save, xf86OutputPtr output); 534 extern void R128InitLVDSRegisters(R128SavePtr orig, R128SavePtr save, xf86OutputPtr output); 535 extern void R128RestoreCommonRegisters(ScrnInfoPtr pScrn, R128SavePtr restore); 536 extern void R128RestoreDACRegisters(ScrnInfoPtr pScrn, R128SavePtr restore); 537 extern void R128RestoreRMXRegisters(ScrnInfoPtr pScrn, R128SavePtr restore); 538 extern void R128RestoreFPRegisters(ScrnInfoPtr pScrn, R128SavePtr restore); 539 extern void R128RestoreLVDSRegisters(ScrnInfoPtr pScrn, R128SavePtr restore); 540 extern void R128RestoreCrtcRegisters(ScrnInfoPtr pScrn, R128SavePtr restore); 541 extern void R128RestorePLLRegisters(ScrnInfoPtr pScrn, R128SavePtr restore); 542 extern void R128RestoreDDARegisters(ScrnInfoPtr pScrn, R128SavePtr restore); 543 extern void R128RestoreCrtc2Registers(ScrnInfoPtr pScrn, R128SavePtr restore); 544 extern void R128RestorePLL2Registers(ScrnInfoPtr pScrn, R128SavePtr restore); 545 extern void R128RestoreDDA2Registers(ScrnInfoPtr pScrn, R128SavePtr restore); 546 547 extern void r128_crtc_set_cursor_colors(xf86CrtcPtr crtc, int bg, int fg); 548 extern void r128_crtc_set_cursor_position(xf86CrtcPtr crtc, int x, int y); 549 extern void r128_crtc_show_cursor(xf86CrtcPtr crtc); 550 extern void r128_crtc_hide_cursor(xf86CrtcPtr crtc); 551 extern void r128_crtc_load_cursor_image(xf86CrtcPtr crtc, unsigned char *src); 552 553 extern uint32_t R128AllocateMemory(ScrnInfoPtr pScrn, void **mem_struct, int size, int align, Bool need_accel); 554 extern Bool R128SetupConnectors(ScrnInfoPtr pScrn); 555 extern Bool R128AllocateControllers(ScrnInfoPtr pScrn); 556 extern void R128GetPanelInfoFromBIOS(xf86OutputPtr output); 557 extern void R128Blank(ScrnInfoPtr pScrn); 558 extern void R128Unblank(ScrnInfoPtr pScrn); 559 extern void R128DPMSSetOn(xf86OutputPtr output); 560 extern void R128DPMSSetOff(xf86OutputPtr output); 561 extern ModeStatus R128DoValidMode(xf86OutputPtr output, DisplayModePtr mode, int flags); 562 extern DisplayModePtr R128ProbeOutputModes(xf86OutputPtr output); 563 564 #ifdef R128DRI 565 extern Bool R128DRIScreenInit(ScreenPtr pScreen); 566 extern void R128DRICloseScreen(ScreenPtr pScreen); 567 extern Bool R128DRIFinishScreenInit(ScreenPtr pScreen); 568 569 #define R128CCE_START(pScrn, info) \ 570 do { \ 571 int _ret = drmCommandNone(info->drmFD, DRM_R128_CCE_START); \ 572 if (_ret) { \ 573 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \ 574 "%s: CCE start %d\n", __FUNCTION__, _ret); \ 575 } \ 576 } while (0) 577 578 #define R128CCE_STOP(pScrn, info) \ 579 do { \ 580 int _ret = R128CCEStop(pScrn); \ 581 if (_ret) { \ 582 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \ 583 "%s: CCE stop %d\n", __FUNCTION__, _ret); \ 584 } \ 585 } while (0) 586 587 #define R128CCE_RESET(pScrn, info) \ 588 do { \ 589 if (info->directRenderingEnabled \ 590 && R128CCE_USE_RING_BUFFER(info->CCEMode)) { \ 591 int _ret = drmCommandNone(info->drmFD, DRM_R128_CCE_RESET); \ 592 if (_ret) { \ 593 xf86DrvMsg(pScrn->scrnIndex, X_ERROR, \ 594 "%s: CCE reset %d\n", __FUNCTION__, _ret); \ 595 } \ 596 } \ 597 } while (0) 598 599 extern drmBufPtr R128CCEGetBuffer(ScrnInfoPtr pScrn); 600 #endif 601 602 extern void R128CCEFlushIndirect(ScrnInfoPtr pScrn, int discard); 603 extern void R128CCEReleaseIndirect(ScrnInfoPtr pScrn); 604 extern void R128CCEWaitForIdle(ScrnInfoPtr pScrn); 605 extern int R128CCEStop(ScrnInfoPtr pScrn); 606 extern void R128CopySwap(uint8_t *dst, uint8_t *src, unsigned int size, int swap); 607 608 #ifdef USE_EXA 609 extern Bool R128EXAInit(ScreenPtr pScreen, int total); 610 extern Bool R128GetDatatypeBpp(int bpp, uint32_t *type); 611 extern Bool R128GetPixmapOffsetPitch(PixmapPtr pPix, uint32_t *pitch_offset); 612 extern void R128DoPrepareCopy(ScrnInfoPtr pScrn, uint32_t src_pitch_offset, 613 uint32_t dst_pitch_offset, uint32_t datatype, int alu, Pixel planemask); 614 extern void R128Done(PixmapPtr pPixmap); 615 616 #ifdef R128DRI 617 extern void EmitCCE2DState(ScrnInfoPtr pScrn); 618 #endif 619 620 #ifdef RENDER 621 extern Bool R128CCECheckComposite(int op, 622 PicturePtr pSrcPicture, 623 PicturePtr pMaskPicture, 624 PicturePtr pDstPicture); 625 extern Bool R128CCEPrepareComposite(int op, PicturePtr pSrcPicture, 626 PicturePtr pMaskPicture, 627 PicturePtr pDstPicture, 628 PixmapPtr pSrc, 629 PixmapPtr pMask, 630 PixmapPtr pDst); 631 extern void R128CCEComposite(PixmapPtr pDst, 632 int srcX, int srcY, 633 int maskX, int maskY, 634 int dstX, int dstY, 635 int w, int h); 636 #define R128CCEDoneComposite R128Done 637 #endif 638 #endif 639 640 641 #define CCE_PACKET0( reg, n ) \ 642 (R128_CCE_PACKET0 | ((n) << 16) | ((reg) >> 2)) 643 #define CCE_PACKET1( reg0, reg1 ) \ 644 (R128_CCE_PACKET1 | (((reg1) >> 2) << 11) | ((reg0) >> 2)) 645 #define CCE_PACKET2() \ 646 (R128_CCE_PACKET2) 647 #define CCE_PACKET3( pkt, n ) \ 648 (R128_CCE_PACKET3 | (pkt) | ((n) << 16)) 649 650 651 #define R128_VERBOSE 0 652 653 #define RING_LOCALS uint32_t *__head; int __count; 654 655 #define R128CCE_REFRESH(pScrn, info) \ 656 do { \ 657 if ( R128_VERBOSE ) { \ 658 xf86DrvMsg( pScrn->scrnIndex, X_INFO, "REFRESH( %d ) in %s\n", \ 659 !info->CCEInUse , __FUNCTION__ ); \ 660 } \ 661 if ( !info->CCEInUse ) { \ 662 R128CCEWaitForIdle(pScrn); \ 663 BEGIN_RING( 6 ); \ 664 OUT_RING_REG( R128_RE_TOP_LEFT, info->re_top_left ); \ 665 OUT_RING_REG( R128_RE_WIDTH_HEIGHT, info->re_width_height ); \ 666 OUT_RING_REG( R128_AUX_SC_CNTL, info->aux_sc_cntl ); \ 667 ADVANCE_RING(); \ 668 info->CCEInUse = TRUE; \ 669 } \ 670 } while (0) 671 672 #define BEGIN_RING( n ) do { \ 673 if ( R128_VERBOSE ) { \ 674 xf86DrvMsg( pScrn->scrnIndex, X_INFO, \ 675 "BEGIN_RING( %d ) in %s\n", n, __FUNCTION__ ); \ 676 } \ 677 if ( !info->indirectBuffer ) { \ 678 info->indirectBuffer = R128CCEGetBuffer( pScrn ); \ 679 info->indirectStart = 0; \ 680 } else if ( (info->indirectBuffer->used + 4*(n)) > \ 681 info->indirectBuffer->total ) { \ 682 R128CCEFlushIndirect( pScrn, 1 ); \ 683 } \ 684 __head = (pointer)((char *)info->indirectBuffer->address + \ 685 info->indirectBuffer->used); \ 686 __count = 0; \ 687 } while (0) 688 689 #define ADVANCE_RING() do { \ 690 if ( R128_VERBOSE ) { \ 691 xf86DrvMsg( pScrn->scrnIndex, X_INFO, \ 692 "ADVANCE_RING() used: %d+%d=%d/%d\n", \ 693 info->indirectBuffer->used - info->indirectStart, \ 694 __count * (int)sizeof(uint32_t), \ 695 info->indirectBuffer->used - info->indirectStart + \ 696 __count * (int)sizeof(uint32_t), \ 697 info->indirectBuffer->total - info->indirectStart ); \ 698 } \ 699 info->indirectBuffer->used += __count * (int)sizeof(uint32_t); \ 700 } while (0) 701 702 #define OUT_RING( x ) do { \ 703 if ( R128_VERBOSE ) { \ 704 xf86DrvMsg( pScrn->scrnIndex, X_INFO, \ 705 " OUT_RING( 0x%08x )\n", (unsigned int)(x) ); \ 706 } \ 707 MMIO_OUT32(&__head[__count++], 0, (x)); \ 708 } while (0) 709 710 #define OUT_RING_REG( reg, val ) \ 711 do { \ 712 OUT_RING( CCE_PACKET0( reg, 0 ) ); \ 713 OUT_RING( val ); \ 714 } while (0) 715 716 #define FLUSH_RING() \ 717 do { \ 718 if ( R128_VERBOSE ) \ 719 xf86DrvMsg( pScrn->scrnIndex, X_INFO, \ 720 "FLUSH_RING in %s\n", __FUNCTION__ ); \ 721 if ( info->indirectBuffer ) { \ 722 R128CCEFlushIndirect( pScrn, 0 ); \ 723 } \ 724 } while (0) 725 726 #endif 727
Indexes created Fri Jul 24 00:25:35 UTC 2026