1 /* $NetBSD: grph_object_id.h,v 1.2 2021/12/18 23:45:07 riastradh Exp $ */ 2 3 /* 4 * Copyright 2012-15 Advanced Micro Devices, Inc. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a 7 * copy of this software and associated documentation files (the "Software"), 8 * to deal in the Software without restriction, including without limitation 9 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 10 * and/or sell copies of the Software, and to permit persons to whom the 11 * Software is furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 19 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 20 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 21 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 22 * OTHER DEALINGS IN THE SOFTWARE. 23 * 24 * Authors: AMD 25 * 26 */ 27 28 #ifndef __DAL_GRPH_OBJECT_ID_H__ 29 #define __DAL_GRPH_OBJECT_ID_H__ 30 31 /* Types of graphics objects */ 32 enum object_type { 33 OBJECT_TYPE_UNKNOWN = 0, 34 35 /* Direct ATOM BIOS translation */ 36 OBJECT_TYPE_GPU, 37 OBJECT_TYPE_ENCODER, 38 OBJECT_TYPE_CONNECTOR, 39 OBJECT_TYPE_ROUTER, 40 OBJECT_TYPE_GENERIC, 41 42 /* Driver specific */ 43 OBJECT_TYPE_AUDIO, 44 OBJECT_TYPE_CONTROLLER, 45 OBJECT_TYPE_CLOCK_SOURCE, 46 OBJECT_TYPE_ENGINE, 47 48 OBJECT_TYPE_COUNT 49 }; 50 51 /* Enumeration inside one type of graphics objects */ 52 enum object_enum_id { 53 ENUM_ID_UNKNOWN = 0, 54 ENUM_ID_1, 55 ENUM_ID_2, 56 ENUM_ID_3, 57 ENUM_ID_4, 58 ENUM_ID_5, 59 ENUM_ID_6, 60 ENUM_ID_7, 61 62 ENUM_ID_COUNT 63 }; 64 65 /* Generic object ids */ 66 enum generic_id { 67 GENERIC_ID_UNKNOWN = 0, 68 GENERIC_ID_MXM_OPM, 69 GENERIC_ID_GLSYNC, 70 GENERIC_ID_STEREO, 71 72 GENERIC_ID_COUNT 73 }; 74 75 /* Controller object ids */ 76 enum controller_id { 77 CONTROLLER_ID_UNDEFINED = 0, 78 CONTROLLER_ID_D0, 79 CONTROLLER_ID_D1, 80 CONTROLLER_ID_D2, 81 CONTROLLER_ID_D3, 82 CONTROLLER_ID_D4, 83 CONTROLLER_ID_D5, 84 CONTROLLER_ID_UNDERLAY0, 85 CONTROLLER_ID_MAX = CONTROLLER_ID_UNDERLAY0 86 }; 87 88 #define IS_UNDERLAY_CONTROLLER(ctrlr_id) (ctrlr_id >= CONTROLLER_ID_UNDERLAY0) 89 90 /* 91 * ClockSource object ids. 92 * We maintain the order matching (more or less) ATOM BIOS 93 * to improve optimized acquire 94 */ 95 enum clock_source_id { 96 CLOCK_SOURCE_ID_UNDEFINED = 0, 97 CLOCK_SOURCE_ID_PLL0, 98 CLOCK_SOURCE_ID_PLL1, 99 CLOCK_SOURCE_ID_PLL2, 100 CLOCK_SOURCE_ID_EXTERNAL, /* ID (Phy) ref. clk. for DP */ 101 CLOCK_SOURCE_ID_DCPLL, 102 CLOCK_SOURCE_ID_DFS, /* DENTIST */ 103 CLOCK_SOURCE_ID_VCE, /* VCE does not need a real PLL */ 104 /* Used to distinguish between programming pixel clock and ID (Phy) clock */ 105 CLOCK_SOURCE_ID_DP_DTO, 106 107 CLOCK_SOURCE_COMBO_PHY_PLL0, /*combo PHY PLL defines (DC 11.2 and up)*/ 108 CLOCK_SOURCE_COMBO_PHY_PLL1, 109 CLOCK_SOURCE_COMBO_PHY_PLL2, 110 CLOCK_SOURCE_COMBO_PHY_PLL3, 111 CLOCK_SOURCE_COMBO_PHY_PLL4, 112 CLOCK_SOURCE_COMBO_PHY_PLL5, 113 CLOCK_SOURCE_COMBO_DISPLAY_PLL0 114 }; 115 116 /* Encoder object ids */ 117 enum encoder_id { 118 ENCODER_ID_UNKNOWN = 0, 119 120 /* Radeon Class Display Hardware */ 121 ENCODER_ID_INTERNAL_LVDS, 122 ENCODER_ID_INTERNAL_TMDS1, 123 ENCODER_ID_INTERNAL_TMDS2, 124 ENCODER_ID_INTERNAL_DAC1, 125 ENCODER_ID_INTERNAL_DAC2, /* TV/CV DAC */ 126 127 /* External Third Party Encoders */ 128 ENCODER_ID_INTERNAL_LVTM1, /* not used for Radeon */ 129 ENCODER_ID_INTERNAL_HDMI, 130 131 /* Kaledisope (KLDSCP) Class Display Hardware */ 132 ENCODER_ID_INTERNAL_KLDSCP_TMDS1, 133 ENCODER_ID_INTERNAL_KLDSCP_DAC1, 134 ENCODER_ID_INTERNAL_KLDSCP_DAC2, /* Shared with CV/TV and CRT */ 135 /* External TMDS (dual link) */ 136 ENCODER_ID_EXTERNAL_MVPU_FPGA, /* MVPU FPGA chip */ 137 ENCODER_ID_INTERNAL_DDI, 138 ENCODER_ID_INTERNAL_UNIPHY, 139 ENCODER_ID_INTERNAL_KLDSCP_LVTMA, 140 ENCODER_ID_INTERNAL_UNIPHY1, 141 ENCODER_ID_INTERNAL_UNIPHY2, 142 ENCODER_ID_EXTERNAL_NUTMEG, 143 ENCODER_ID_EXTERNAL_TRAVIS, 144 145 ENCODER_ID_INTERNAL_WIRELESS, /* Internal wireless display encoder */ 146 ENCODER_ID_INTERNAL_UNIPHY3, 147 ENCODER_ID_INTERNAL_VIRTUAL, 148 }; 149 150 /* Connector object ids */ 151 enum connector_id { 152 CONNECTOR_ID_UNKNOWN = 0, 153 CONNECTOR_ID_SINGLE_LINK_DVII = 1, 154 CONNECTOR_ID_DUAL_LINK_DVII = 2, 155 CONNECTOR_ID_SINGLE_LINK_DVID = 3, 156 CONNECTOR_ID_DUAL_LINK_DVID = 4, 157 CONNECTOR_ID_VGA = 5, 158 CONNECTOR_ID_HDMI_TYPE_A = 12, 159 CONNECTOR_ID_LVDS = 14, 160 CONNECTOR_ID_PCIE = 16, 161 CONNECTOR_ID_HARDCODE_DVI = 18, 162 CONNECTOR_ID_DISPLAY_PORT = 19, 163 CONNECTOR_ID_EDP = 20, 164 CONNECTOR_ID_MXM = 21, 165 CONNECTOR_ID_WIRELESS = 22, 166 CONNECTOR_ID_MIRACAST = 23, 167 168 CONNECTOR_ID_VIRTUAL = 100 169 }; 170 171 /* Audio object ids */ 172 enum audio_id { 173 AUDIO_ID_UNKNOWN = 0, 174 AUDIO_ID_INTERNAL_AZALIA 175 }; 176 177 /* Engine object ids */ 178 enum engine_id { 179 ENGINE_ID_DIGA, 180 ENGINE_ID_DIGB, 181 ENGINE_ID_DIGC, 182 ENGINE_ID_DIGD, 183 ENGINE_ID_DIGE, 184 ENGINE_ID_DIGF, 185 ENGINE_ID_DIGG, 186 ENGINE_ID_DACA, 187 ENGINE_ID_DACB, 188 ENGINE_ID_VCE, /* wireless display pseudo-encoder */ 189 ENGINE_ID_VIRTUAL, 190 191 ENGINE_ID_COUNT, 192 ENGINE_ID_UNKNOWN = (-1L) 193 }; 194 195 enum transmitter_color_depth { 196 TRANSMITTER_COLOR_DEPTH_24 = 0, /* 8 bits */ 197 TRANSMITTER_COLOR_DEPTH_30, /* 10 bits */ 198 TRANSMITTER_COLOR_DEPTH_36, /* 12 bits */ 199 TRANSMITTER_COLOR_DEPTH_48 /* 16 bits */ 200 }; 201 202 enum dp_alt_mode { 203 DP_Alt_mode__Unknown = 0, 204 DP_Alt_mode__Connect, 205 DP_Alt_mode__NoConnect, 206 }; 207 /* 208 ***************************************************************************** 209 * graphics_object_id struct 210 * 211 * graphics_object_id is a very simple struct wrapping 32bit Graphics 212 * Object identication 213 * 214 * This struct should stay very simple 215 * No dependencies at all (no includes) 216 * No debug messages or asserts 217 * No #ifndef and preprocessor directives 218 * No grow in space (no more data member) 219 ***************************************************************************** 220 */ 221 222 struct graphics_object_id { 223 uint32_t id:8; 224 uint32_t enum_id:4; 225 uint32_t type:4; 226 uint32_t reserved:16; /* for padding. total size should be u32 */ 227 }; 228 229 /* some simple functions for convenient graphics_object_id handle */ 230 231 static inline struct graphics_object_id dal_graphics_object_id_init( 232 uint32_t id, 233 enum object_enum_id enum_id, 234 enum object_type type) 235 { 236 struct graphics_object_id result = { 237 id, enum_id, type, 0 238 }; 239 240 return result; 241 } 242 243 /* Based on internal data members memory layout */ 244 static inline uint32_t dal_graphics_object_id_to_uint( 245 struct graphics_object_id id) 246 { 247 return id.id + (id.enum_id << 0x8) + (id.type << 0xc); 248 } 249 250 static inline enum controller_id dal_graphics_object_id_get_controller_id( 251 struct graphics_object_id id) 252 { 253 if (id.type == OBJECT_TYPE_CONTROLLER) 254 return (enum controller_id) id.id; 255 return CONTROLLER_ID_UNDEFINED; 256 } 257 258 static inline enum clock_source_id dal_graphics_object_id_get_clock_source_id( 259 struct graphics_object_id id) 260 { 261 if (id.type == OBJECT_TYPE_CLOCK_SOURCE) 262 return (enum clock_source_id) id.id; 263 return CLOCK_SOURCE_ID_UNDEFINED; 264 } 265 266 static inline enum encoder_id dal_graphics_object_id_get_encoder_id( 267 struct graphics_object_id id) 268 { 269 if (id.type == OBJECT_TYPE_ENCODER) 270 return (enum encoder_id) id.id; 271 return ENCODER_ID_UNKNOWN; 272 } 273 274 static inline enum connector_id dal_graphics_object_id_get_connector_id( 275 struct graphics_object_id id) 276 { 277 if (id.type == OBJECT_TYPE_CONNECTOR) 278 return (enum connector_id) id.id; 279 return CONNECTOR_ID_UNKNOWN; 280 } 281 282 static inline enum audio_id dal_graphics_object_id_get_audio_id( 283 struct graphics_object_id id) 284 { 285 if (id.type == OBJECT_TYPE_AUDIO) 286 return (enum audio_id) id.id; 287 return AUDIO_ID_UNKNOWN; 288 } 289 290 static inline enum engine_id dal_graphics_object_id_get_engine_id( 291 struct graphics_object_id id) 292 { 293 if (id.type == OBJECT_TYPE_ENGINE) 294 return (enum engine_id) id.id; 295 return ENGINE_ID_UNKNOWN; 296 } 297 298 static inline bool dal_graphics_object_id_equal( 299 struct graphics_object_id id_1, 300 struct graphics_object_id id_2) 301 { 302 if ((id_1.id == id_2.id) && (id_1.enum_id == id_2.enum_id) && 303 (id_1.type == id_2.type)) { 304 return true; 305 } 306 return false; 307 } 308 #endif 309
Indexes created Sun Sep 21 20:09:37 GMT 2025