| /src/external/apache2/llvm/dist/clang/lib/StaticAnalyzer/Checkers/ |
| BoolAssignmentChecker.cpp | 83 ConstraintManager &CM = C.getConstraintManager();
89 std::tie(StIn, StOut) = CM.assumeInclusiveRangeDual(state, *NV, Zero, One);
|
| NonNullParamChecker.cpp | 173 ConstraintManager &CM = C.getConstraintManager();
175 std::tie(stateNotNull, stateNull) = CM.assumeDual(state, *DV);
|
| VLASizeChecker.cpp | 197 ConstraintManager &CM = C.getConstraintManager();
200 std::tie(StateNeg, StatePos) = CM.assumeDual(State, *LessThanZeroDVal);
|
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/Vectorize/ |
| VPRecipeBuilder.h | 38 LoopVectorizationCostModel &CM;
109 LoopVectorizationCostModel &CM,
111 : OrigLoop(OrigLoop), TLI(TLI), Legal(Legal), CM(CM), PSE(PSE),
|
| LoopVectorizationPlanner.h | 253 LoopVectorizationCostModel &CM;
281 LoopVectorizationCostModel &CM,
287 : OrigLoop(L), LI(LI), TLI(TLI), TTI(TTI), Legal(Legal), CM(CM), IAI(IAI),
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/ExecutionEngine/Orc/ |
| JITTargetMachineBuilder.h | 95 JITTargetMachineBuilder &setCodeModel(Optional<CodeModel::Model> CM) {
96 this->CM = std::move(CM);
101 const Optional<CodeModel::Model> &getCodeModel() const { return CM; }
154 Optional<CodeModel::Model> CM;
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| HexagonGenExtract.cpp | 100 ConstantInt *CSL = nullptr, *CSR = nullptr, *CM = nullptr;
109 m_ConstantInt(CM)));
116 m_ConstantInt(CM)));
123 m_ConstantInt(CM)));
132 m_ConstantInt(CM)));
139 m_ConstantInt(CM)));
142 CM = nullptr;
149 CM = nullptr;
168 if (!CM) {
175 CM = ConstantInt::get(Ctx, A)
[all...] |
| HexagonGenInsert.cpp | 297 : BitOrd(BO), CM(M) {}
303 CellMapShadow &CM;
315 : SelR(R), SelB(B), BitN(N), BitOrd(BO), CM(M) {}
323 CellMapShadow &CM;
341 const BitTracker::RegisterCell &RC1 = CM.lookup(VR1), &RC2 = CM.lookup(VR2);
358 const BitTracker::RegisterCell &RC1 = CM.lookup(VR1);
359 const BitTracker::RegisterCell &RC2 = CM.lookup(VR2);
|
| /src/games/backgammon/common_source/ |
| fancy.c | 62 static char *CM; /* cursor movement instructions */
83 static char **tstr[] = {&BC, &CD, &CE, &CL, &CM, &HO, &MC, &ML, &ND, &UP};
433 char *m; /* string containing CM movement */
450 if (CM) { /* try CM to get there */
452 m = (char *) tgoto(CM, c, r);
|
| /src/external/apache2/llvm/dist/clang/lib/Driver/ToolChains/ |
| WebAssembly.cpp | 91 StringRef CM = A->getValue();
92 if (CM == "command") {
94 } else if (CM == "reactor") {
99 << CM << A->getOption().getName();
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ |
| TargetMachineC.cpp | 131 Optional<CodeModel::Model> CM = unwrap(CodeModel, JIT);
150 return wrap(unwrap(T)->createTargetMachine(Triple, CPU, Features, opt, RM, CM,
|
| /src/external/gpl3/binutils/dist/opcodes/ |
| micromips-opc.c | 214 #define CM INSN_COPROC_MOVE
575 {"cttc1", "t,g", 0x00000436, 0xfc00ffff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 },
576 {"cttc1", "t,S", 0x00000436, 0xfc00ffff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 },
656 {"dmtc1", "t,S", 0x54002c3b, 0xfc00ffff, RD_1|WR_2|FP_S|CM, 0, I3, 0, 0 },
657 {"dmtc1", "t,G", 0x54002c3b, 0xfc00ffff, RD_1|WR_2|FP_S|CM, 0, I3, 0, 0 },
931 {"mtc1", "t,S", 0x5400283b, 0xfc00ffff, RD_1|WR_2|FP_S|CM, 0, I1, 0, 0 },
932 {"mtc1", "t,G", 0x5400283b, 0xfc00ffff, RD_1|WR_2|FP_S|CM, 0, I1, 0, 0 },
938 {"mthc1", "t,S", 0x5400383b, 0xfc00ffff, RD_1|WR_2|FP_D|CM, 0, I1, 0, 0 },
939 {"mthc1", "t,G", 0x5400383b, 0xfc00ffff, RD_1|WR_2|FP_D|CM, 0, I1, 0, 0 },
949 {"mttc0", "t,G", 0x00000006, 0xfc00ffff, RD_1|WR_C0|WR_CC|TRAP|CM, AL, 0, MT32, 0 }
[all...] |
| mips-opc.c | 225 #define CM INSN_COPROC_MOVE
1002 {"ctc1", "t,g", 0x44c00000, 0xffe007ff, RD_1|WR_CC|CM, 0, I1, 0, 0 },
1003 {"ctc1", "t,S", 0x44c00000, 0xffe007ff, RD_1|WR_CC|CM, 0, I1, 0, 0 },
1006 {"cttc1", "t,g", 0x41800023, 0xffe007ff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 },
1007 {"cttc1", "t,S", 0x41800023, 0xffe007ff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 },
1008 {"cttc2", "t,g", 0x41800025, 0xffe007ff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, IOCT|IOCTP|IOCT2 },
1115 {"dmtc0", "t,G", 0x40a00000, 0xffe007ff, RD_1|WR_C0|WR_CC|CM, 0, I3, 0, EE },
1116 {"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, RD_1|WR_C0|WR_CC|CM, 0, I64, 0, 0 },
1117 {"dmtc1", "t,S", 0x44a00000, 0xffe007ff, RD_1|WR_2|CM|FP_D, 0, I3, 0, SF },
1118 {"dmtc1", "t,G", 0x44a00000, 0xffe007ff, RD_1|WR_2|CM|FP_D, 0, I3, 0, SF }
[all...] |
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| micromips-opc.c | 214 #define CM INSN_COPROC_MOVE
575 {"cttc1", "t,g", 0x00000436, 0xfc00ffff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 },
576 {"cttc1", "t,S", 0x00000436, 0xfc00ffff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 },
656 {"dmtc1", "t,S", 0x54002c3b, 0xfc00ffff, RD_1|WR_2|FP_S|CM, 0, I3, 0, 0 },
657 {"dmtc1", "t,G", 0x54002c3b, 0xfc00ffff, RD_1|WR_2|FP_S|CM, 0, I3, 0, 0 },
931 {"mtc1", "t,S", 0x5400283b, 0xfc00ffff, RD_1|WR_2|FP_S|CM, 0, I1, 0, 0 },
932 {"mtc1", "t,G", 0x5400283b, 0xfc00ffff, RD_1|WR_2|FP_S|CM, 0, I1, 0, 0 },
938 {"mthc1", "t,S", 0x5400383b, 0xfc00ffff, RD_1|WR_2|FP_D|CM, 0, I1, 0, 0 },
939 {"mthc1", "t,G", 0x5400383b, 0xfc00ffff, RD_1|WR_2|FP_D|CM, 0, I1, 0, 0 },
949 {"mttc0", "t,G", 0x00000006, 0xfc00ffff, RD_1|WR_C0|WR_CC|TRAP|CM, AL, 0, MT32, 0 }
[all...] |
| mips-opc.c | 225 #define CM INSN_COPROC_MOVE
1002 {"ctc1", "t,g", 0x44c00000, 0xffe007ff, RD_1|WR_CC|CM, 0, I1, 0, 0 },
1003 {"ctc1", "t,S", 0x44c00000, 0xffe007ff, RD_1|WR_CC|CM, 0, I1, 0, 0 },
1006 {"cttc1", "t,g", 0x41800023, 0xffe007ff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 },
1007 {"cttc1", "t,S", 0x41800023, 0xffe007ff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 },
1008 {"cttc2", "t,g", 0x41800025, 0xffe007ff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, IOCT|IOCTP|IOCT2 },
1115 {"dmtc0", "t,G", 0x40a00000, 0xffe007ff, RD_1|WR_C0|WR_CC|CM, 0, I3, 0, EE },
1116 {"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, RD_1|WR_C0|WR_CC|CM, 0, I64, 0, 0 },
1117 {"dmtc1", "t,S", 0x44a00000, 0xffe007ff, RD_1|WR_2|CM|FP_D, 0, I3, 0, SF },
1118 {"dmtc1", "t,G", 0x44a00000, 0xffe007ff, RD_1|WR_2|CM|FP_D, 0, I3, 0, SF }
[all...] |
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| micromips-opc.c | 214 #define CM INSN_COPROC_MOVE
575 {"cttc1", "t,g", 0x00000436, 0xfc00ffff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 },
576 {"cttc1", "t,S", 0x00000436, 0xfc00ffff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 },
656 {"dmtc1", "t,S", 0x54002c3b, 0xfc00ffff, RD_1|WR_2|FP_S|CM, 0, I3, 0, 0 },
657 {"dmtc1", "t,G", 0x54002c3b, 0xfc00ffff, RD_1|WR_2|FP_S|CM, 0, I3, 0, 0 },
931 {"mtc1", "t,S", 0x5400283b, 0xfc00ffff, RD_1|WR_2|FP_S|CM, 0, I1, 0, 0 },
932 {"mtc1", "t,G", 0x5400283b, 0xfc00ffff, RD_1|WR_2|FP_S|CM, 0, I1, 0, 0 },
938 {"mthc1", "t,S", 0x5400383b, 0xfc00ffff, RD_1|WR_2|FP_D|CM, 0, I1, 0, 0 },
939 {"mthc1", "t,G", 0x5400383b, 0xfc00ffff, RD_1|WR_2|FP_D|CM, 0, I1, 0, 0 },
949 {"mttc0", "t,G", 0x00000006, 0xfc00ffff, RD_1|WR_C0|WR_CC|TRAP|CM, AL, 0, MT32, 0 }
[all...] |
| mips-opc.c | 225 #define CM INSN_COPROC_MOVE
1002 {"ctc1", "t,g", 0x44c00000, 0xffe007ff, RD_1|WR_CC|CM, 0, I1, 0, 0 },
1003 {"ctc1", "t,S", 0x44c00000, 0xffe007ff, RD_1|WR_CC|CM, 0, I1, 0, 0 },
1006 {"cttc1", "t,g", 0x41800023, 0xffe007ff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 },
1007 {"cttc1", "t,S", 0x41800023, 0xffe007ff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 },
1008 {"cttc2", "t,g", 0x41800025, 0xffe007ff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, IOCT|IOCTP|IOCT2 },
1115 {"dmtc0", "t,G", 0x40a00000, 0xffe007ff, RD_1|WR_C0|WR_CC|CM, 0, I3, 0, EE },
1116 {"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, RD_1|WR_C0|WR_CC|CM, 0, I64, 0, 0 },
1117 {"dmtc1", "t,S", 0x44a00000, 0xffe007ff, RD_1|WR_2|CM|FP_D, 0, I3, 0, SF },
1118 {"dmtc1", "t,G", 0x44a00000, 0xffe007ff, RD_1|WR_2|CM|FP_D, 0, I3, 0, SF }
[all...] |
| /src/external/gpl3/gdb/dist/opcodes/ |
| micromips-opc.c | 214 #define CM INSN_COPROC_MOVE
575 {"cttc1", "t,g", 0x00000436, 0xfc00ffff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 },
576 {"cttc1", "t,S", 0x00000436, 0xfc00ffff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 },
656 {"dmtc1", "t,S", 0x54002c3b, 0xfc00ffff, RD_1|WR_2|FP_S|CM, 0, I3, 0, 0 },
657 {"dmtc1", "t,G", 0x54002c3b, 0xfc00ffff, RD_1|WR_2|FP_S|CM, 0, I3, 0, 0 },
931 {"mtc1", "t,S", 0x5400283b, 0xfc00ffff, RD_1|WR_2|FP_S|CM, 0, I1, 0, 0 },
932 {"mtc1", "t,G", 0x5400283b, 0xfc00ffff, RD_1|WR_2|FP_S|CM, 0, I1, 0, 0 },
938 {"mthc1", "t,S", 0x5400383b, 0xfc00ffff, RD_1|WR_2|FP_D|CM, 0, I1, 0, 0 },
939 {"mthc1", "t,G", 0x5400383b, 0xfc00ffff, RD_1|WR_2|FP_D|CM, 0, I1, 0, 0 },
949 {"mttc0", "t,G", 0x00000006, 0xfc00ffff, RD_1|WR_C0|WR_CC|TRAP|CM, AL, 0, MT32, 0 }
[all...] |
| mips-opc.c | 225 #define CM INSN_COPROC_MOVE
1002 {"ctc1", "t,g", 0x44c00000, 0xffe007ff, RD_1|WR_CC|CM, 0, I1, 0, 0 },
1003 {"ctc1", "t,S", 0x44c00000, 0xffe007ff, RD_1|WR_CC|CM, 0, I1, 0, 0 },
1006 {"cttc1", "t,g", 0x41800023, 0xffe007ff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 },
1007 {"cttc1", "t,S", 0x41800023, 0xffe007ff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, 0 },
1008 {"cttc2", "t,g", 0x41800025, 0xffe007ff, RD_1|WR_CC|TRAP|CM, AL, 0, MT32, IOCT|IOCTP|IOCT2 },
1115 {"dmtc0", "t,G", 0x40a00000, 0xffe007ff, RD_1|WR_C0|WR_CC|CM, 0, I3, 0, EE },
1116 {"dmtc0", "t,G,H", 0x40a00000, 0xffe007f8, RD_1|WR_C0|WR_CC|CM, 0, I64, 0, 0 },
1117 {"dmtc1", "t,S", 0x44a00000, 0xffe007ff, RD_1|WR_2|CM|FP_D, 0, I3, 0, SF },
1118 {"dmtc1", "t,G", 0x44a00000, 0xffe007ff, RD_1|WR_2|CM|FP_D, 0, I3, 0, SF }
[all...] |
| /src/usr.bin/tip/ |
| tip.c | 91 char *CM;
|
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/ |
| Reassociate.cpp | 345 // If CM is the Carmichael number then a weight W satisfying W >= CM+Bitwidth
346 // can be replaced with W-CM. That's because x^W=x^(W-CM) for every Bitwidth
347 // bit number x, since either x is odd in which case x^CM = 1, or x is even in
348 // which case both x^W and x^(W - CM) are zero. By subtracting off multiples
349 // of CM like this weights can always be reduced to the range [0, CM+Bitwidth)
355 /// CM - The value of Carmichael's lambda function.
356 APInt CM = APInt::getOneBitSet(Bitwidth, CarmichaelShift(Bitwidth))
[all...] |
| /src/external/bsd/pcc/dist/pcc/mip/ |
| node.h | 215 #define CM 48
|
| /src/external/apache2/llvm/dist/clang/lib/CodeGen/ |
| BackendUtil.cpp | 896 Optional<llvm::CodeModel::Model> CM = getCodeModel(CodeGenOpts);
907 Options, RM, CM, OptLevel));
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| TargetLoweringObjectFileImpl.cpp | 119 CodeModel::Model CM = TgtM.getCodeModel();
150 ((CM == CodeModel::Small || CM == CodeModel::Medium)
153 (CM == CodeModel::Small
156 ((CM == CodeModel::Small || CM == CodeModel::Medium)
160 (CM == CodeModel::Small || CM == CodeModel::Medium)
162 LSDAEncoding = (CM == CodeModel::Small)
164 TTypeEncoding = (CM == CodeModel::Small
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86InstructionSelector.cpp | 1386 CodeModel::Model CM = TM.getCodeModel();
1387 if (CM != CodeModel::Small && CM != CodeModel::Large)
1405 if (CM == CodeModel::Large && STI.is64Bit()) {
1422 } else if (CM == CodeModel::Small || !STI.is64Bit()) {
|
