Home | History | Annotate | Line # | Download | only in ic
      1 /*	$NetBSD: comvar.h,v 1.99 2025/10/24 23:16:11 brad Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1996 Christopher G. Demetriou.  All rights reserved.
      5  *
      6  * Redistribution and use in source and binary forms, with or without
      7  * modification, are permitted provided that the following conditions
      8  * are met:
      9  * 1. Redistributions of source code must retain the above copyright
     10  *    notice, this list of conditions and the following disclaimer.
     11  * 2. Redistributions in binary form must reproduce the above copyright
     12  *    notice, this list of conditions and the following disclaimer in the
     13  *    documentation and/or other materials provided with the distribution.
     14  * 3. All advertising materials mentioning features or use of this software
     15  *    must display the following acknowledgement:
     16  *      This product includes software developed by Christopher G. Demetriou
     17  *	for the NetBSD Project.
     18  * 4. The name of the author may not be used to endorse or promote products
     19  *    derived from this software without specific prior written permission
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
     22  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     23  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     24  * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
     25  * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
     26  * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
     27  * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
     28  * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
     29  * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
     30  * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 #ifndef	_SYS_DEV_IC_COMVAR_H_
     34 #define	_SYS_DEV_IC_COMVAR_H_
     35 
     36 #include "opt_multiprocessor.h"
     37 #include "opt_lockdebug.h"
     38 #include "opt_com.h"
     39 #include "opt_kgdb.h"
     40 
     41 #ifdef RND_COM
     42 #include <sys/rndsource.h>
     43 #endif
     44 
     45 #include <sys/callout.h>
     46 #include <sys/timepps.h>
     47 #include <sys/mutex.h>
     48 #include <sys/device.h>
     49 
     50 #include <dev/i2c/i2cvar.h>
     51 #include <dev/spi/spivar.h>
     52 
     53 #include <dev/ic/comreg.h>	/* for COM_NPORTS */
     54 
     55 struct com_regs;
     56 
     57 int comcnattach(bus_space_tag_t, bus_addr_t, int, int, int, tcflag_t);
     58 int comcnattach1(struct com_regs *, int, int, int, tcflag_t);
     59 
     60 #ifdef KGDB
     61 int com_kgdb_attach(bus_space_tag_t, bus_addr_t, int, int, int, tcflag_t);
     62 int com_kgdb_attach1(struct com_regs *, int, int, int, tcflag_t);
     63 #endif
     64 
     65 int com_is_console(bus_space_tag_t, bus_addr_t, bus_space_handle_t *);
     66 
     67 /* Hardware flag masks */
     68 #define	COM_HW_NOIEN	0x01
     69 #define	COM_HW_FIFO	0x02
     70 #define	COM_HW_BROKEN_ETXRDY	0x04
     71 #define	COM_HW_FLOW	0x08
     72 #define	COM_HW_DEV_OK	0x20
     73 #define	COM_HW_CONSOLE	0x40
     74 #define	COM_HW_KGDB	0x80
     75 #define	COM_HW_TXFIFO_DISABLE	0x100
     76 #define	COM_HW_NO_TXPRELOAD	0x200
     77 #define	COM_HW_AFE	0x400
     78 #define	COM_HW_SOFTIRQ	0x800
     79 #define	COM_HW_MCRPRESCALE	0x1000
     80 
     81 /* Buffer size for character buffer */
     82 #ifndef COM_RING_SIZE
     83 #define	COM_RING_SIZE	2048
     84 #endif
     85 
     86 #define	COM_REG_RXDATA		0
     87 #define	COM_REG_TXDATA		1
     88 #define	COM_REG_DLBL		2
     89 #define	COM_REG_DLBH		3
     90 #define	COM_REG_IER		4
     91 #define	COM_REG_IIR		5
     92 #define	COM_REG_FIFO		6
     93 #define	COM_REG_TCR		7
     94 #define	COM_REG_EFR		8
     95 #define	COM_REG_TLR		9
     96 #define	COM_REG_LCR		10
     97 #define	COM_REG_MCR		11
     98 #define	COM_REG_LSR		12
     99 #define	COM_REG_MSR		13
    100 #define	COM_REG_MDR1		14		/* TI OMAP */
    101 #define	COM_REG_USR		15		/* 16750/DW APB */
    102 #define	COM_REG_TFL		16		/* DW APB */
    103 #define	COM_REG_RFL		17		/* DW APB */
    104 #define	COM_REG_HALT		18		/* DW APB */
    105 
    106 #define	COM_REGMAP_NENTRIES	19
    107 
    108 struct com_regs {
    109 	bus_space_tag_t		cr_iot;	/* If this device is directly connected to the computer bus. */
    110 	bus_space_handle_t	cr_ioh;
    111 	bus_addr_t		cr_iobase;
    112 
    113 	i2c_tag_t		cr_tag; /* If this device is connected to a I2C bus. */
    114 	i2c_addr_t		cr_addr;
    115 
    116 	spi_handle_t		cr_sh; /* If this device is connected to a SPI bus. */
    117 
    118 	int			cr_channel;
    119 
    120 	bus_size_t		cr_nports;
    121 	bus_size_t		cr_map[COM_REGMAP_NENTRIES];
    122 	uint8_t			(*cr_read)(struct com_regs *, u_int);
    123 	void			(*cr_write)(struct com_regs *, u_int, uint8_t);
    124 	void			(*cr_write_multi)(struct com_regs *, u_int,
    125 						  const uint8_t *,
    126 						  bus_size_t);
    127 
    128 };
    129 
    130 void	com_init_regs(struct com_regs *, bus_space_tag_t, bus_space_handle_t,
    131 		      bus_addr_t);
    132 void	com_init_regs_stride(struct com_regs *, bus_space_tag_t,
    133 			     bus_space_handle_t, bus_addr_t, u_int);
    134 void	com_init_regs_stride_width(struct com_regs *, bus_space_tag_t,
    135 				   bus_space_handle_t, bus_addr_t, u_int, u_int);
    136 
    137 struct comcons_info {
    138 	struct com_regs regs;
    139 	int rate;
    140 	int frequency;
    141 	int type;
    142 	tcflag_t cflag;
    143 };
    144 
    145 struct com_softc {
    146 	device_t sc_dev;
    147 	void *sc_si;
    148 	struct tty *sc_tty;
    149 
    150 	callout_t sc_diag_callout;
    151 	callout_t sc_poll_callout;
    152 	struct timeval sc_hup_pending;
    153 
    154 	int sc_frequency;
    155 
    156 	struct com_regs sc_regs;
    157 	bus_space_handle_t sc_hayespioh;
    158 
    159 
    160 	u_int sc_overflows,
    161 	      sc_floods,
    162 	      sc_errors;
    163 
    164 	int sc_hwflags,
    165 	    sc_swflags;
    166 	u_int sc_fifolen;
    167 
    168 	u_int sc_r_hiwat,
    169 	      sc_r_lowat;
    170 	u_char *volatile sc_rbget,
    171 	       *volatile sc_rbput;
    172  	volatile u_int sc_rbavail;
    173 	u_char *sc_rbuf,
    174 	       *sc_ebuf;
    175 
    176  	u_char *sc_tba;
    177  	u_int sc_tbc,
    178 	      sc_heldtbc;
    179 
    180 	volatile u_char sc_rx_flags,
    181 #define	RX_TTY_BLOCKED		0x01
    182 #define	RX_TTY_OVERFLOWED	0x02
    183 #define	RX_IBUF_BLOCKED		0x04
    184 #define	RX_IBUF_OVERFLOWED	0x08
    185 #define	RX_ANY_BLOCK		0x0f
    186 			sc_tx_busy,
    187 			sc_tx_done,
    188 			sc_tx_stopped,
    189 			sc_st_check,
    190 			sc_rx_ready;
    191 
    192 	volatile u_char sc_heldchange;
    193 	volatile u_char sc_msr, sc_msr_delta, sc_msr_mask, sc_mcr,
    194 	    sc_mcr_active, sc_lcr, sc_ier, sc_fifo, sc_dlbl, sc_dlbh, sc_efr;
    195 	u_char sc_mcr_dtr, sc_mcr_rts, sc_msr_cts, sc_msr_dcd;
    196 
    197 	u_char sc_prescaler;		/* for COM_TYPE_HAYESP */
    198 
    199 	/*
    200 	 * There are a great many almost-ns16550-compatible UARTs out
    201 	 * there, which have minor differences.  The type field here
    202 	 * lets us distinguish between them.
    203 	 */
    204 	int sc_type;
    205 #define	COM_TYPE_NORMAL		0	/* normal 16x50 */
    206 #define	COM_TYPE_HAYESP		1	/* Hayes ESP modem */
    207 #define	COM_TYPE_PXA2x0		2	/* Intel PXA2x0 processor built-in */
    208 #define	COM_TYPE_AU1x00		3	/* AMD/Alchemy Au1x000 proc. built-in */
    209 #define	COM_TYPE_OMAP		4	/* TI OMAP processor built-in */
    210 #define	COM_TYPE_16550_NOERS	5	/* like a 16550, no ERS */
    211 #define	COM_TYPE_INGENIC	6	/* JZ4780 built-in */
    212 #define	COM_TYPE_TEGRA		7	/* NVIDIA Tegra built-in */
    213 #define	COM_TYPE_BCMAUXUART	8	/* BCM2835 AUX UART */
    214 #define	COM_TYPE_16650		9
    215 #define	COM_TYPE_16750		10
    216 #define	COM_TYPE_DW_APB		11	/* DesignWare APB UART */
    217 #define COM_TYPE_SC16IS7XX	12	/* NXP SC16IS7XX behind I2C or SPI */
    218 
    219 	int sc_poll_ticks;
    220 
    221 	/* power management hooks */
    222 	int (*enable)(struct com_softc *);
    223 	void (*disable)(struct com_softc *);
    224 	int enabled;
    225 
    226 	struct pps_state sc_pps_state;	/* pps state */
    227 
    228 #ifdef RND_COM
    229 	krndsource_t  rnd_source;
    230 #endif
    231 	kmutex_t		sc_lock;
    232 
    233 	struct workqueue	*sc_wq;
    234 	int			sc_wk;
    235 };
    236 
    237 int comprobe1(bus_space_tag_t, bus_space_handle_t);
    238 int comintr(void *);
    239 void com_attach_subr(struct com_softc *);
    240 int com_probe_subr(struct com_regs *);
    241 int com_detach(device_t, int);
    242 bool com_resume(device_t, const pmf_qual_t *);
    243 bool com_cleanup(device_t, int);
    244 bool com_suspend(device_t, const pmf_qual_t *);
    245 
    246 #ifndef IPL_SERIAL
    247 #define	IPL_SERIAL	IPL_TTY
    248 #define	splserial()	spltty()
    249 #endif
    250 
    251 #endif	/* _SYS_DEV_IC_COMVAR_H_ */
    252