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      1 /* $NetBSD: cpu.h,v 1.106 2024/03/31 17:13:29 thorpej Exp $ */
      2 
      3 /*-
      4  * Copyright (c) 1998, 1999, 2000, 2001 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Jason R. Thorpe of the Numerical Aerospace Simulation Facility,
      9  * NASA Ames Research Center, and by Charles M. Hannum.
     10  *
     11  * Redistribution and use in source and binary forms, with or without
     12  * modification, are permitted provided that the following conditions
     13  * are met:
     14  * 1. Redistributions of source code must retain the above copyright
     15  *    notice, this list of conditions and the following disclaimer.
     16  * 2. Redistributions in binary form must reproduce the above copyright
     17  *    notice, this list of conditions and the following disclaimer in the
     18  *    documentation and/or other materials provided with the distribution.
     19  *
     20  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     21  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     22  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     23  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     24  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     25  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     26  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     27  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     28  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     29  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     30  * POSSIBILITY OF SUCH DAMAGE.
     31  */
     32 
     33 /*
     34  * Copyright (c) 1988 University of Utah.
     35  * Copyright (c) 1982, 1990, 1993
     36  *	The Regents of the University of California.  All rights reserved.
     37  *
     38  * This code is derived from software contributed to Berkeley by
     39  * the Systems Programming Group of the University of Utah Computer
     40  * Science Department.
     41  *
     42  * Redistribution and use in source and binary forms, with or without
     43  * modification, are permitted provided that the following conditions
     44  * are met:
     45  * 1. Redistributions of source code must retain the above copyright
     46  *    notice, this list of conditions and the following disclaimer.
     47  * 2. Redistributions in binary form must reproduce the above copyright
     48  *    notice, this list of conditions and the following disclaimer in the
     49  *    documentation and/or other materials provided with the distribution.
     50  * 3. Neither the name of the University nor the names of its contributors
     51  *    may be used to endorse or promote products derived from this software
     52  *    without specific prior written permission.
     53  *
     54  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     55  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     56  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     57  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     58  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     59  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     60  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     61  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     62  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     63  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     64  * SUCH DAMAGE.
     65  *
     66  * from: Utah $Hdr: cpu.h 1.16 91/03/25$
     67  *
     68  *	@(#)cpu.h	8.4 (Berkeley) 1/5/94
     69  */
     70 
     71 #ifndef _ALPHA_CPU_H_
     72 #define _ALPHA_CPU_H_
     73 
     74 #if defined(_KERNEL_OPT)
     75 #include "opt_gprof.h"
     76 #include "opt_multiprocessor.h"
     77 #include "opt_lockdebug.h"
     78 #endif
     79 
     80 /*
     81  * Exported definitions unique to Alpha cpu support.
     82  */
     83 
     84 #include <machine/alpha_cpu.h>
     85 
     86 #if defined(_KERNEL) || defined(_KMEMUSER)
     87 #include <sys/cpu_data.h>
     88 #include <sys/cctr.h>
     89 #include <sys/intr.h>
     90 #include <machine/frame.h>
     91 
     92 #ifndef _KERNEL
     93 #include <stddef.h>
     94 #endif /* ! _KERNEL */
     95 
     96 /*
     97  * Machine check information.
     98  */
     99 struct mchkinfo {
    100 	volatile int mc_expected;	/* machine check is expected */
    101 	volatile int mc_received;	/* machine check was received */
    102 };
    103 
    104 /*
    105  * Per-cpu information.  Data accessed by MI code is marked [MI].
    106  */
    107 struct cpu_info {
    108 	struct cpu_data ci_data;	/* [MI] general per-cpu data */
    109 	struct lwp *ci_curlwp;		/* [MI] current owner of the cpu */
    110 	struct lwp *ci_onproc;		/* [MI] current user LWP / kthread */
    111 	struct cctr_state ci_cc;	/* [MI] cycle counter state */
    112 
    113 	volatile int ci_mtx_count;	/* [MI] neg count of spin mutexes */
    114 	volatile int ci_mtx_oldspl;	/* [MI] for spin mutex splx() */
    115 
    116 	u_long ci_intrdepth;		/* interrupt trap depth */
    117 	volatile u_long ci_ssir;	/* simulated software interrupt reg */
    118 					/* LWPs for soft intr dispatch */
    119 	struct lwp *ci_silwps[SOFTINT_COUNT];
    120 	struct cpu_softc *ci_softc;	/* pointer to our device */
    121 
    122 	struct pmap *ci_pmap;		/* currently-activated pmap */
    123 	u_int ci_next_asn;		/* next ASN to assign */
    124 	u_long ci_asn_gen;		/* current ASN generation */
    125 
    126 	struct mchkinfo ci_mcinfo;	/* machine check info */
    127 
    128 	/*
    129 	 * The following must be in their own cache line, as they are
    130 	 * stored to regularly by remote CPUs.
    131 	 */
    132 	volatile u_long ci_ipis		/* interprocessor interrupts pending */
    133 			__aligned(64);
    134 	u_int	ci_want_resched;	/* [MI] preempt current process */
    135 
    136 	/*
    137 	 * These are largely static, and will frequently be fetched
    138 	 * by other CPUs.  For that reason, they get their own cache
    139 	 * line, too.
    140 	 */
    141 	struct cpu_info *ci_next	/* next cpu_info structure */
    142 			__aligned(64);
    143 	cpuid_t ci_cpuid;		/* [MI] our CPU ID */
    144 	volatile u_long ci_flags;	/* flags; see below */
    145 	uint64_t ci_pcc_freq;		/* cpu cycles/second */
    146 	struct trapframe *ci_db_regs;	/* registers for debuggers */
    147 	u_int	ci_nintrhand;		/* # of interrupt handlers */
    148 #if defined(GPROF) && defined(MULTIPROCESSOR)
    149 	struct gmonparam *ci_gmon;	/* [MI] per-cpu GPROF */
    150 #endif
    151 };
    152 
    153 /* Ensure some cpu_info fields are within the signed 16-bit displacement. */
    154 __CTASSERT(offsetof(struct cpu_info, ci_curlwp) <= 0x7ff0);
    155 __CTASSERT(offsetof(struct cpu_info, ci_ssir) <= 0x7ff0);
    156 
    157 #endif /* _KERNEL || _KMEMUSER */
    158 
    159 #if defined(_KERNEL)
    160 
    161 #define	CPUF_PRIMARY	0x01		/* CPU is primary CPU */
    162 #define	CPUF_PRESENT	0x02		/* CPU is present */
    163 #define	CPUF_RUNNING	0x04		/* CPU is running */
    164 #define	CPUF_PAUSED	0x08		/* CPU is paused */
    165 
    166 extern	struct cpu_info cpu_info_primary;
    167 extern	struct cpu_info *cpu_info_list;
    168 
    169 #define	CPU_INFO_ITERATOR		int __unused
    170 #define	CPU_INFO_FOREACH(cii, ci)	ci = cpu_info_list; \
    171 					ci != NULL; ci = ci->ci_next
    172 
    173 #if defined(MULTIPROCESSOR)
    174 extern	volatile u_long cpus_running;
    175 extern	volatile u_long cpus_paused;
    176 extern	struct cpu_info *cpu_info[];
    177 
    178 #define	curlwp			((struct lwp *)alpha_pal_rdval())
    179 #define	curcpu()		curlwp->l_cpu
    180 #define	CPU_IS_PRIMARY(ci)	((ci)->ci_flags & CPUF_PRIMARY)
    181 
    182 void	cpu_boot_secondary_processors(void);
    183 
    184 void	cpu_pause_resume(unsigned long, int);
    185 void	cpu_pause_resume_all(int);
    186 #else /* ! MULTIPROCESSOR */
    187 #define	curcpu()	(&cpu_info_primary)
    188 #define	curlwp		curcpu()->ci_curlwp
    189 #endif /* MULTIPROCESSOR */
    190 
    191 
    192 /*
    193  * definitions of cpu-dependent requirements
    194  * referenced in generic code
    195  */
    196 #define	cpu_number()		alpha_pal_whami()
    197 #define	cpu_proc_fork(p1, p2)	/* nothing */
    198 
    199 /*
    200  * Arguments to hardclock and gatherstats encapsulate the previous
    201  * machine state in an opaque clockframe.  On the alpha, we use
    202  * what we push on an interrupt (a trapframe).
    203  */
    204 struct clockframe {
    205 	struct trapframe	cf_tf;
    206 };
    207 #define	CLKF_USERMODE(framep)						\
    208 	(((framep)->cf_tf.tf_regs[FRAME_PS] & ALPHA_PSL_USERMODE) != 0)
    209 #define	CLKF_PC(framep)		((framep)->cf_tf.tf_regs[FRAME_PC])
    210 
    211 /*
    212  * This isn't perfect; if the clock interrupt comes in before the
    213  * r/m/w cycle is complete, we won't be counted... but it's not
    214  * like this statistic has to be extremely accurate.
    215  */
    216 #define	CLKF_INTR(framep)						\
    217 	((curcpu()->ci_intrdepth & 0xf) != 0)	/* see interrupt() */
    218 
    219 /*
    220  * This is used during profiling to integrate system time.  It can safely
    221  * assume that the process is resident.
    222  */
    223 #define	LWP_PC(p)		((l)->l_md.md_tf->tf_regs[FRAME_PC])
    224 
    225 void	cpu_need_proftick(struct lwp *);
    226 void	cpu_signotify(struct lwp *);
    227 
    228 #define	aston(l)		((l)->l_md.md_astpending = 1)
    229 #endif /* _KERNEL */
    230 
    231 /*
    232  * CTL_MACHDEP definitions.
    233  */
    234 #define	CPU_CONSDEV		1	/* dev_t: console terminal device */
    235 #define	CPU_ROOT_DEVICE		2	/* string: root device name */
    236 #define	CPU_UNALIGNED_PRINT	3	/* int: print unaligned accesses */
    237 #define	CPU_UNALIGNED_FIX	4	/* int: fix unaligned accesses */
    238 #define	CPU_UNALIGNED_SIGBUS	5	/* int: SIGBUS unaligned accesses */
    239 #define	CPU_BOOTED_KERNEL	6	/* string: booted kernel name */
    240 #define	CPU_FP_SYNC_COMPLETE	7	/* int: always fixup sync fp traps */
    241 #define	CPU_CCTR		8	/* int: using CC timecounter */
    242 #define	CPU_IS_QEMU		9	/* int: running under Qemu */
    243 #define	CPU_FP_COMPLETE_DEBUG	10	/* int: enable FP completion debug */
    244 #define	CPU_RPB_TYPE		11	/* quad: system type (from RPB) */
    245 #define	CPU_RPB_VARIATION	12	/* quad: system variation (from RPB) */
    246 
    247 
    248 #ifdef _KERNEL
    249 
    250 struct pcb;
    251 struct proc;
    252 struct reg;
    253 struct rpb;
    254 struct trapframe;
    255 
    256 int	badaddr(void *, size_t);
    257 void *	cpu_uarea_alloc(bool);
    258 bool	cpu_uarea_free(void *);
    259 
    260 void	cpu_idle_wtint(void);
    261 extern	void (*cpu_idle_fn)(void);
    262 #define	cpu_idle()	(*cpu_idle_fn)()
    263 
    264 void	cpu_initclocks_secondary(void);
    265 
    266 #endif /* _KERNEL */
    267 #endif /* _ALPHA_CPU_H_ */
    268