1 /* $NetBSD: cs4237reg.h,v 1.5 2008/04/28 20:23:49 martin Exp $ */ 2 3 /* 4 * Copyright (c) 1999 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Rene Hexel (rh (at) NetBSD.org). 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /* CS4237/4236B mode3 extended register, added to AD1848 registers */ 33 #define CS_XREG 23 /* mode 3 extended register access */ 34 35 /* ALT_FEATURE3 - register I23 */ 36 #define ALT_F3_XA4 0x04 /* Extended Register Address bit 4 */ 37 #define ALT_F3_XRAE 0x08 /* Extended Register Access Enable */ 38 #define ALT_F3_XA0 0x10 /* Extended Register Address bit 0 */ 39 #define ALT_F3_XA1 0x20 /* Extended Register Address bit 1 */ 40 #define ALT_F3_XA2 0x40 /* Extended Register Address bit 2 */ 41 #define ALT_F3_XA3 0x80 /* Extended Register Address bit 3 */ 42 43 /* extended register set, accessed indirectly through I23 */ 44 #define CS_X_LEFT_LINE_ALT_VOL 0x08 /* Left LINE Alternate Volume */ 45 #define CS_X_RIGHT_LINE_ALT_VOL 0x18 /* Right LINE Alternate Volume */ 46 #define CS_X_LEFT_MIC_VOL 0x28 /* Left Microphone Volume */ 47 #define CS_X_RIGHT_MIC_VOL 0x38 /* Right Microphone Volume */ 48 #define CS_X_SYNTHINPUT_CONTROL 0x48 /* Synthesis and Input Mixer Control */ 49 #define CS_X_RIGHTINPUT_CONTROL 0x58 /* Right Input Mixer Control */ 50 #define CS_X_LEFT_FM_SYNTH_VOL 0x68 /* Left FM Synthesis Volume */ 51 #define CS_X_RIGHT_FM_SYNTH_VOL 0x78 /* Right FM Synthesis Volume */ 52 #define CS_X_LEFT_DSP_SER_VOL 0x88 /* Left DSP Serial Port Volume */ 53 #define CS_X_RIGHT_DSP_SER_VOL 0x98 /* Right DSP Serial Port Volume */ 54 #define CS_X_RIGHT_LOOPBACK_VOL 0xa8 /* Right Loopback Monitor Volume */ 55 #define CS_X_DAC_MUTE_IFSE_EN 0xb8 /* DAC Mute and IFSE Enable */ 56 #define CS_X_INDEP_ADC_FREQ 0xc8 /* Independent ADC Sample Freq */ 57 #define CS_X_INDEP_DAC_FREQ 0xd8 /* Independent DAC Sample Freq */ 58 #define CS_X_LEFT_DIGITAL_VOL 0xe8 /* Left Master Digital Audio Volume */ 59 #define CS_X_RIGHT_DIGITAL_VOL 0xf8 /* Right Master Digital Audio Volume */ 60 #define CS_X_LEFT_WAVE_SER_VOL 0x0c /* Left Wavetable Serial Port Volume */ 61 #define CS_X_RIGHT_WAVE_SER_VOL 0x1c /* Right Wavetable Serial Port Volume */ 62 #define CS_X_CHIP_VERSION 0x9c /* Chip Version and ID */ 63 64 /* CS_X_CHIP_VERSION - register X25 */ 65 #define X_CHIP_VERSIONF_CID 0x1f /* Chip ID mask */ 66 #define X_CHIP_VERSIONF_REV 0xe0 /* Chip Revision mask */ 67 68 #define X_CHIP_CID_CS4236BB 0x00 /* CS4236B revision B */ 69 #define X_CHIP_CID_CS4236B 0x0b /* CS4236B other revision */ 70 #define X_CHIP_CID_CS4237B 0x08 /* CS4237B */ 71
Indexes created Sat Sep 20 22:09:52 GMT 2025