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      1 //===-- AMDGPUAsmPrinter.h - Print AMDGPU assembly code ---------*- C++ -*-===//
      2 //
      3 // Part of the LLVM Project, under the Apache License v2.0 with LLVM Exceptions.
      4 // See https://llvm.org/LICENSE.txt for license information.
      5 // SPDX-License-Identifier: Apache-2.0 WITH LLVM-exception
      6 //
      7 //===----------------------------------------------------------------------===//
      8 //
      9 /// \file
     10 /// AMDGPU Assembly printer class.
     11 //
     12 //===----------------------------------------------------------------------===//
     13 
     14 #ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUASMPRINTER_H
     15 #define LLVM_LIB_TARGET_AMDGPU_AMDGPUASMPRINTER_H
     16 
     17 #include "SIProgramInfo.h"
     18 #include "llvm/CodeGen/AsmPrinter.h"
     19 
     20 struct amd_kernel_code_t;
     21 
     22 namespace llvm {
     23 
     24 class AMDGPUMachineFunction;
     25 class AMDGPUTargetStreamer;
     26 class MCCodeEmitter;
     27 class MCOperand;
     28 class GCNSubtarget;
     29 
     30 namespace AMDGPU {
     31 namespace HSAMD {
     32 class MetadataStreamer;
     33 }
     34 } // namespace AMDGPU
     35 
     36 namespace amdhsa {
     37 struct kernel_descriptor_t;
     38 }
     39 
     40 class AMDGPUAsmPrinter final : public AsmPrinter {
     41 private:
     42   // Track resource usage for callee functions.
     43   struct SIFunctionResourceInfo {
     44     // Track the number of explicitly used VGPRs. Special registers reserved at
     45     // the end are tracked separately.
     46     int32_t NumVGPR = 0;
     47     int32_t NumAGPR = 0;
     48     int32_t NumExplicitSGPR = 0;
     49     uint64_t PrivateSegmentSize = 0;
     50     bool UsesVCC = false;
     51     bool UsesFlatScratch = false;
     52     bool HasDynamicallySizedStack = false;
     53     bool HasRecursion = false;
     54 
     55     int32_t getTotalNumSGPRs(const GCNSubtarget &ST) const;
     56     int32_t getTotalNumVGPRs(const GCNSubtarget &ST) const;
     57   };
     58 
     59   void initializeTargetID(const Module &M);
     60 
     61   SIProgramInfo CurrentProgramInfo;
     62   DenseMap<const Function *, SIFunctionResourceInfo> CallGraphResourceInfo;
     63 
     64   std::unique_ptr<AMDGPU::HSAMD::MetadataStreamer> HSAMetadataStream;
     65 
     66   MCCodeEmitter *DumpCodeInstEmitter = nullptr;
     67 
     68   uint64_t getFunctionCodeSize(const MachineFunction &MF) const;
     69   SIFunctionResourceInfo analyzeResourceUsage(const MachineFunction &MF) const;
     70 
     71   void getSIProgramInfo(SIProgramInfo &Out, const MachineFunction &MF);
     72   void getAmdKernelCode(amd_kernel_code_t &Out, const SIProgramInfo &KernelInfo,
     73                         const MachineFunction &MF) const;
     74   void findNumUsedRegistersSI(const MachineFunction &MF,
     75                               unsigned &NumSGPR,
     76                               unsigned &NumVGPR) const;
     77 
     78   /// Emit register usage information so that the GPU driver
     79   /// can correctly setup the GPU state.
     80   void EmitProgramInfoSI(const MachineFunction &MF,
     81                          const SIProgramInfo &KernelInfo);
     82   void EmitPALMetadata(const MachineFunction &MF,
     83                        const SIProgramInfo &KernelInfo);
     84   void emitPALFunctionMetadata(const MachineFunction &MF);
     85   void emitCommonFunctionComments(uint32_t NumVGPR,
     86                                   Optional<uint32_t> NumAGPR,
     87                                   uint32_t TotalNumVGPR,
     88                                   uint32_t NumSGPR,
     89                                   uint64_t ScratchSize,
     90                                   uint64_t CodeSize,
     91                                   const AMDGPUMachineFunction* MFI);
     92 
     93   uint16_t getAmdhsaKernelCodeProperties(
     94       const MachineFunction &MF) const;
     95 
     96   amdhsa::kernel_descriptor_t getAmdhsaKernelDescriptor(
     97       const MachineFunction &MF,
     98       const SIProgramInfo &PI) const;
     99 
    100 public:
    101   explicit AMDGPUAsmPrinter(TargetMachine &TM,
    102                             std::unique_ptr<MCStreamer> Streamer);
    103 
    104   StringRef getPassName() const override;
    105 
    106   const MCSubtargetInfo* getGlobalSTI() const;
    107 
    108   AMDGPUTargetStreamer* getTargetStreamer() const;
    109 
    110   bool doFinalization(Module &M) override;
    111   bool runOnMachineFunction(MachineFunction &MF) override;
    112 
    113   /// Wrapper for MCInstLowering.lowerOperand() for the tblgen'erated
    114   /// pseudo lowering.
    115   bool lowerOperand(const MachineOperand &MO, MCOperand &MCOp) const;
    116 
    117   /// Lower the specified LLVM Constant to an MCExpr.
    118   /// The AsmPrinter::lowerConstantof does not know how to lower
    119   /// addrspacecast, therefore they should be lowered by this function.
    120   const MCExpr *lowerConstant(const Constant *CV) override;
    121 
    122   /// tblgen'erated driver function for lowering simple MI->MC pseudo
    123   /// instructions.
    124   bool emitPseudoExpansionLowering(MCStreamer &OutStreamer,
    125                                    const MachineInstr *MI);
    126 
    127   /// Implemented in AMDGPUMCInstLower.cpp
    128   void emitInstruction(const MachineInstr *MI) override;
    129 
    130   void emitFunctionBodyStart() override;
    131 
    132   void emitFunctionBodyEnd() override;
    133 
    134   void emitFunctionEntryLabel() override;
    135 
    136   void emitBasicBlockStart(const MachineBasicBlock &MBB) override;
    137 
    138   void emitGlobalVariable(const GlobalVariable *GV) override;
    139 
    140   void emitStartOfAsmFile(Module &M) override;
    141 
    142   void emitEndOfAsmFile(Module &M) override;
    143 
    144   bool isBlockOnlyReachableByFallthrough(
    145     const MachineBasicBlock *MBB) const override;
    146 
    147   bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
    148                        const char *ExtraCode, raw_ostream &O) override;
    149 
    150 protected:
    151   std::vector<std::string> DisasmLines, HexLines;
    152   size_t DisasmLineMaxLen;
    153 };
    154 
    155 } // end namespace llvm
    156 
    157 #endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUASMPRINTER_H
    158