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    Searched defs:Control (Results 1 - 14 of 14) sorted by relevancy

  /src/external/gpl2/texinfo/dist/info/
infomap.h 47 #define Control(c) ((toupper (c)) & (~control_character_bit))
  /src/sys/arch/emips/stand/common/
ace.c 125 { "Control",
240 SysacePrintRegister(&Control_Names, Interface->Control);
263 uint32_t BusMode, Control;
266 Interface->Control = SAC_RST;
274 Control = Interface->Control;
280 Interface->Control = Control | SAC_BUS16;
281 Interface->Control = Interface->Control & ~SAC_BUS8
    [all...]
  /src/external/apache2/llvm/dist/libcxx/benchmarks/
string.bench.cpp 70 enum class DiffType { Control, ChangeFirst, ChangeMiddle, ChangeLast };
72 static constexpr const char* Names[] = {"Control", "ChangeFirst",
80 case DiffType::Control:
98 case DiffType::Control:
116 case DiffType::Control:
128 DiffType D = DiffType::Control) {
142 DiffType D = DiffType::Control,
161 makeString(Length(), DiffType::Control, Opaque()));
367 constexpr auto D = DiffType::Control;
426 // We only care about control when the lengths differ
    [all...]
  /src/external/apache2/llvm/dist/llvm/tools/llvm-rc/
ResourceScriptStmt.h 339 CONTROL = 0x0008
607 // Single control definition.
608 class Control {
617 // Control classes as described in DLGITEMTEMPLATEEX documentation.
629 // Simple information about a single control type.
636 Control(StringRef CtlType, IntOrString CtlTitle, uint32_t CtlID,
655 std::vector<Control> Controls;
665 void addControl(Control &&Ctl) { Controls.push_back(std::move(Ctl)); }
  /src/sys/arch/emips/ebus/
ace_ebus.c 464 "Control",
589 SysacePrintRegister(&Control_Names, regs->Control);
620 uint32_t BusMode, Control;
623 regs->Control = SAC_RST;
631 Control = regs->Control;
636 regs->Control = Control | SAC_BUS16;
637 regs->Control = regs->Control & ~SAC_BUS8
    [all...]
  /src/sys/external/bsd/gnu-efi/dist/inc/
efi_pxe.h 929 PXE_CONTROL Control;
984 // microseconds before returning control to the UNDI.
999 // do not return control to the UNDI until the previous Block() is
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/AsmParser/
X86AsmParser.cpp 3914 // Information on control-flow instructions that require manual mitigation can
3987 // Can't mitigate after terminators or calls. A control flow change may have
4676 /// ::= .nops size[, control]
4678 int64_t NumBytes = 0, Control = 0;
4688 if (getParser().parseAbsoluteExpression(Control))
4700 if (Control < 0) {
4706 getParser().getStreamer().emitNops(NumBytes, Control, L);
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelDAGToDAG.cpp 3585 // The 'control' of BEXTR has the pattern of:
3590 // Shift NBits left by 8 bits, thus producing 'control'.
3594 SDValue Control = CurDAG->getNode(ISD::SHL, DL, MVT::i32, NBits, C8);
3595 insertDAGNode(*CurDAG, SDValue(Node, 0), Control);
3597 // If the 'X' is *logically* shifted, we can fold that shift into 'control'.
3612 // And now 'or' these low 8 bits of shift amount into the 'control'.
3613 Control = CurDAG->getNode(ISD::OR, DL, MVT::i32, Control, ShiftAmt);
3614 insertDAGNode(*CurDAG, SDValue(Node, 0), Control);
3617 // But have to place the 'control' into the wide-enough register first
    [all...]
  /src/sys/arch/emips/include/
emipsreg.h 102 * Preferred addresses (nb: for the control registers of...)
130 volatile uint32_t Control; /* rw */
161 volatile uint32_t Control; /* rw */
197 volatile uint32_t Control; /* rw */
380 volatile uint32_t Control; /* rw */
462 volatile uint32_t Control; /* rw */
494 volatile uint32_t Control; /* rw */
519 volatile uint32_t Control;
564 volatile uint32_t Control; /*0x00000004 */
584 /* volatile uint32_t Control; 0x00000004 *
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZISelLowering.cpp 8010 uint64_t Control = MI.getOperand(2).getImm();
8015 Control |= GPRControlBit[15];
8017 Control |= GPRControlBit[11];
8018 MI.getOperand(2).setImm(Control);
8022 if ((Control & GPRControlBit[I]) == 0) {
8029 if (!NoFloat && (Control & 4) != 0) {
  /src/sys/external/bsd/acpica/dist/include/
aclocal.h 729 * Control state - one per if/else and while constructs.
769 * states are created when there are nested control methods executing.
833 ACPI_CONTROL_STATE Control;
1106 * Parse state - one state per parser invocation and each control
1173 /* For control registers, both ignored and reserved bits must be preserved */
1176 * For PM1 control, the SCI enable bit (bit 0, SCI_EN) is defined by the
actbl1.h 258 /* 2: ASF Remote Control */
1517 * BIT 2 - Control field to initiate serialization (RW)
1534 ACPI_GENERIC_ADDRESS Control; /* Address of EC command/status register */
  /src/sys/dev/ic/
mfireg.h 1485 #define MPI2_FUNCTION_SAS_IO_UNIT_CONTROL (0x1B) /* SAS IO Unit Control */
1493 #define MPI2_FUNCTION_PWR_MGMT_CONTROL (0x30) /* Power Management Control */
1648 /* SCSI IO Control bits */
1742 uint32_t Control; /* 0x3C */
mpt_mpilib.h 2634 U32 Control; /* 14h */
2661 /* SCSIO Control bits */

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