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    Searched defs:CreateReg (Results 1 - 11 of 11) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
FunctionLoweringInfo.cpp 373 /// CreateReg - Allocate a single virtual register for the given type.
374 Register FunctionLoweringInfo::CreateReg(MVT VT, bool isDivergent) {
399 Register R = CreateReg(RegisterVT, isDivergent);
  /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/AsmParser/
MSP430AsmParser.cpp 130 Inst.addOperand(MCOperand::createReg(Reg));
154 Inst.addOperand(MCOperand::createReg(Mem.Reg));
198 static std::unique_ptr<MSP430Operand> CreateReg(unsigned RegNum, SMLoc S,
459 Operands.push_back(MSP430Operand::CreateReg(RegNo, StartLoc, EndLoc));
  /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/AsmParser/
AVRAsmParser.cpp 134 Inst.addOperand(MCOperand::createReg(getReg()));
160 Inst.addOperand(MCOperand::createReg(getReg()));
206 static std::unique_ptr<AVROperand> CreateReg(unsigned RegNum, SMLoc S,
396 Operands.push_back(AVROperand::CreateReg(RegNo, T.getLoc(), T.getEndLoc()));
  /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/AsmParser/
SparcAsmParser.cpp 372 Inst.addOperand(MCOperand::createReg(getReg()));
403 Inst.addOperand(MCOperand::createReg(getMemBase()));
406 Inst.addOperand(MCOperand::createReg(getMemOffsetReg()));
412 Inst.addOperand(MCOperand::createReg(getMemBase()));
438 static std::unique_ptr<SparcOperand> CreateReg(unsigned RegNum, unsigned Kind,
588 MCOperand PrevReg = MCOperand::createReg(Sparc::G0);
954 Operands.push_back(SparcOperand::CreateReg(RegNo, RegKind, S, E));
1014 Op = SparcOperand::CreateReg(RegNo, RegKind, S, E);
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/AsmParser/
X86Operand.h 519 Inst.addOperand(MCOperand::createReg(getReg()));
527 Inst.addOperand(MCOperand::createReg(RegNo));
536 Inst.addOperand(MCOperand::createReg(RegNo));
570 Inst.addOperand(MCOperand::createReg(Reg));
576 Inst.addOperand(MCOperand::createReg(getMemBaseReg()));
578 Inst.addOperand(MCOperand::createReg(getMemDefaultBaseReg()));
580 Inst.addOperand(MCOperand::createReg(getMemIndexReg()));
582 Inst.addOperand(MCOperand::createReg(getMemSegReg()));
596 Inst.addOperand(MCOperand::createReg(getMemBaseReg()));
597 Inst.addOperand(MCOperand::createReg(getMemSegReg()))
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/AsmParser/
HexagonAsmParser.cpp 384 Inst.addOperand(MCOperand::createReg(getReg()));
433 CreateReg(MCContext &Context, unsigned RegNum, SMLoc S, SMLoc E) {
892 HexagonOperand::CreateReg(getContext(), Register, Begin, End));
910 HexagonOperand::CreateReg(getContext(), Register, Begin, End));
922 HexagonOperand::CreateReg(getContext(), Register, Begin, End));
1351 Inst.addOperand(MCOperand::createReg(Hexagon::R0));
1412 Inst.addOperand(MCOperand::createReg(RegPair.second));
1422 Inst.addOperand(MCOperand::createReg(RegPair.second));
1433 Inst.addOperand(MCOperand::createReg(RegPair.second));
1445 Inst.addOperand(MCOperand::createReg(RegPair.second))
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/VE/AsmParser/
VEAsmParser.cpp 464 Inst.addOperand(MCOperand::createReg(getReg()));
522 Inst.addOperand(MCOperand::createReg(getMemBase()));
523 Inst.addOperand(MCOperand::createReg(getMemIndexReg()));
530 Inst.addOperand(MCOperand::createReg(getMemBase()));
539 Inst.addOperand(MCOperand::createReg(getMemIndexReg()));
554 Inst.addOperand(MCOperand::createReg(getMemBase()));
596 static std::unique_ptr<VEOperand> CreateReg(unsigned RegNum, SMLoc S,
1435 Operands.push_back(VEOperand::CreateReg(RegNo1, S1, E1));
1436 Operands.push_back(VEOperand::CreateReg(RegNo2, S2, E2));
1494 Op = VEOperand::CreateReg(RegNo, S, E)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/AsmParser/
AArch64AsmParser.cpp 1485 Inst.addOperand(MCOperand::createReg(getReg()));
1497 Inst.addOperand(MCOperand::createReg(Reg));
1509 Inst.addOperand(MCOperand::createReg(Reg));
1524 Inst.addOperand(MCOperand::createReg(AArch64::Z0 + getReg() - Base));
1531 Inst.addOperand(MCOperand::createReg(AArch64::D0 + getReg() - AArch64::Q0));
1538 Inst.addOperand(MCOperand::createReg(getReg()));
1543 Inst.addOperand(MCOperand::createReg(getReg()));
1571 Inst.addOperand(MCOperand::createReg(FirstReg + getVectorListStart() -
1881 CreateReg(unsigned RegNum, RegKind Kind, SMLoc S, SMLoc E, MCContext &Ctx,
1908 auto Op = CreateReg(RegNum, Kind, S, E, Ctx, EqualsReg, ExtTy, ShiftAmount
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/
AMDGPUAsmParser.cpp 1086 static AMDGPUOperand::Ptr CreateReg(const AMDGPUAsmParser *AsmParser,
2154 Inst.addOperand(MCOperand::createReg(AMDGPU::getMCReg(getReg(), AsmParser->getSTI())));
2728 return AMDGPUOperand::CreateReg(this, Reg, StartLoc, EndLoc);
5846 Inst.addOperand(MCOperand::createReg(AMDGPU::M0)); // m0
5882 Inst.addOperand(MCOperand::createReg(AMDGPU::M0)); // m0
5907 Inst.addOperand(MCOperand::createReg(AMDGPU::NoRegister));
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/AsmParser/
ARMAsmParser.cpp 2477 Inst.addOperand(MCOperand::createReg(RegNum));
2484 Inst.addOperand(MCOperand::createReg(RegNum));
2501 Inst.addOperand(MCOperand::createReg(RegNum));
2536 Inst.addOperand(MCOperand::createReg(getReg()));
2541 Inst.addOperand(MCOperand::createReg(getReg()));
2548 Inst.addOperand(MCOperand::createReg(RegShiftedReg.SrcReg));
2549 Inst.addOperand(MCOperand::createReg(RegShiftedReg.ShiftReg));
2558 Inst.addOperand(MCOperand::createReg(RegShiftedImm.SrcReg));
2576 Inst.addOperand(MCOperand::createReg(*I));
2584 Inst.addOperand(MCOperand::createReg(*I))
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/
MipsAsmParser.cpp 888 static std::unique_ptr<MipsOperand> CreateReg(unsigned Index, StringRef Str,
1067 Inst.addOperand(MCOperand::createReg(getGPR32Reg()));
1072 Inst.addOperand(MCOperand::createReg(getGPR32Reg()));
1077 Inst.addOperand(MCOperand::createReg(getGPR32Reg()));
1082 Inst.addOperand(MCOperand::createReg(getGPRMM16Reg()));
1087 Inst.addOperand(MCOperand::createReg(getGPRMM16Reg()));
1092 Inst.addOperand(MCOperand::createReg(getGPRMM16Reg()));
1097 Inst.addOperand(MCOperand::createReg(getGPRMM16Reg()));
1103 Inst.addOperand(MCOperand::createReg(getGPRMM16Reg()));
1111 Inst.addOperand(MCOperand::createReg(getGPR64Reg()))
    [all...]

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