| /src/sys/external/bsd/gnu-efi/dist/inc/aarch64/ |
| efisetjmp_arch.h | 25 UINT64 D8;
|
| /src/lib/libm/ld128/ |
| s_expl.c | 178 D8 = 2.48015873015873015687993712101479612e-5L,
250 x * (D7 + x * (D8 + x * (D9 + x * (D10 +
|
| /src/external/bsd/pcc/dist/pcc/arch/sparc64/ |
| macdefs.h | 193 #define D8 70
244 { D8, -1 }, { D8, -1 }, { D9, -1 }, { D9, -1 }, \
|
| /src/external/gpl3/gcc/dist/libgcc/config/libbid/ |
| bid_internal.h | 2064 UINT128 D2, D8;
2091 D8.w[1] = (coeff.w[1] << 3) | (coeff.w[0] >> 61);
2092 D8.w[0] = coeff.w[0] << 3;
2094 __add_128_128 (coeff, D2, D8);
|
| /src/external/gpl3/gcc.old/dist/libgcc/config/libbid/ |
| bid_internal.h | 2064 UINT128 D2, D8;
2091 D8.w[1] = (coeff.w[1] << 3) | (coeff.w[0] >> 61);
2092 D8.w[0] = coeff.w[0] << 3;
2094 __add_128_128 (coeff, D2, D8);
|
| /src/external/gpl3/binutils/dist/opcodes/ |
| ppc-opc.c | 3080 /* The D8 field in a D form instruction. This is a displacement off
3083 #define D8 D + 1
3087 #define DCMX D8 + 1
10175 {"e_lbzu", OPVUP(6,0), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
10176 {"e_lhau", OPVUP(6,3), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
10177 {"e_lhzu", OPVUP(6,1), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
10178 {"e_lmw", OPVUP(6,8), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
10179 {"e_lwzu", OPVUP(6,2), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
10180 {"e_stbu", OPVUP(6,4), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
10181 {"e_sthu", OPVUP(6,5), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}}
[all...] |
| /src/external/gpl3/binutils.old/dist/opcodes/ |
| ppc-opc.c | 3080 /* The D8 field in a D form instruction. This is a displacement off
3083 #define D8 D + 1
3087 #define DCMX D8 + 1
10110 {"e_lbzu", OPVUP(6,0), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
10111 {"e_lhau", OPVUP(6,3), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
10112 {"e_lhzu", OPVUP(6,1), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
10113 {"e_lmw", OPVUP(6,8), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
10114 {"e_lwzu", OPVUP(6,2), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
10115 {"e_stbu", OPVUP(6,4), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
10116 {"e_sthu", OPVUP(6,5), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}}
[all...] |
| /src/external/gpl3/gdb.old/dist/opcodes/ |
| ppc-opc.c | 3012 /* The D8 field in a D form instruction. This is a displacement off
3015 #define D8 D + 1
3019 #define DCMX D8 + 1
9967 {"e_lbzu", OPVUP(6,0), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
9968 {"e_lhau", OPVUP(6,3), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
9969 {"e_lhzu", OPVUP(6,1), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
9970 {"e_lmw", OPVUP(6,8), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
9971 {"e_lwzu", OPVUP(6,2), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
9972 {"e_stbu", OPVUP(6,4), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
9973 {"e_sthu", OPVUP(6,5), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}}
[all...] |
| /src/external/gpl3/gdb/dist/opcodes/ |
| ppc-opc.c | 3080 /* The D8 field in a D form instruction. This is a displacement off
3083 #define D8 D + 1
3087 #define DCMX D8 + 1
10132 {"e_lbzu", OPVUP(6,0), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
10133 {"e_lhau", OPVUP(6,3), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
10134 {"e_lhzu", OPVUP(6,1), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
10135 {"e_lmw", OPVUP(6,8), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
10136 {"e_lwzu", OPVUP(6,2), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
10137 {"e_stbu", OPVUP(6,4), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}},
10138 {"e_sthu", OPVUP(6,5), OPVUP_MASK, PPCVLE, 0, {RT, D8, RA0}}
[all...] |
