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      1 /*	$NetBSD: smu7_powertune.h,v 1.2 2021/12/18 23:45:26 riastradh Exp $	*/
      2 
      3 /*
      4  * Copyright 2015 Advanced Micro Devices, Inc.
      5  *
      6  * Permission is hereby granted, free of charge, to any person obtaining a
      7  * copy of this software and associated documentation files (the "Software"),
      8  * to deal in the Software without restriction, including without limitation
      9  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
     10  * and/or sell copies of the Software, and to permit persons to whom the
     11  * Software is furnished to do so, subject to the following conditions:
     12  *
     13  * The above copyright notice and this permission notice shall be included in
     14  * all copies or substantial portions of the Software.
     15  *
     16  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     17  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     18  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     19  * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     20  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     21  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     22  * OTHER DEALINGS IN THE SOFTWARE.
     23  *
     24  */
     25 #ifndef _SMU7_POWERTUNE_H
     26 #define _SMU7_POWERTUNE_H
     27 
     28 #define DIDT_SQ_CTRL0__UNUSED_0_MASK    0xfffc0000
     29 #define DIDT_SQ_CTRL0__UNUSED_0__SHIFT  0x12
     30 #define DIDT_TD_CTRL0__UNUSED_0_MASK    0xfffc0000
     31 #define DIDT_TD_CTRL0__UNUSED_0__SHIFT  0x12
     32 #define DIDT_TCP_CTRL0__UNUSED_0_MASK   0xfffc0000
     33 #define DIDT_TCP_CTRL0__UNUSED_0__SHIFT 0x12
     34 #define DIDT_SQ_TUNING_CTRL__UNUSED_0_MASK                 0xc0000000
     35 #define DIDT_SQ_TUNING_CTRL__UNUSED_0__SHIFT               0x0000001e
     36 #define DIDT_TD_TUNING_CTRL__UNUSED_0_MASK                 0xc0000000
     37 #define DIDT_TD_TUNING_CTRL__UNUSED_0__SHIFT               0x0000001e
     38 #define DIDT_TCP_TUNING_CTRL__UNUSED_0_MASK                0xc0000000
     39 #define DIDT_TCP_TUNING_CTRL__UNUSED_0__SHIFT              0x0000001e
     40 
     41 /* PowerContainment Features */
     42 #define POWERCONTAINMENT_FEATURE_DTE             0x00000001
     43 #define POWERCONTAINMENT_FEATURE_TDCLimit        0x00000002
     44 #define POWERCONTAINMENT_FEATURE_PkgPwrLimit     0x00000004
     45 
     46 #define ixGC_CAC_CNTL 0x0000
     47 #define ixDIDT_SQ_STALL_CTRL 0x0004
     48 #define ixDIDT_SQ_TUNING_CTRL 0x0005
     49 #define ixDIDT_TD_STALL_CTRL 0x0044
     50 #define ixDIDT_TD_TUNING_CTRL 0x0045
     51 #define ixDIDT_TCP_STALL_CTRL 0x0064
     52 #define ixDIDT_TCP_TUNING_CTRL 0x0065
     53 
     54 
     55 int smu7_enable_smc_cac(struct pp_hwmgr *hwmgr);
     56 int smu7_disable_smc_cac(struct pp_hwmgr *hwmgr);
     57 int smu7_enable_power_containment(struct pp_hwmgr *hwmgr);
     58 int smu7_disable_power_containment(struct pp_hwmgr *hwmgr);
     59 int smu7_set_power_limit(struct pp_hwmgr *hwmgr, uint32_t n);
     60 int smu7_power_control_set_level(struct pp_hwmgr *hwmgr);
     61 int smu7_enable_didt_config(struct pp_hwmgr *hwmgr);
     62 int smu7_disable_didt_config(struct pp_hwmgr *hwmgr);
     63 #endif  /* DGPU_POWERTUNE_H */
     64 
     65