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      1 /*	$NetBSD: dmac_0448.h,v 1.7 2023/11/04 18:13:25 tsutsui Exp $	*/
      2 /*
      3  * Copyright (c) 1992, 1993
      4  *	The Regents of the University of California.  All rights reserved.
      5  *
      6  * This code is derived from software contributed to Berkeley by
      7  * Sony Corp. and Kazumasa Utashiro of Software Research Associates, Inc.
      8  *
      9  * Redistribution and use in source and binary forms, with or without
     10  * modification, are permitted provided that the following conditions
     11  * are met:
     12  * 1. Redistributions of source code must retain the above copyright
     13  *    notice, this list of conditions and the following disclaimer.
     14  * 2. Redistributions in binary form must reproduce the above copyright
     15  *    notice, this list of conditions and the following disclaimer in the
     16  *    documentation and/or other materials provided with the distribution.
     17  * 3. Neither the name of the University nor the names of its contributors
     18  *    may be used to endorse or promote products derived from this software
     19  *    without specific prior written permission.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND
     22  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     23  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     24  * ARE DISCLAIMED.  IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE
     25  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     26  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     27  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     28  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     29  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     30  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     31  * SUCH DAMAGE.
     32  *
     33  * from: $Hdr: dmac_0448.h,v 4.300 91/06/09 06:21:36 root Rel41 $ SONY
     34  *
     35  *	@(#)dmac_0448.h	8.1 (Berkeley) 6/11/93
     36  */
     37 
     38 /*
     39  * Copyright (c) 1989- by SONY Corporation.
     40  */
     41 /*
     42  *	dmac_0448.h
     43  *		DMAC L7A0448
     44  */
     45 
     46 /*	dmac register base address	*/
     47 #define DMAC_BASE		0xbfe00000
     48 
     49 /*	register definition	*/
     50 #define DMAC_GSTAT		(DMAC_BASE + 0xf)
     51 #define DMAC_GSEL		(DMAC_BASE + 0xe)
     52 
     53 #define DMAC_CSTAT		(DMAC_BASE + 0x2)
     54 #define DMAC_CCTL		(DMAC_BASE + 0x3)
     55 #define DMAC_CTRCL		(DMAC_BASE + 0x4)
     56 #define DMAC_CTRCM		(DMAC_BASE + 0x5)
     57 #define DMAC_CTRCH		(DMAC_BASE + 0x6)
     58 #define DMAC_CTAG		(DMAC_BASE + 0x7)
     59 #define DMAC_CWID		(DMAC_BASE + 0x8)
     60 #define DMAC_COFSL		(DMAC_BASE + 0x9)
     61 #define DMAC_COFSH		(DMAC_BASE + 0xa)
     62 #define DMAC_CMAP		(DMAC_BASE + 0xc)
     63 #define DMAC_CMAPH		(DMAC_BASE + 0xc)
     64 #define DMAC_CMAPL		(DMAC_BASE + 0xd)
     65 
     66 #define dmac_gstat		(*(volatile uint8_t *)DMAC_GSTAT)
     67 #define dmac_gsel		(*(volatile uint8_t *)DMAC_GSEL)
     68 
     69 #define dmac_cstat		(*(volatile uint8_t *)DMAC_CSTAT)
     70 #define dmac_cctl		(*(volatile uint8_t *)DMAC_CCTL)
     71 #define dmac_ctrcl		(*(volatile uint8_t *)DMAC_CTRCL)
     72 #define dmac_ctrcm		(*(volatile uint8_t *)DMAC_CTRCM)
     73 #define dmac_ctrch		(*(volatile uint8_t *)DMAC_CTRCH)
     74 #define dmac_ctag		(*(volatile uint8_t *)DMAC_CTAG)
     75 #define dmac_cwid		(*(volatile uint8_t *)DMAC_CWID)
     76 #define dmac_cofsl		(*(volatile uint8_t *)DMAC_COFSL)
     77 #define dmac_cofsh		(*(volatile uint8_t *)DMAC_COFSH)
     78 #define dmac_cmap		(*(volatile uint16_t *)DMAC_CMAP)
     79 #define dmac_cmaph		(*(volatile uint8_t *)DMAC_CMAPH)
     80 #define dmac_cmapl		(*(volatile uint8_t *)DMAC_CMAPL)
     81 
     82 /*	status/control bit definition	*/
     83 #define	DM_TCZ			0x80
     84 #define	DM_A28			0x40
     85 #define	DM_AFIX			0x20
     86 #define	DM_APAD			0x10
     87 #define	DM_ZINTEN		0x08
     88 #define	DM_RST			0x04
     89 #define	DM_MODE			0x02
     90 #define DM_ENABLE		0x01
     91 
     92 /*	general status bit definition	*/
     93 #define CH_INT(x)		(uint8_t)(1 << (2 * x))
     94 #define CH0_INT			0x01
     95 #define CH1_INT			0x04
     96 #define CH2_INT			0x10
     97 #define CH3_INT			0x40
     98 
     99 #define CH_MRQ(x)		(uint8_t)(1 << (2 * x + 1))
    100 #define CH0_MRQ			0x02
    101 #define CH1_MRQ			0x08
    102 #define CH2_MRQ			0x20
    103 #define CH3_MRQ			0x80
    104 
    105 /*	channel definition	*/
    106 #define	CH_SCSI			0
    107 #define	CH_FDC			1
    108 #define	CH_AUDIO		2
    109 #define	CH_VIDEO		3
    110 
    111 /*	dma status		*/
    112 
    113 struct	dm_stat {
    114 	unsigned int dm_gstat;
    115 	unsigned int dm_cstat;
    116 	unsigned int dm_cctl;
    117 	unsigned int dm_tcnt;
    118 	unsigned int dm_offset;
    119 	unsigned int dm_tag;
    120 	unsigned int dm_width;
    121 };
    122 
    123 #define	DMAC_WAIT	DELAY(1)
    124 
    125 #define PINTEN		0xbfc80001
    126 # define	DMA_INTEN	0x10
    127 #define PINTSTAT	0xbfc80003
    128