1 /* $NetBSD: dmareg.h,v 1.17 2014/03/24 19:42:58 christos Exp $ */ 2 3 /* 4 * Copyright (c) 1982, 1990, 1993 5 * The Regents of the University of California. All rights reserved. 6 * 7 * Redistribution and use in source and binary forms, with or without 8 * modification, are permitted provided that the following conditions 9 * are met: 10 * 1. Redistributions of source code must retain the above copyright 11 * notice, this list of conditions and the following disclaimer. 12 * 2. Redistributions in binary form must reproduce the above copyright 13 * notice, this list of conditions and the following disclaimer in the 14 * documentation and/or other materials provided with the distribution. 15 * 3. Neither the name of the University nor the names of its contributors 16 * may be used to endorse or promote products derived from this software 17 * without specific prior written permission. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 20 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 21 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 22 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 23 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 24 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 25 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 26 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 27 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 28 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 29 * SUCH DAMAGE. 30 * 31 * @(#)dmareg.h 8.1 (Berkeley) 6/10/93 32 */ 33 34 #include <hp300/dev/iotypes.h> /* XXX */ 35 #include <machine/hp300spu.h> 36 37 /* 38 * Hardware layout for the 98620[ABC]: 39 * 98620A (old 320s?): byte/word DMA in up to 64K chunks 40 * 98620B (320s only): 98620A with programmable IPL 41 * 98620C (all others): byte/word/longword DMA in up to 4Gb chunks 42 */ 43 44 struct dmaBdevice { 45 v_char *dmaB_addr; 46 vu_short dmaB_count; 47 vu_short dmaB_cmd; 48 #define dmaB_stat dmaB_cmd 49 }; 50 51 struct dmadevice { 52 v_char *dma_addr; 53 vu_int dma_count; 54 vu_short dma_cmd; 55 vu_short dma_stat; 56 }; 57 58 struct dmareg { 59 struct dmaBdevice dma_Bchan0; 60 struct dmaBdevice dma_Bchan1; 61 /* the rest are 98620C specific */ 62 v_char dma_id[4]; 63 vu_char dma_cr; 64 char dma_pad1[0xEB]; 65 struct dmadevice dma_chan0; 66 char dma_pad2[0xF4]; 67 struct dmadevice dma_chan1; 68 }; 69 70 /* The hp300 has 2 DMA channels. */ 71 #define NDMACHAN 2 72 73 /* addresses */ 74 #define DMA_ID2 offsetof(struct dmareg, dma_id[2]) 75 76 /* command bits */ 77 #define DMA_ENAB 0x0001 78 #define DMA_WORD 0x0002 79 #define DMA_WRT 0x0004 80 #define DMA_PRI 0x0008 81 #define DMA_IPL(x) (((x) - 3) << 4) 82 #define DMA_LWORD 0x0100 83 #define DMA_START 0x8000 84 85 /* status bits */ 86 #define DMA_ARMED 0x01 87 #define DMA_INTR 0x02 88 #define DMA_ACC 0x04 89 #define DMA_HALT 0x08 90 #define DMA_BERR 0x10 91 #define DMA_ALIGN 0x20 92 #define DMA_WRAP 0x40 93 94 #ifdef _KERNEL 95 /* 96 * Macros to attempt to hide the HW differences between the 98620B DMA 97 * board and the 1TQ4-0401 DMA chip (68020C "board"). The latter 98 * includes emulation registers for the former but you need to access 99 * the "native-mode" registers directly in order to do 32-bit DMA. 100 * 101 * DMA_CLEAR: Clear interrupt on DMA board. We just use the 102 * emulation registers on the 98620C as that is easiest. 103 * DMA_STAT: Read status register. Again, we always read the 104 * emulation register. Someday we might want to 105 * look at the 98620C status to get the extended bits. 106 * DMA_ARM: Load address, count and kick-off DMA. 107 */ 108 #define DMA_CLEAR(dc) do { \ 109 v_int dmaclr; \ 110 dmaclr = (int)dc->dm_Bhwaddr->dmaB_addr; \ 111 __USE(dmaclr); \ 112 } while (/*CONSTCOND*/0); 113 #define DMA_STAT(dc) dc->dm_Bhwaddr->dmaB_stat 114 115 #if defined(HP320) 116 #define DMA_ARM(sc, dc) \ 117 if (sc->sc_type == DMA_B) { \ 118 struct dmaBdevice *dma = dc->dm_Bhwaddr; \ 119 dma->dmaB_addr = dc->dm_chain[dc->dm_cur].dc_addr; \ 120 dma->dmaB_count = dc->dm_chain[dc->dm_cur].dc_count - 1; \ 121 dma->dmaB_cmd = dc->dm_cmd; \ 122 } else { \ 123 struct dmadevice *dma = dc->dm_hwaddr; \ 124 dma->dma_addr = dc->dm_chain[dc->dm_cur].dc_addr; \ 125 dma->dma_count = dc->dm_chain[dc->dm_cur].dc_count - 1; \ 126 dma->dma_cmd = dc->dm_cmd; \ 127 } 128 #else 129 #define DMA_ARM(sc, dc) \ 130 { \ 131 struct dmadevice *dma = dc->dm_hwaddr; \ 132 dma->dma_addr = dc->dm_chain[dc->dm_cur].dc_addr; \ 133 dma->dma_count = dc->dm_chain[dc->dm_cur].dc_count - 1; \ 134 dma->dma_cmd = dc->dm_cmd; \ 135 } 136 #endif 137 #endif 138
Indexes created Sat Sep 20 22:09:52 GMT 2025