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    Searched defs:DMB (Results 1 - 4 of 4) sorted by relevancy

  /src/common/lib/libc/arch/arm/atomic/
atomic_op_asm.h 78 #define DMB dmb ish
79 #define DMBST dmb ishst
81 #define DMB mcr p15, 0, r0, c7, c10, 5 /* Data Memory Barrier */
82 #define DMBST DMB
  /src/common/lib/libc/arch/aarch64/atomic/
__aarch64_lse.S 67 #define DMB
73 #define DMB
79 #define DMB
85 #define DMB
91 #define DMB dmb ish
147 DMB
149 DMB
154 DMB /* potential barrier */
158 DMB /* potential barrier *
    [all...]
  /src/sys/arch/sandpoint/sandpoint/
satmgr.c 184 #define DMB 1
  /src/sys/arch/sandpoint/stand/altboot/
brdsetup.c 77 #define DMB 1
1156 UART_WRITE(base, DMB, div >> 8); /* set speed */

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