1 /****************************************************************************** 2 * xen.h 3 * 4 * Guest OS interface to Xen. 5 * 6 * Permission is hereby granted, free of charge, to any person obtaining a copy 7 * of this software and associated documentation files (the "Software"), to 8 * deal in the Software without restriction, including without limitation the 9 * rights to use, copy, modify, merge, publish, distribute, sublicense, and/or 10 * sell copies of the Software, and to permit persons to whom the Software is 11 * furnished to do so, subject to the following conditions: 12 * 13 * The above copyright notice and this permission notice shall be included in 14 * all copies or substantial portions of the Software. 15 * 16 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 17 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 18 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE 19 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER 20 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING 21 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER 22 * DEALINGS IN THE SOFTWARE. 23 * 24 * Copyright (c) 2004, K A Fraser 25 */ 26 27 #ifndef __XEN_PUBLIC_XEN_H__ 28 #define __XEN_PUBLIC_XEN_H__ 29 30 #include "xen-compat.h" 31 32 #if defined(__i386__) || defined(__x86_64__) 33 #include "arch-x86/xen.h" 34 #elif defined(__arm__) || defined (__aarch64__) 35 #include "arch-arm.h" 36 #else 37 #error "Unsupported architecture" 38 #endif 39 40 #ifndef __ASSEMBLY__ 41 /* Guest handles for primitive C types. */ 42 DEFINE_XEN_GUEST_HANDLE(char); 43 __DEFINE_XEN_GUEST_HANDLE(uchar, unsigned char); 44 DEFINE_XEN_GUEST_HANDLE(int); 45 __DEFINE_XEN_GUEST_HANDLE(uint, unsigned int); 46 #if __XEN_INTERFACE_VERSION__ < 0x00040300 47 DEFINE_XEN_GUEST_HANDLE(long); 48 __DEFINE_XEN_GUEST_HANDLE(ulong, unsigned long); 49 #endif 50 DEFINE_XEN_GUEST_HANDLE(void); 51 52 DEFINE_XEN_GUEST_HANDLE(uint64_t); 53 DEFINE_XEN_GUEST_HANDLE(xen_pfn_t); 54 DEFINE_XEN_GUEST_HANDLE(xen_ulong_t); 55 56 /* Turn a plain number into a C unsigned (long (long)) constant. */ 57 #define __xen_mk_uint(x) x ## U 58 #define __xen_mk_ulong(x) x ## UL 59 #ifndef __xen_mk_ullong 60 # define __xen_mk_ullong(x) x ## ULL 61 #endif 62 #define xen_mk_uint(x) __xen_mk_uint(x) 63 #define xen_mk_ulong(x) __xen_mk_ulong(x) 64 #define xen_mk_ullong(x) __xen_mk_ullong(x) 65 66 #else 67 68 /* In assembly code we cannot use C numeric constant suffixes. */ 69 #define xen_mk_uint(x) x 70 #define xen_mk_ulong(x) x 71 #define xen_mk_ullong(x) x 72 73 #endif 74 75 /* 76 * HYPERCALLS 77 */ 78 79 /* `incontents 100 hcalls List of hypercalls 80 * ` enum hypercall_num { // __HYPERVISOR_* => HYPERVISOR_*() 81 */ 82 83 #define __HYPERVISOR_set_trap_table 0 84 #define __HYPERVISOR_mmu_update 1 85 #define __HYPERVISOR_set_gdt 2 86 #define __HYPERVISOR_stack_switch 3 87 #define __HYPERVISOR_set_callbacks 4 88 #define __HYPERVISOR_fpu_taskswitch 5 89 #define __HYPERVISOR_sched_op_compat 6 /* compat since 0x00030101 */ 90 #define __HYPERVISOR_platform_op 7 91 #define __HYPERVISOR_set_debugreg 8 92 #define __HYPERVISOR_get_debugreg 9 93 #define __HYPERVISOR_update_descriptor 10 94 #define __HYPERVISOR_memory_op 12 95 #define __HYPERVISOR_multicall 13 96 #define __HYPERVISOR_update_va_mapping 14 97 #define __HYPERVISOR_set_timer_op 15 98 #define __HYPERVISOR_event_channel_op_compat 16 /* compat since 0x00030202 */ 99 #define __HYPERVISOR_xen_version 17 100 #define __HYPERVISOR_console_io 18 101 #define __HYPERVISOR_physdev_op_compat 19 /* compat since 0x00030202 */ 102 #define __HYPERVISOR_grant_table_op 20 103 #define __HYPERVISOR_vm_assist 21 104 #define __HYPERVISOR_update_va_mapping_otherdomain 22 105 #define __HYPERVISOR_iret 23 /* x86 only */ 106 #define __HYPERVISOR_vcpu_op 24 107 #define __HYPERVISOR_set_segment_base 25 /* x86/64 only */ 108 #define __HYPERVISOR_mmuext_op 26 109 #define __HYPERVISOR_xsm_op 27 110 #define __HYPERVISOR_nmi_op 28 111 #define __HYPERVISOR_sched_op 29 112 #define __HYPERVISOR_callback_op 30 113 #define __HYPERVISOR_xenoprof_op 31 114 #define __HYPERVISOR_event_channel_op 32 115 #define __HYPERVISOR_physdev_op 33 116 #define __HYPERVISOR_hvm_op 34 117 #define __HYPERVISOR_sysctl 35 118 #define __HYPERVISOR_domctl 36 119 #define __HYPERVISOR_kexec_op 37 120 #define __HYPERVISOR_tmem_op 38 121 #define __HYPERVISOR_xc_reserved_op 39 /* reserved for XenClient */ 122 #define __HYPERVISOR_xenpmu_op 40 123 #define __HYPERVISOR_dm_op 41 124 125 /* Architecture-specific hypercall definitions. */ 126 #define __HYPERVISOR_arch_0 48 127 #define __HYPERVISOR_arch_1 49 128 #define __HYPERVISOR_arch_2 50 129 #define __HYPERVISOR_arch_3 51 130 #define __HYPERVISOR_arch_4 52 131 #define __HYPERVISOR_arch_5 53 132 #define __HYPERVISOR_arch_6 54 133 #define __HYPERVISOR_arch_7 55 134 135 /* ` } */ 136 137 /* 138 * HYPERCALL COMPATIBILITY. 139 */ 140 141 /* New sched_op hypercall introduced in 0x00030101. */ 142 #if __XEN_INTERFACE_VERSION__ < 0x00030101 143 #undef __HYPERVISOR_sched_op 144 #define __HYPERVISOR_sched_op __HYPERVISOR_sched_op_compat 145 #endif 146 147 /* New event-channel and physdev hypercalls introduced in 0x00030202. */ 148 #if __XEN_INTERFACE_VERSION__ < 0x00030202 149 #undef __HYPERVISOR_event_channel_op 150 #define __HYPERVISOR_event_channel_op __HYPERVISOR_event_channel_op_compat 151 #undef __HYPERVISOR_physdev_op 152 #define __HYPERVISOR_physdev_op __HYPERVISOR_physdev_op_compat 153 #endif 154 155 /* New platform_op hypercall introduced in 0x00030204. */ 156 #if __XEN_INTERFACE_VERSION__ < 0x00030204 157 #define __HYPERVISOR_dom0_op __HYPERVISOR_platform_op 158 #endif 159 160 /* 161 * VIRTUAL INTERRUPTS 162 * 163 * Virtual interrupts that a guest OS may receive from Xen. 164 * 165 * In the side comments, 'V.' denotes a per-VCPU VIRQ while 'G.' denotes a 166 * global VIRQ. The former can be bound once per VCPU and cannot be re-bound. 167 * The latter can be allocated only once per guest: they must initially be 168 * allocated to VCPU0 but can subsequently be re-bound. 169 */ 170 /* ` enum virq { */ 171 #define VIRQ_TIMER 0 /* V. Timebase update, and/or requested timeout. */ 172 #define VIRQ_DEBUG 1 /* V. Request guest to dump debug info. */ 173 #define VIRQ_CONSOLE 2 /* G. (DOM0) Bytes received on emergency console. */ 174 #define VIRQ_DOM_EXC 3 /* G. (DOM0) Exceptional event for some domain. */ 175 #define VIRQ_TBUF 4 /* G. (DOM0) Trace buffer has records available. */ 176 #define VIRQ_DEBUGGER 6 /* G. (DOM0) A domain has paused for debugging. */ 177 #define VIRQ_XENOPROF 7 /* V. XenOprofile interrupt: new sample available */ 178 #define VIRQ_CON_RING 8 /* G. (DOM0) Bytes received on console */ 179 #define VIRQ_PCPU_STATE 9 /* G. (DOM0) PCPU state changed */ 180 #define VIRQ_MEM_EVENT 10 /* G. (DOM0) A memory event has occured */ 181 #define VIRQ_XC_RESERVED 11 /* G. Reserved for XenClient */ 182 #define VIRQ_ENOMEM 12 /* G. (DOM0) Low on heap memory */ 183 #define VIRQ_XENPMU 13 /* V. PMC interrupt */ 184 185 /* Architecture-specific VIRQ definitions. */ 186 #define VIRQ_ARCH_0 16 187 #define VIRQ_ARCH_1 17 188 #define VIRQ_ARCH_2 18 189 #define VIRQ_ARCH_3 19 190 #define VIRQ_ARCH_4 20 191 #define VIRQ_ARCH_5 21 192 #define VIRQ_ARCH_6 22 193 #define VIRQ_ARCH_7 23 194 /* ` } */ 195 196 #define NR_VIRQS 24 197 198 /* 199 * ` enum neg_errnoval 200 * ` HYPERVISOR_mmu_update(const struct mmu_update reqs[], 201 * ` unsigned count, unsigned *done_out, 202 * ` unsigned foreigndom) 203 * ` 204 * @reqs is an array of mmu_update_t structures ((ptr, val) pairs). 205 * @count is the length of the above array. 206 * @pdone is an output parameter indicating number of completed operations 207 * @foreigndom[15:0]: FD, the expected owner of data pages referenced in this 208 * hypercall invocation. Can be DOMID_SELF. 209 * @foreigndom[31:16]: PFD, the expected owner of pagetable pages referenced 210 * in this hypercall invocation. The value of this field 211 * (x) encodes the PFD as follows: 212 * x == 0 => PFD == DOMID_SELF 213 * x != 0 => PFD == x - 1 214 * 215 * Sub-commands: ptr[1:0] specifies the appropriate MMU_* command. 216 * ------------- 217 * ptr[1:0] == MMU_NORMAL_PT_UPDATE: 218 * Updates an entry in a page table belonging to PFD. If updating an L1 table, 219 * and the new table entry is valid/present, the mapped frame must belong to 220 * FD. If attempting to map an I/O page then the caller assumes the privilege 221 * of the FD. 222 * FD == DOMID_IO: Permit /only/ I/O mappings, at the priv level of the caller. 223 * FD == DOMID_XEN: Map restricted areas of Xen's heap space. 224 * ptr[:2] -- Machine address of the page-table entry to modify. 225 * val -- Value to write. 226 * 227 * There also certain implicit requirements when using this hypercall. The 228 * pages that make up a pagetable must be mapped read-only in the guest. 229 * This prevents uncontrolled guest updates to the pagetable. Xen strictly 230 * enforces this, and will disallow any pagetable update which will end up 231 * mapping pagetable page RW, and will disallow using any writable page as a 232 * pagetable. In practice it means that when constructing a page table for a 233 * process, thread, etc, we MUST be very dilligient in following these rules: 234 * 1). Start with top-level page (PGD or in Xen language: L4). Fill out 235 * the entries. 236 * 2). Keep on going, filling out the upper (PUD or L3), and middle (PMD 237 * or L2). 238 * 3). Start filling out the PTE table (L1) with the PTE entries. Once 239 * done, make sure to set each of those entries to RO (so writeable bit 240 * is unset). Once that has been completed, set the PMD (L2) for this 241 * PTE table as RO. 242 * 4). When completed with all of the PMD (L2) entries, and all of them have 243 * been set to RO, make sure to set RO the PUD (L3). Do the same 244 * operation on PGD (L4) pagetable entries that have a PUD (L3) entry. 245 * 5). Now before you can use those pages (so setting the cr3), you MUST also 246 * pin them so that the hypervisor can verify the entries. This is done 247 * via the HYPERVISOR_mmuext_op(MMUEXT_PIN_L4_TABLE, guest physical frame 248 * number of the PGD (L4)). And this point the HYPERVISOR_mmuext_op( 249 * MMUEXT_NEW_BASEPTR, guest physical frame number of the PGD (L4)) can be 250 * issued. 251 * For 32-bit guests, the L4 is not used (as there is less pagetables), so 252 * instead use L3. 253 * At this point the pagetables can be modified using the MMU_NORMAL_PT_UPDATE 254 * hypercall. Also if so desired the OS can also try to write to the PTE 255 * and be trapped by the hypervisor (as the PTE entry is RO). 256 * 257 * To deallocate the pages, the operations are the reverse of the steps 258 * mentioned above. The argument is MMUEXT_UNPIN_TABLE for all levels and the 259 * pagetable MUST not be in use (meaning that the cr3 is not set to it). 260 * 261 * ptr[1:0] == MMU_MACHPHYS_UPDATE: 262 * Updates an entry in the machine->pseudo-physical mapping table. 263 * ptr[:2] -- Machine address within the frame whose mapping to modify. 264 * The frame must belong to the FD, if one is specified. 265 * val -- Value to write into the mapping entry. 266 * 267 * ptr[1:0] == MMU_PT_UPDATE_PRESERVE_AD: 268 * As MMU_NORMAL_PT_UPDATE above, but A/D bits currently in the PTE are ORed 269 * with those in @val. 270 * 271 * ptr[1:0] == MMU_PT_UPDATE_NO_TRANSLATE: 272 * As MMU_NORMAL_PT_UPDATE above, but @val is not translated though FD 273 * page tables. 274 * 275 * @val is usually the machine frame number along with some attributes. 276 * The attributes by default follow the architecture defined bits. Meaning that 277 * if this is a X86_64 machine and four page table layout is used, the layout 278 * of val is: 279 * - 63 if set means No execute (NX) 280 * - 46-13 the machine frame number 281 * - 12 available for guest 282 * - 11 available for guest 283 * - 10 available for guest 284 * - 9 available for guest 285 * - 8 global 286 * - 7 PAT (PSE is disabled, must use hypercall to make 4MB or 2MB pages) 287 * - 6 dirty 288 * - 5 accessed 289 * - 4 page cached disabled 290 * - 3 page write through 291 * - 2 userspace accessible 292 * - 1 writeable 293 * - 0 present 294 * 295 * The one bits that does not fit with the default layout is the PAGE_PSE 296 * also called PAGE_PAT). The MMUEXT_[UN]MARK_SUPER arguments to the 297 * HYPERVISOR_mmuext_op serve as mechanism to set a pagetable to be 4MB 298 * (or 2MB) instead of using the PAGE_PSE bit. 299 * 300 * The reason that the PAGE_PSE (bit 7) is not being utilized is due to Xen 301 * using it as the Page Attribute Table (PAT) bit - for details on it please 302 * refer to Intel SDM 10.12. The PAT allows to set the caching attributes of 303 * pages instead of using MTRRs. 304 * 305 * The PAT MSR is as follows (it is a 64-bit value, each entry is 8 bits): 306 * PAT4 PAT0 307 * +-----+-----+----+----+----+-----+----+----+ 308 * | UC | UC- | WC | WB | UC | UC- | WC | WB | <= Linux 309 * +-----+-----+----+----+----+-----+----+----+ 310 * | UC | UC- | WT | WB | UC | UC- | WT | WB | <= BIOS (default when machine boots) 311 * +-----+-----+----+----+----+-----+----+----+ 312 * | rsv | rsv | WP | WC | UC | UC- | WT | WB | <= Xen 313 * +-----+-----+----+----+----+-----+----+----+ 314 * 315 * The lookup of this index table translates to looking up 316 * Bit 7, Bit 4, and Bit 3 of val entry: 317 * 318 * PAT/PSE (bit 7) ... PCD (bit 4) .. PWT (bit 3). 319 * 320 * If all bits are off, then we are using PAT0. If bit 3 turned on, 321 * then we are using PAT1, if bit 3 and bit 4, then PAT2.. 322 * 323 * As you can see, the Linux PAT1 translates to PAT4 under Xen. Which means 324 * that if a guest that follows Linux's PAT setup and would like to set Write 325 * Combined on pages it MUST use PAT4 entry. Meaning that Bit 7 (PAGE_PAT) is 326 * set. For example, under Linux it only uses PAT0, PAT1, and PAT2 for the 327 * caching as: 328 * 329 * WB = none (so PAT0) 330 * WC = PWT (bit 3 on) 331 * UC = PWT | PCD (bit 3 and 4 are on). 332 * 333 * To make it work with Xen, it needs to translate the WC bit as so: 334 * 335 * PWT (so bit 3 on) --> PAT (so bit 7 is on) and clear bit 3 336 * 337 * And to translate back it would: 338 * 339 * PAT (bit 7 on) --> PWT (bit 3 on) and clear bit 7. 340 */ 341 #define MMU_NORMAL_PT_UPDATE 0 /* checked '*ptr = val'. ptr is MA. */ 342 #define MMU_MACHPHYS_UPDATE 1 /* ptr = MA of frame to modify entry for */ 343 #define MMU_PT_UPDATE_PRESERVE_AD 2 /* atomically: *ptr = val | (*ptr&(A|D)) */ 344 #define MMU_PT_UPDATE_NO_TRANSLATE 3 /* checked '*ptr = val'. ptr is MA. */ 345 /* val never translated. */ 346 347 /* 348 * MMU EXTENDED OPERATIONS 349 * 350 * ` enum neg_errnoval 351 * ` HYPERVISOR_mmuext_op(mmuext_op_t uops[], 352 * ` unsigned int count, 353 * ` unsigned int *pdone, 354 * ` unsigned int foreigndom) 355 */ 356 /* HYPERVISOR_mmuext_op() accepts a list of mmuext_op structures. 357 * A foreigndom (FD) can be specified (or DOMID_SELF for none). 358 * Where the FD has some effect, it is described below. 359 * 360 * cmd: MMUEXT_(UN)PIN_*_TABLE 361 * mfn: Machine frame number to be (un)pinned as a p.t. page. 362 * The frame must belong to the FD, if one is specified. 363 * 364 * cmd: MMUEXT_NEW_BASEPTR 365 * mfn: Machine frame number of new page-table base to install in MMU. 366 * 367 * cmd: MMUEXT_NEW_USER_BASEPTR [x86/64 only] 368 * mfn: Machine frame number of new page-table base to install in MMU 369 * when in user space. 370 * 371 * cmd: MMUEXT_TLB_FLUSH_LOCAL 372 * No additional arguments. Flushes local TLB. 373 * 374 * cmd: MMUEXT_INVLPG_LOCAL 375 * linear_addr: Linear address to be flushed from the local TLB. 376 * 377 * cmd: MMUEXT_TLB_FLUSH_MULTI 378 * vcpumask: Pointer to bitmap of VCPUs to be flushed. 379 * 380 * cmd: MMUEXT_INVLPG_MULTI 381 * linear_addr: Linear address to be flushed. 382 * vcpumask: Pointer to bitmap of VCPUs to be flushed. 383 * 384 * cmd: MMUEXT_TLB_FLUSH_ALL 385 * No additional arguments. Flushes all VCPUs' TLBs. 386 * 387 * cmd: MMUEXT_INVLPG_ALL 388 * linear_addr: Linear address to be flushed from all VCPUs' TLBs. 389 * 390 * cmd: MMUEXT_FLUSH_CACHE 391 * No additional arguments. Writes back and flushes cache contents. 392 * 393 * cmd: MMUEXT_FLUSH_CACHE_GLOBAL 394 * No additional arguments. Writes back and flushes cache contents 395 * on all CPUs in the system. 396 * 397 * cmd: MMUEXT_SET_LDT 398 * linear_addr: Linear address of LDT base (NB. must be page-aligned). 399 * nr_ents: Number of entries in LDT. 400 * 401 * cmd: MMUEXT_CLEAR_PAGE 402 * mfn: Machine frame number to be cleared. 403 * 404 * cmd: MMUEXT_COPY_PAGE 405 * mfn: Machine frame number of the destination page. 406 * src_mfn: Machine frame number of the source page. 407 * 408 * cmd: MMUEXT_[UN]MARK_SUPER 409 * mfn: Machine frame number of head of superpage to be [un]marked. 410 */ 411 /* ` enum mmuext_cmd { */ 412 #define MMUEXT_PIN_L1_TABLE 0 413 #define MMUEXT_PIN_L2_TABLE 1 414 #define MMUEXT_PIN_L3_TABLE 2 415 #define MMUEXT_PIN_L4_TABLE 3 416 #define MMUEXT_UNPIN_TABLE 4 417 #define MMUEXT_NEW_BASEPTR 5 418 #define MMUEXT_TLB_FLUSH_LOCAL 6 419 #define MMUEXT_INVLPG_LOCAL 7 420 #define MMUEXT_TLB_FLUSH_MULTI 8 421 #define MMUEXT_INVLPG_MULTI 9 422 #define MMUEXT_TLB_FLUSH_ALL 10 423 #define MMUEXT_INVLPG_ALL 11 424 #define MMUEXT_FLUSH_CACHE 12 425 #define MMUEXT_SET_LDT 13 426 #define MMUEXT_NEW_USER_BASEPTR 15 427 #define MMUEXT_CLEAR_PAGE 16 428 #define MMUEXT_COPY_PAGE 17 429 #define MMUEXT_FLUSH_CACHE_GLOBAL 18 430 #define MMUEXT_MARK_SUPER 19 431 #define MMUEXT_UNMARK_SUPER 20 432 /* ` } */ 433 434 #ifndef __ASSEMBLY__ 435 struct mmuext_op { 436 unsigned int cmd; /* => enum mmuext_cmd */ 437 union { 438 /* [UN]PIN_TABLE, NEW_BASEPTR, NEW_USER_BASEPTR 439 * CLEAR_PAGE, COPY_PAGE, [UN]MARK_SUPER */ 440 xen_pfn_t mfn; 441 /* INVLPG_LOCAL, INVLPG_ALL, SET_LDT */ 442 unsigned long linear_addr; 443 } arg1; 444 union { 445 /* SET_LDT */ 446 unsigned int nr_ents; 447 /* TLB_FLUSH_MULTI, INVLPG_MULTI */ 448 #if __XEN_INTERFACE_VERSION__ >= 0x00030205 449 XEN_GUEST_HANDLE(const_void) vcpumask; 450 #else 451 const void *vcpumask; 452 #endif 453 /* COPY_PAGE */ 454 xen_pfn_t src_mfn; 455 } arg2; 456 }; 457 typedef struct mmuext_op mmuext_op_t; 458 DEFINE_XEN_GUEST_HANDLE(mmuext_op_t); 459 #endif 460 461 /* 462 * ` enum neg_errnoval 463 * ` HYPERVISOR_update_va_mapping(unsigned long va, u64 val, 464 * ` enum uvm_flags flags) 465 * ` 466 * ` enum neg_errnoval 467 * ` HYPERVISOR_update_va_mapping_otherdomain(unsigned long va, u64 val, 468 * ` enum uvm_flags flags, 469 * ` domid_t domid) 470 * ` 471 * ` @va: The virtual address whose mapping we want to change 472 * ` @val: The new page table entry, must contain a machine address 473 * ` @flags: Control TLB flushes 474 */ 475 /* These are passed as 'flags' to update_va_mapping. They can be ORed. */ 476 /* When specifying UVMF_MULTI, also OR in a pointer to a CPU bitmap. */ 477 /* UVMF_LOCAL is merely UVMF_MULTI with a NULL bitmap pointer. */ 478 /* ` enum uvm_flags { */ 479 #define UVMF_NONE (xen_mk_ulong(0)<<0) /* No flushing at all. */ 480 #define UVMF_TLB_FLUSH (xen_mk_ulong(1)<<0) /* Flush entire TLB(s). */ 481 #define UVMF_INVLPG (xen_mk_ulong(2)<<0) /* Flush only one entry. */ 482 #define UVMF_FLUSHTYPE_MASK (xen_mk_ulong(3)<<0) 483 #define UVMF_MULTI (xen_mk_ulong(0)<<2) /* Flush subset of TLBs. */ 484 #define UVMF_LOCAL (xen_mk_ulong(0)<<2) /* Flush local TLB. */ 485 #define UVMF_ALL (xen_mk_ulong(1)<<2) /* Flush all TLBs. */ 486 /* ` } */ 487 488 /* 489 * Commands to HYPERVISOR_console_io(). 490 */ 491 #define CONSOLEIO_write 0 492 #define CONSOLEIO_read 1 493 494 /* 495 * Commands to HYPERVISOR_vm_assist(). 496 */ 497 #define VMASST_CMD_enable 0 498 #define VMASST_CMD_disable 1 499 500 /* x86/32 guests: simulate full 4GB segment limits. */ 501 #define VMASST_TYPE_4gb_segments 0 502 503 /* x86/32 guests: trap (vector 15) whenever above vmassist is used. */ 504 #define VMASST_TYPE_4gb_segments_notify 1 505 506 /* 507 * x86 guests: support writes to bottom-level PTEs. 508 * NB1. Page-directory entries cannot be written. 509 * NB2. Guest must continue to remove all writable mappings of PTEs. 510 */ 511 #define VMASST_TYPE_writable_pagetables 2 512 513 /* x86/PAE guests: support PDPTs above 4GB. */ 514 #define VMASST_TYPE_pae_extended_cr3 3 515 516 /* 517 * x86 guests: Sane behaviour for virtual iopl 518 * - virtual iopl updated from do_iret() hypercalls. 519 * - virtual iopl reported in bounce frames. 520 * - guest kernels assumed to be level 0 for the purpose of iopl checks. 521 */ 522 #define VMASST_TYPE_architectural_iopl 4 523 524 /* 525 * All guests: activate update indicator in vcpu_runstate_info 526 * Enable setting the XEN_RUNSTATE_UPDATE flag in guest memory mapped 527 * vcpu_runstate_info during updates of the runstate information. 528 */ 529 #define VMASST_TYPE_runstate_update_flag 5 530 531 /* 532 * x86/64 guests: strictly hide M2P from user mode. 533 * This allows the guest to control respective hypervisor behavior: 534 * - when not set, L4 tables get created with the respective slot blank, 535 * and whenever the L4 table gets used as a kernel one the missing 536 * mapping gets inserted, 537 * - when set, L4 tables get created with the respective slot initialized 538 * as before, and whenever the L4 table gets used as a user one the 539 * mapping gets zapped. 540 */ 541 #define VMASST_TYPE_m2p_strict 32 542 543 #if __XEN_INTERFACE_VERSION__ < 0x00040600 544 #define MAX_VMASST_TYPE 3 545 #endif 546 547 /* Domain ids >= DOMID_FIRST_RESERVED cannot be used for ordinary domains. */ 548 #define DOMID_FIRST_RESERVED xen_mk_uint(0x7FF0) 549 550 /* DOMID_SELF is used in certain contexts to refer to oneself. */ 551 #define DOMID_SELF xen_mk_uint(0x7FF0) 552 553 /* 554 * DOMID_IO is used to restrict page-table updates to mapping I/O memory. 555 * Although no Foreign Domain need be specified to map I/O pages, DOMID_IO 556 * is useful to ensure that no mappings to the OS's own heap are accidentally 557 * installed. (e.g., in Linux this could cause havoc as reference counts 558 * aren't adjusted on the I/O-mapping code path). 559 * This only makes sense as HYPERVISOR_mmu_update()'s and 560 * HYPERVISOR_update_va_mapping_otherdomain()'s "foreigndom" argument. For 561 * HYPERVISOR_mmu_update() context it can be specified by any calling domain, 562 * otherwise it's only permitted if the caller is privileged. 563 */ 564 #define DOMID_IO xen_mk_uint(0x7FF1) 565 566 /* 567 * DOMID_XEN is used to allow privileged domains to map restricted parts of 568 * Xen's heap space (e.g., the machine_to_phys table). 569 * This only makes sense as 570 * - HYPERVISOR_mmu_update()'s, HYPERVISOR_mmuext_op()'s, or 571 * HYPERVISOR_update_va_mapping_otherdomain()'s "foreigndom" argument, 572 * - with XENMAPSPACE_gmfn_foreign, 573 * and is only permitted if the caller is privileged. 574 */ 575 #define DOMID_XEN xen_mk_uint(0x7FF2) 576 577 /* 578 * DOMID_COW is used as the owner of sharable pages */ 579 #define DOMID_COW xen_mk_uint(0x7FF3) 580 581 /* DOMID_INVALID is used to identify pages with unknown owner. */ 582 #define DOMID_INVALID xen_mk_uint(0x7FF4) 583 584 /* Idle domain. */ 585 #define DOMID_IDLE xen_mk_uint(0x7FFF) 586 587 #ifndef __ASSEMBLY__ 588 589 typedef uint16_t domid_t; 590 591 /* 592 * Send an array of these to HYPERVISOR_mmu_update(). 593 * NB. The fields are natural pointer/address size for this architecture. 594 */ 595 struct mmu_update { 596 uint64_t ptr; /* Machine address of PTE. */ 597 uint64_t val; /* New contents of PTE. */ 598 }; 599 typedef struct mmu_update mmu_update_t; 600 DEFINE_XEN_GUEST_HANDLE(mmu_update_t); 601 602 /* 603 * ` enum neg_errnoval 604 * ` HYPERVISOR_multicall(multicall_entry_t call_list[], 605 * ` uint32_t nr_calls); 606 * 607 * NB. The fields are logically the natural register size for this 608 * architecture. In cases where xen_ulong_t is larger than this then 609 * any unused bits in the upper portion must be zero. 610 */ 611 struct multicall_entry { 612 xen_ulong_t op, result; 613 xen_ulong_t args[6]; 614 }; 615 typedef struct multicall_entry multicall_entry_t; 616 DEFINE_XEN_GUEST_HANDLE(multicall_entry_t); 617 618 #if __XEN_INTERFACE_VERSION__ < 0x00040400 619 /* 620 * Event channel endpoints per domain (when using the 2-level ABI): 621 * 1024 if a long is 32 bits; 4096 if a long is 64 bits. 622 */ 623 #define NR_EVENT_CHANNELS EVTCHN_2L_NR_CHANNELS 624 #endif 625 626 struct vcpu_time_info { 627 /* 628 * Updates to the following values are preceded and followed by an 629 * increment of 'version'. The guest can therefore detect updates by 630 * looking for changes to 'version'. If the least-significant bit of 631 * the version number is set then an update is in progress and the guest 632 * must wait to read a consistent set of values. 633 * The correct way to interact with the version number is similar to 634 * Linux's seqlock: see the implementations of read_seqbegin/read_seqretry. 635 */ 636 uint32_t version; 637 uint32_t pad0; 638 uint64_t tsc_timestamp; /* TSC at last update of time vals. */ 639 uint64_t system_time; /* Time, in nanosecs, since boot. */ 640 /* 641 * Current system time: 642 * system_time + 643 * ((((tsc - tsc_timestamp) << tsc_shift) * tsc_to_system_mul) >> 32) 644 * CPU frequency (Hz): 645 * ((10^9 << 32) / tsc_to_system_mul) >> tsc_shift 646 */ 647 uint32_t tsc_to_system_mul; 648 int8_t tsc_shift; 649 #if __XEN_INTERFACE_VERSION__ > 0x040600 650 uint8_t flags; 651 uint8_t pad1[2]; 652 #else 653 int8_t pad1[3]; 654 #endif 655 }; /* 32 bytes */ 656 typedef struct vcpu_time_info vcpu_time_info_t; 657 658 #define XEN_PVCLOCK_TSC_STABLE_BIT (1 << 0) 659 #define XEN_PVCLOCK_GUEST_STOPPED (1 << 1) 660 661 struct vcpu_info { 662 /* 663 * 'evtchn_upcall_pending' is written non-zero by Xen to indicate 664 * a pending notification for a particular VCPU. It is then cleared 665 * by the guest OS /before/ checking for pending work, thus avoiding 666 * a set-and-check race. Note that the mask is only accessed by Xen 667 * on the CPU that is currently hosting the VCPU. This means that the 668 * pending and mask flags can be updated by the guest without special 669 * synchronisation (i.e., no need for the x86 LOCK prefix). 670 * This may seem suboptimal because if the pending flag is set by 671 * a different CPU then an IPI may be scheduled even when the mask 672 * is set. However, note: 673 * 1. The task of 'interrupt holdoff' is covered by the per-event- 674 * channel mask bits. A 'noisy' event that is continually being 675 * triggered can be masked at source at this very precise 676 * granularity. 677 * 2. The main purpose of the per-VCPU mask is therefore to restrict 678 * reentrant execution: whether for concurrency control, or to 679 * prevent unbounded stack usage. Whatever the purpose, we expect 680 * that the mask will be asserted only for short periods at a time, 681 * and so the likelihood of a 'spurious' IPI is suitably small. 682 * The mask is read before making an event upcall to the guest: a 683 * non-zero mask therefore guarantees that the VCPU will not receive 684 * an upcall activation. The mask is cleared when the VCPU requests 685 * to block: this avoids wakeup-waiting races. 686 */ 687 uint8_t evtchn_upcall_pending; 688 #ifdef XEN_HAVE_PV_UPCALL_MASK 689 uint8_t evtchn_upcall_mask; 690 #else /* XEN_HAVE_PV_UPCALL_MASK */ 691 uint8_t pad0; 692 #endif /* XEN_HAVE_PV_UPCALL_MASK */ 693 xen_ulong_t evtchn_pending_sel; 694 struct arch_vcpu_info arch; 695 struct vcpu_time_info time; 696 }; /* 64 bytes (x86) */ 697 #ifndef __XEN__ 698 typedef struct vcpu_info vcpu_info_t; 699 #endif 700 701 /* 702 * `incontents 200 startofday_shared Start-of-day shared data structure 703 * Xen/kernel shared data -- pointer provided in start_info. 704 * 705 * This structure is defined to be both smaller than a page, and the 706 * only data on the shared page, but may vary in actual size even within 707 * compatible Xen versions; guests should not rely on the size 708 * of this structure remaining constant. 709 */ 710 struct shared_info { 711 struct vcpu_info vcpu_info[XEN_LEGACY_MAX_VCPUS]; 712 713 /* 714 * A domain can create "event channels" on which it can send and receive 715 * asynchronous event notifications. There are three classes of event that 716 * are delivered by this mechanism: 717 * 1. Bi-directional inter- and intra-domain connections. Domains must 718 * arrange out-of-band to set up a connection (usually by allocating 719 * an unbound 'listener' port and avertising that via a storage service 720 * such as xenstore). 721 * 2. Physical interrupts. A domain with suitable hardware-access 722 * privileges can bind an event-channel port to a physical interrupt 723 * source. 724 * 3. Virtual interrupts ('events'). A domain can bind an event-channel 725 * port to a virtual interrupt source, such as the virtual-timer 726 * device or the emergency console. 727 * 728 * Event channels are addressed by a "port index". Each channel is 729 * associated with two bits of information: 730 * 1. PENDING -- notifies the domain that there is a pending notification 731 * to be processed. This bit is cleared by the guest. 732 * 2. MASK -- if this bit is clear then a 0->1 transition of PENDING 733 * will cause an asynchronous upcall to be scheduled. This bit is only 734 * updated by the guest. It is read-only within Xen. If a channel 735 * becomes pending while the channel is masked then the 'edge' is lost 736 * (i.e., when the channel is unmasked, the guest must manually handle 737 * pending notifications as no upcall will be scheduled by Xen). 738 * 739 * To expedite scanning of pending notifications, any 0->1 pending 740 * transition on an unmasked channel causes a corresponding bit in a 741 * per-vcpu selector word to be set. Each bit in the selector covers a 742 * 'C long' in the PENDING bitfield array. 743 */ 744 xen_ulong_t evtchn_pending[sizeof(xen_ulong_t) * 8]; 745 xen_ulong_t evtchn_mask[sizeof(xen_ulong_t) * 8]; 746 747 /* 748 * Wallclock time: updated only by control software. Guests should base 749 * their gettimeofday() syscall on this wallclock-base value. 750 */ 751 uint32_t wc_version; /* Version counter: see vcpu_time_info_t. */ 752 uint32_t wc_sec; /* Secs 00:00:00 UTC, Jan 1, 1970. */ 753 uint32_t wc_nsec; /* Nsecs 00:00:00 UTC, Jan 1, 1970. */ 754 #if !defined(__i386__) 755 uint32_t wc_sec_hi; 756 # define xen_wc_sec_hi wc_sec_hi 757 #elif !defined(__XEN__) && !defined(__XEN_TOOLS__) 758 # define xen_wc_sec_hi arch.wc_sec_hi 759 #endif 760 761 struct arch_shared_info arch; 762 763 }; 764 #ifndef __XEN__ 765 typedef struct shared_info shared_info_t; 766 #endif 767 768 /* 769 * `incontents 200 startofday Start-of-day memory layout 770 * 771 * 1. The domain is started within contiguous virtual-memory region. 772 * 2. The contiguous region ends on an aligned 4MB boundary. 773 * 3. This the order of bootstrap elements in the initial virtual region: 774 * a. relocated kernel image 775 * b. initial ram disk [mod_start, mod_len] 776 * (may be omitted) 777 * c. list of allocated page frames [mfn_list, nr_pages] 778 * (unless relocated due to XEN_ELFNOTE_INIT_P2M) 779 * d. start_info_t structure [register rSI (x86)] 780 * in case of dom0 this page contains the console info, too 781 * e. unless dom0: xenstore ring page 782 * f. unless dom0: console ring page 783 * g. bootstrap page tables [pt_base and CR3 (x86)] 784 * h. bootstrap stack [register ESP (x86)] 785 * 4. Bootstrap elements are packed together, but each is 4kB-aligned. 786 * 5. The list of page frames forms a contiguous 'pseudo-physical' memory 787 * layout for the domain. In particular, the bootstrap virtual-memory 788 * region is a 1:1 mapping to the first section of the pseudo-physical map. 789 * 6. All bootstrap elements are mapped read-writable for the guest OS. The 790 * only exception is the bootstrap page table, which is mapped read-only. 791 * 7. There is guaranteed to be at least 512kB padding after the final 792 * bootstrap element. If necessary, the bootstrap virtual region is 793 * extended by an extra 4MB to ensure this. 794 * 795 * Note: Prior to 25833:bb85bbccb1c9. ("x86/32-on-64 adjust Dom0 initial page 796 * table layout") a bug caused the pt_base (3.g above) and cr3 to not point 797 * to the start of the guest page tables (it was offset by two pages). 798 * This only manifested itself on 32-on-64 dom0 kernels and not 32-on-64 domU 799 * or 64-bit kernels of any colour. The page tables for a 32-on-64 dom0 got 800 * allocated in the order: 'first L1','first L2', 'first L3', so the offset 801 * to the page table base is by two pages back. The initial domain if it is 802 * 32-bit and runs under a 64-bit hypervisor should _NOT_ use two of the 803 * pages preceding pt_base and mark them as reserved/unused. 804 */ 805 #ifdef XEN_HAVE_PV_GUEST_ENTRY 806 struct start_info { 807 /* THE FOLLOWING ARE FILLED IN BOTH ON INITIAL BOOT AND ON RESUME. */ 808 char magic[32]; /* "xen-<version>-<platform>". */ 809 unsigned long nr_pages; /* Total pages allocated to this domain. */ 810 unsigned long shared_info; /* MACHINE address of shared info struct. */ 811 uint32_t flags; /* SIF_xxx flags. */ 812 xen_pfn_t store_mfn; /* MACHINE page number of shared page. */ 813 uint32_t store_evtchn; /* Event channel for store communication. */ 814 union { 815 struct { 816 xen_pfn_t mfn; /* MACHINE page number of console page. */ 817 uint32_t evtchn; /* Event channel for console page. */ 818 } domU; 819 struct { 820 uint32_t info_off; /* Offset of console_info struct. */ 821 uint32_t info_size; /* Size of console_info struct from start.*/ 822 } dom0; 823 } console; 824 /* THE FOLLOWING ARE ONLY FILLED IN ON INITIAL BOOT (NOT RESUME). */ 825 unsigned long pt_base; /* VIRTUAL address of page directory. */ 826 unsigned long nr_pt_frames; /* Number of bootstrap p.t. frames. */ 827 unsigned long mfn_list; /* VIRTUAL address of page-frame list. */ 828 unsigned long mod_start; /* VIRTUAL address of pre-loaded module */ 829 /* (PFN of pre-loaded module if */ 830 /* SIF_MOD_START_PFN set in flags). */ 831 unsigned long mod_len; /* Size (bytes) of pre-loaded module. */ 832 #define MAX_GUEST_CMDLINE 1024 833 int8_t cmd_line[MAX_GUEST_CMDLINE]; 834 /* The pfn range here covers both page table and p->m table frames. */ 835 unsigned long first_p2m_pfn;/* 1st pfn forming initial P->M table. */ 836 unsigned long nr_p2m_frames;/* # of pfns forming initial P->M table. */ 837 }; 838 typedef struct start_info start_info_t; 839 840 /* New console union for dom0 introduced in 0x00030203. */ 841 #if __XEN_INTERFACE_VERSION__ < 0x00030203 842 #define console_mfn console.domU.mfn 843 #define console_evtchn console.domU.evtchn 844 #endif 845 #endif /* XEN_HAVE_PV_GUEST_ENTRY */ 846 847 /* These flags are passed in the 'flags' field of start_info_t. */ 848 #define SIF_PRIVILEGED (1<<0) /* Is the domain privileged? */ 849 #define SIF_INITDOMAIN (1<<1) /* Is this the initial control domain? */ 850 #define SIF_MULTIBOOT_MOD (1<<2) /* Is mod_start a multiboot module? */ 851 #define SIF_MOD_START_PFN (1<<3) /* Is mod_start a PFN? */ 852 #define SIF_VIRT_P2M_4TOOLS (1<<4) /* Do Xen tools understand a virt. mapped */ 853 /* P->M making the 3 level tree obsolete? */ 854 #define SIF_PM_MASK (0xFF<<8) /* reserve 1 byte for xen-pm options */ 855 856 /* 857 * A multiboot module is a package containing modules very similar to a 858 * multiboot module array. The only differences are: 859 * - the array of module descriptors is by convention simply at the beginning 860 * of the multiboot module, 861 * - addresses in the module descriptors are based on the beginning of the 862 * multiboot module, 863 * - the number of modules is determined by a termination descriptor that has 864 * mod_start == 0. 865 * 866 * This permits to both build it statically and reference it in a configuration 867 * file, and let the PV guest easily rebase the addresses to virtual addresses 868 * and at the same time count the number of modules. 869 */ 870 struct xen_multiboot_mod_list 871 { 872 /* Address of first byte of the module */ 873 uint32_t mod_start; 874 /* Address of last byte of the module (inclusive) */ 875 uint32_t mod_end; 876 /* Address of zero-terminated command line */ 877 uint32_t cmdline; 878 /* Unused, must be zero */ 879 uint32_t pad; 880 }; 881 /* 882 * `incontents 200 startofday_dom0_console Dom0_console 883 * 884 * The console structure in start_info.console.dom0 885 * 886 * This structure includes a variety of information required to 887 * have a working VGA/VESA console. 888 */ 889 typedef struct dom0_vga_console_info { 890 uint8_t video_type; /* DOM0_VGA_CONSOLE_??? */ 891 #define XEN_VGATYPE_TEXT_MODE_3 0x03 892 #define XEN_VGATYPE_VESA_LFB 0x23 893 #define XEN_VGATYPE_EFI_LFB 0x70 894 895 union { 896 struct { 897 /* Font height, in pixels. */ 898 uint16_t font_height; 899 /* Cursor location (column, row). */ 900 uint16_t cursor_x, cursor_y; 901 /* Number of rows and columns (dimensions in characters). */ 902 uint16_t rows, columns; 903 } text_mode_3; 904 905 struct { 906 /* Width and height, in pixels. */ 907 uint16_t width, height; 908 /* Bytes per scan line. */ 909 uint16_t bytes_per_line; 910 /* Bits per pixel. */ 911 uint16_t bits_per_pixel; 912 /* LFB physical address, and size (in units of 64kB). */ 913 uint32_t lfb_base; 914 uint32_t lfb_size; 915 /* RGB mask offsets and sizes, as defined by VBE 1.2+ */ 916 uint8_t red_pos, red_size; 917 uint8_t green_pos, green_size; 918 uint8_t blue_pos, blue_size; 919 uint8_t rsvd_pos, rsvd_size; 920 #if __XEN_INTERFACE_VERSION__ >= 0x00030206 921 /* VESA capabilities (offset 0xa, VESA command 0x4f00). */ 922 uint32_t gbl_caps; 923 /* Mode attributes (offset 0x0, VESA command 0x4f01). */ 924 uint16_t mode_attrs; 925 /* high 32 bits of lfb_base */ 926 uint32_t ext_lfb_base; 927 #endif 928 } vesa_lfb; 929 } u; 930 } dom0_vga_console_info_t; 931 #define xen_vga_console_info dom0_vga_console_info 932 #define xen_vga_console_info_t dom0_vga_console_info_t 933 934 typedef uint8_t xen_domain_handle_t[16]; 935 936 __DEFINE_XEN_GUEST_HANDLE(uint8, uint8_t); 937 __DEFINE_XEN_GUEST_HANDLE(uint16, uint16_t); 938 __DEFINE_XEN_GUEST_HANDLE(uint32, uint32_t); 939 __DEFINE_XEN_GUEST_HANDLE(uint64, uint64_t); 940 941 typedef struct { 942 uint8_t a[16]; 943 } xen_uuid_t; 944 945 /* 946 * XEN_DEFINE_UUID(0x00112233, 0x4455, 0x6677, 0x8899, 947 * 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff) 948 * will construct UUID 00112233-4455-6677-8899-aabbccddeeff presented as 949 * {0x00, 0x11, 0x22, 0x33, 0x44, 0x55, 0x66, 0x77, 0x88, 950 * 0x99, 0xaa, 0xbb, 0xcc, 0xdd, 0xee, 0xff}; 951 * 952 * NB: This is compatible with Linux kernel and with libuuid, but it is not 953 * compatible with Microsoft, as they use mixed-endian encoding (some 954 * components are little-endian, some are big-endian). 955 */ 956 #define XEN_DEFINE_UUID_(a, b, c, d, e1, e2, e3, e4, e5, e6) \ 957 {{((a) >> 24) & 0xFF, ((a) >> 16) & 0xFF, \ 958 ((a) >> 8) & 0xFF, ((a) >> 0) & 0xFF, \ 959 ((b) >> 8) & 0xFF, ((b) >> 0) & 0xFF, \ 960 ((c) >> 8) & 0xFF, ((c) >> 0) & 0xFF, \ 961 ((d) >> 8) & 0xFF, ((d) >> 0) & 0xFF, \ 962 e1, e2, e3, e4, e5, e6}} 963 964 #if defined(__STDC_VERSION__) ? __STDC_VERSION__ >= 199901L : defined(__GNUC__) 965 #define XEN_DEFINE_UUID(a, b, c, d, e1, e2, e3, e4, e5, e6) \ 966 ((xen_uuid_t)XEN_DEFINE_UUID_(a, b, c, d, e1, e2, e3, e4, e5, e6)) 967 #else 968 #define XEN_DEFINE_UUID(a, b, c, d, e1, e2, e3, e4, e5, e6) \ 969 XEN_DEFINE_UUID_(a, b, c, d, e1, e2, e3, e4, e5, e6) 970 #endif /* __STDC_VERSION__ / __GNUC__ */ 971 972 #endif /* !__ASSEMBLY__ */ 973 974 /* Default definitions for macros used by domctl/sysctl. */ 975 #if defined(__XEN__) || defined(__XEN_TOOLS__) 976 977 #ifndef int64_aligned_t 978 #define int64_aligned_t int64_t 979 #endif 980 #ifndef uint64_aligned_t 981 #define uint64_aligned_t uint64_t 982 #endif 983 #ifndef XEN_GUEST_HANDLE_64 984 #define XEN_GUEST_HANDLE_64(name) XEN_GUEST_HANDLE(name) 985 #endif 986 987 #ifndef __ASSEMBLY__ 988 struct xenctl_bitmap { 989 XEN_GUEST_HANDLE_64(uint8) bitmap; 990 uint32_t nr_bits; 991 }; 992 #endif 993 994 #endif /* defined(__XEN__) || defined(__XEN_TOOLS__) */ 995 996 #endif /* __XEN_PUBLIC_XEN_H__ */ 997 998 /* 999 * Local variables: 1000 * mode: C 1001 * c-file-style: "BSD" 1002 * c-basic-offset: 4 1003 * tab-width: 4 1004 * indent-tabs-mode: nil 1005 * End: 1006 */ 1007
Indexes created Sun Sep 21 19:09:51 GMT 2025