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      1 /*	$NetBSD: if_ne_pbusreg.h,v 1.4 2024/02/10 09:21:52 andvar Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1998 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Mark Brinicombe of Causality Limited.
      9  *
     10  * EtherH code Copyright (c) 1998 Mike Pumford
     11  *
     12  * Redistribution and use in source and binary forms, with or without
     13  * modification, are permitted provided that the following conditions
     14  * are met:
     15  * 1. Redistributions of source code must retain the above copyright
     16  *    notice, this list of conditions and the following disclaimer.
     17  * 2. Redistributions in binary form must reproduce the above copyright
     18  *    notice, this list of conditions and the following disclaimer in the
     19  *    documentation and/or other materials provided with the distribution.
     20  *
     21  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     22  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     23  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     24  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     25  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     26  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     27  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     28  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     29  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     30  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     31  * POSSIBILITY OF SUCH DAMAGE.
     32  *
     33  * Register definitions for podulebus hosted ne2000 ethernet controllers
     34  */
     35 
     36 /* EtherM netslot cards */
     37 #define EM_NIC_OFFSET	0x0800
     38 #define EM_NIC_SIZE	(NE2000_NIC_NPORTS << EM_REGSHIFT)
     39 #define EM_ASIC_OFFSET	(EM_NIC_OFFSET + (NE2000_ASIC_OFFSET << EM_REGSHIFT))
     40 #define EM_ASIC_SIZE	(NE2000_ASIC_NPORTS << EM_REGSHIFT)
     41 #define EM_REGSHIFT	5
     42 
     43 /* EtherM interface has a special Diagnostic status register */
     44 #define EM_DSR_REG	0x0d	/* Register number from ASIC base */
     45 
     46 /* Diagnostic status register */
     47 #define EM_DSR_20M	(1 << 1) /* 20MHz VCO functioning */
     48 #define EM_DSR_TCOK	(1 << 2) /* Transmit clock functioning */
     49 #define EM_DSR_POL	(1 << 3) /* Polarity of UTP link */
     50 #define EM_DSR_JAB	(1 << 4) /* Jabber state */
     51 #define EM_DSR_LNK	(1 << 5) /* Link state */
     52 #define EM_DSR_LBK	(1 << 6) /* Loopback mode */
     53 #define EM_DSR_UTP	(1 << 7) /* Twisted pair selected */
     54 
     55 /* EtherLan 600 definitions */
     56 #define EH600_CONTROL_OFFSET    0x0a00
     57 #define EH600_CONTROL_SIZE      (1 << EH600_REGSHIFT)
     58 #define EH600_NIC_OFFSET	0x0800
     59 #define EH600_NIC_SIZE		(NE2000_NIC_NPORTS << EH600_REGSHIFT)
     60 #define EH600_ASIC_OFFSET	(EH600_NIC_OFFSET + (NE2000_ASIC_OFFSET \
     61 				    << EH600_REGSHIFT))
     62 #define EH600_ASIC_SIZE		(NE2000_ASIC_NPORTS << EH600_REGSHIFT)
     63 #define EH600_REGSHIFT		2
     64 
     65 #define EH600_MEM_START         0x100   /* buffer ram start */
     66 #define EH600_MEM_END           0x8000  /* buffer ram end */
     67 
     68 /* Acorn EtherN registers */
     69 #define EN_REGSHIFT             3
     70 #define EN_NIC_OFFSET           0x400000
     71 #define EN_NIC_SIZE             (NE2000_NIC_NPORTS << EN_REGSHIFT)
     72 #define EN_ASIC_OFFSET	        (EN_NIC_OFFSET + (NE2000_ASIC_OFFSET \
     73 				    << EN_REGSHIFT))
     74 #define EN_ASIC_SIZE		(NE2000_ASIC_NPORTS << EN_REGSHIFT)
     75 
     76 /* Etherlan 600 control register */
     77 /*Write only */
     78 #define EH_INTR_MASK    (1 << 0)        /* Interrupt Mask.              */
     79 #define EH_ID_CONTROL   (1 << 1)        /* ID control.                  */
     80 /* Read only */
     81 #define EH_INTR_STAT    (1 << 0)        /* Interrupt status.            */
     82