1 /* 2 * Copyright 2006-2007 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 */ 22 /* based on stg/asic_reg/drivers/inc/asic_reg/ObjectID.h ver 23 */ 23 24 #ifndef _OBJECTID_H 25 #define _OBJECTID_H 26 27 #if defined(_X86_) 28 #pragma pack(1) 29 #endif 30 31 /****************************************************/ 32 /* Graphics Object Type Definition */ 33 /****************************************************/ 34 #define GRAPH_OBJECT_TYPE_NONE 0x0 35 #define GRAPH_OBJECT_TYPE_GPU 0x1 36 #define GRAPH_OBJECT_TYPE_ENCODER 0x2 37 #define GRAPH_OBJECT_TYPE_CONNECTOR 0x3 38 #define GRAPH_OBJECT_TYPE_ROUTER 0x4 39 /* deleted */ 40 41 /****************************************************/ 42 /* Encoder Object ID Definition */ 43 /****************************************************/ 44 #define ENCODER_OBJECT_ID_NONE 0x00 45 46 /* Radeon Class Display Hardware */ 47 #define ENCODER_OBJECT_ID_INTERNAL_LVDS 0x01 48 #define ENCODER_OBJECT_ID_INTERNAL_TMDS1 0x02 49 #define ENCODER_OBJECT_ID_INTERNAL_TMDS2 0x03 50 #define ENCODER_OBJECT_ID_INTERNAL_DAC1 0x04 51 #define ENCODER_OBJECT_ID_INTERNAL_DAC2 0x05 /* TV/CV DAC */ 52 #define ENCODER_OBJECT_ID_INTERNAL_SDVOA 0x06 53 #define ENCODER_OBJECT_ID_INTERNAL_SDVOB 0x07 54 55 /* External Third Party Encoders */ 56 #define ENCODER_OBJECT_ID_SI170B 0x08 57 #define ENCODER_OBJECT_ID_CH7303 0x09 58 #define ENCODER_OBJECT_ID_CH7301 0x0A 59 #define ENCODER_OBJECT_ID_INTERNAL_DVO1 0x0B /* This belongs to Radeon Class Display Hardware */ 60 #define ENCODER_OBJECT_ID_EXTERNAL_SDVOA 0x0C 61 #define ENCODER_OBJECT_ID_EXTERNAL_SDVOB 0x0D 62 #define ENCODER_OBJECT_ID_TITFP513 0x0E 63 #define ENCODER_OBJECT_ID_INTERNAL_LVTM1 0x0F /* not used for Radeon */ 64 #define ENCODER_OBJECT_ID_VT1623 0x10 65 #define ENCODER_OBJECT_ID_HDMI_SI1930 0x11 66 #define ENCODER_OBJECT_ID_HDMI_INTERNAL 0x12 67 /* Kaleidoscope (KLDSCP) Class Display Hardware (internal) */ 68 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 0x13 69 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 0x14 70 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 0x15 71 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 0x16 /* Shared with CV/TV and CRT */ 72 #define ENCODER_OBJECT_ID_SI178 0X17 /* External TMDS (dual link, no HDCP.) */ 73 #define ENCODER_OBJECT_ID_MVPU_FPGA 0x18 /* MVPU FPGA chip */ 74 #define ENCODER_OBJECT_ID_INTERNAL_DDI 0x19 75 #define ENCODER_OBJECT_ID_VT1625 0x1A 76 #define ENCODER_OBJECT_ID_HDMI_SI1932 0x1B 77 #define ENCODER_OBJECT_ID_DP_AN9801 0x1C 78 #define ENCODER_OBJECT_ID_DP_DP501 0x1D 79 #define ENCODER_OBJECT_ID_INTERNAL_UNIPHY 0x1E 80 #define ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA 0x1F 81 #define ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 0x20 82 #define ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 0x21 83 84 #define ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO 0xFF 85 86 /****************************************************/ 87 /* Connector Object ID Definition */ 88 /****************************************************/ 89 #define CONNECTOR_OBJECT_ID_NONE 0x00 90 #define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I 0x01 91 #define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I 0x02 92 #define CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D 0x03 93 #define CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D 0x04 94 #define CONNECTOR_OBJECT_ID_VGA 0x05 95 #define CONNECTOR_OBJECT_ID_COMPOSITE 0x06 96 #define CONNECTOR_OBJECT_ID_SVIDEO 0x07 97 #define CONNECTOR_OBJECT_ID_YPbPr 0x08 98 #define CONNECTOR_OBJECT_ID_D_CONNECTOR 0x09 99 #define CONNECTOR_OBJECT_ID_9PIN_DIN 0x0A /* Supports both CV & TV */ 100 #define CONNECTOR_OBJECT_ID_SCART 0x0B 101 #define CONNECTOR_OBJECT_ID_HDMI_TYPE_A 0x0C 102 #define CONNECTOR_OBJECT_ID_HDMI_TYPE_B 0x0D 103 #define CONNECTOR_OBJECT_ID_LVDS 0x0E 104 #define CONNECTOR_OBJECT_ID_7PIN_DIN 0x0F 105 #define CONNECTOR_OBJECT_ID_PCIE_CONNECTOR 0x10 106 #define CONNECTOR_OBJECT_ID_CROSSFIRE 0x11 107 #define CONNECTOR_OBJECT_ID_HARDCODE_DVI 0x12 108 #define CONNECTOR_OBJECT_ID_DISPLAYPORT 0x13 109 #define CONNECTOR_OBJECT_ID_eDP 0x14 110 #define CONNECTOR_OBJECT_ID_MXM 0x15 111 112 /* deleted */ 113 114 /****************************************************/ 115 /* Router Object ID Definition */ 116 /****************************************************/ 117 #define ROUTER_OBJECT_ID_NONE 0x00 118 #define ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL 0x01 119 120 /****************************************************/ 121 /* Generic Object ID Definition */ 122 /****************************************************/ 123 #define GENERIC_OBJECT_ID_NONE 0x00 124 #define GENERIC_OBJECT_ID_GLSYNC 0x01 125 #define GENERIC_OBJECT_ID_PX2_NON_DRIVABLE 0x02 126 #define GENERIC_OBJECT_ID_MXM_OPM 0x03 127 128 /****************************************************/ 129 /* Graphics Object ENUM ID Definition */ 130 /****************************************************/ 131 #define GRAPH_OBJECT_ENUM_ID1 0x01 132 #define GRAPH_OBJECT_ENUM_ID2 0x02 133 #define GRAPH_OBJECT_ENUM_ID3 0x03 134 #define GRAPH_OBJECT_ENUM_ID4 0x04 135 #define GRAPH_OBJECT_ENUM_ID5 0x05 136 #define GRAPH_OBJECT_ENUM_ID6 0x06 137 #define GRAPH_OBJECT_ENUM_ID7 0x07 138 139 /****************************************************/ 140 /* Graphics Object ID Bit definition */ 141 /****************************************************/ 142 #define OBJECT_ID_MASK 0x00FF 143 #define ENUM_ID_MASK 0x0700 144 #define RESERVED1_ID_MASK 0x0800 145 #define OBJECT_TYPE_MASK 0x7000 146 #define RESERVED2_ID_MASK 0x8000 147 148 #define OBJECT_ID_SHIFT 0x00 149 #define ENUM_ID_SHIFT 0x08 150 #define OBJECT_TYPE_SHIFT 0x0C 151 152 153 /****************************************************/ 154 /* Graphics Object family definition */ 155 /****************************************************/ 156 #define CONSTRUCTOBJECTFAMILYID(GRAPHICS_OBJECT_TYPE, GRAPHICS_OBJECT_ID) (GRAPHICS_OBJECT_TYPE << OBJECT_TYPE_SHIFT | \ 157 GRAPHICS_OBJECT_ID << OBJECT_ID_SHIFT) 158 /****************************************************/ 159 /* GPU Object ID definition - Shared with BIOS */ 160 /****************************************************/ 161 #define GPU_ENUM_ID1 ( GRAPH_OBJECT_TYPE_GPU << OBJECT_TYPE_SHIFT |\ 162 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT) 163 164 /****************************************************/ 165 /* Encoder Object ID definition - Shared with BIOS */ 166 /****************************************************/ 167 /* 168 #define ENCODER_INTERNAL_LVDS_ENUM_ID1 0x2101 169 #define ENCODER_INTERNAL_TMDS1_ENUM_ID1 0x2102 170 #define ENCODER_INTERNAL_TMDS2_ENUM_ID1 0x2103 171 #define ENCODER_INTERNAL_DAC1_ENUM_ID1 0x2104 172 #define ENCODER_INTERNAL_DAC2_ENUM_ID1 0x2105 173 #define ENCODER_INTERNAL_SDVOA_ENUM_ID1 0x2106 174 #define ENCODER_INTERNAL_SDVOB_ENUM_ID1 0x2107 175 #define ENCODER_SIL170B_ENUM_ID1 0x2108 176 #define ENCODER_CH7303_ENUM_ID1 0x2109 177 #define ENCODER_CH7301_ENUM_ID1 0x210A 178 #define ENCODER_INTERNAL_DVO1_ENUM_ID1 0x210B 179 #define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 0x210C 180 #define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 0x210D 181 #define ENCODER_TITFP513_ENUM_ID1 0x210E 182 #define ENCODER_INTERNAL_LVTM1_ENUM_ID1 0x210F 183 #define ENCODER_VT1623_ENUM_ID1 0x2110 184 #define ENCODER_HDMI_SI1930_ENUM_ID1 0x2111 185 #define ENCODER_HDMI_INTERNAL_ENUM_ID1 0x2112 186 #define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 0x2113 187 #define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 0x2114 188 #define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 0x2115 189 #define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 0x2116 190 #define ENCODER_SI178_ENUM_ID1 0x2117 191 #define ENCODER_MVPU_FPGA_ENUM_ID1 0x2118 192 #define ENCODER_INTERNAL_DDI_ENUM_ID1 0x2119 193 #define ENCODER_VT1625_ENUM_ID1 0x211A 194 #define ENCODER_HDMI_SI1932_ENUM_ID1 0x211B 195 #define ENCODER_ENCODER_DP_AN9801_ENUM_ID1 0x211C 196 #define ENCODER_DP_DP501_ENUM_ID1 0x211D 197 #define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 0x211E 198 */ 199 #define ENCODER_INTERNAL_LVDS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 200 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 201 ENCODER_OBJECT_ID_INTERNAL_LVDS << OBJECT_ID_SHIFT) 202 203 #define ENCODER_INTERNAL_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 204 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 205 ENCODER_OBJECT_ID_INTERNAL_TMDS1 << OBJECT_ID_SHIFT) 206 207 #define ENCODER_INTERNAL_TMDS2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 208 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 209 ENCODER_OBJECT_ID_INTERNAL_TMDS2 << OBJECT_ID_SHIFT) 210 211 #define ENCODER_INTERNAL_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 212 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 213 ENCODER_OBJECT_ID_INTERNAL_DAC1 << OBJECT_ID_SHIFT) 214 215 #define ENCODER_INTERNAL_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 216 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 217 ENCODER_OBJECT_ID_INTERNAL_DAC2 << OBJECT_ID_SHIFT) 218 219 #define ENCODER_INTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 220 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 221 ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT) 222 223 #define ENCODER_INTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 224 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 225 ENCODER_OBJECT_ID_INTERNAL_SDVOA << OBJECT_ID_SHIFT) 226 227 #define ENCODER_INTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 228 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 229 ENCODER_OBJECT_ID_INTERNAL_SDVOB << OBJECT_ID_SHIFT) 230 231 #define ENCODER_SIL170B_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 232 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 233 ENCODER_OBJECT_ID_SI170B << OBJECT_ID_SHIFT) 234 235 #define ENCODER_CH7303_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 236 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 237 ENCODER_OBJECT_ID_CH7303 << OBJECT_ID_SHIFT) 238 239 #define ENCODER_CH7301_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 240 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 241 ENCODER_OBJECT_ID_CH7301 << OBJECT_ID_SHIFT) 242 243 #define ENCODER_INTERNAL_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 244 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 245 ENCODER_OBJECT_ID_INTERNAL_DVO1 << OBJECT_ID_SHIFT) 246 247 #define ENCODER_EXTERNAL_SDVOA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 248 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 249 ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT) 250 251 #define ENCODER_EXTERNAL_SDVOA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 252 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 253 ENCODER_OBJECT_ID_EXTERNAL_SDVOA << OBJECT_ID_SHIFT) 254 255 256 #define ENCODER_EXTERNAL_SDVOB_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 257 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 258 ENCODER_OBJECT_ID_EXTERNAL_SDVOB << OBJECT_ID_SHIFT) 259 260 261 #define ENCODER_TITFP513_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 262 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 263 ENCODER_OBJECT_ID_TITFP513 << OBJECT_ID_SHIFT) 264 265 #define ENCODER_INTERNAL_LVTM1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 266 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 267 ENCODER_OBJECT_ID_INTERNAL_LVTM1 << OBJECT_ID_SHIFT) 268 269 #define ENCODER_VT1623_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 270 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 271 ENCODER_OBJECT_ID_VT1623 << OBJECT_ID_SHIFT) 272 273 #define ENCODER_HDMI_SI1930_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 274 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 275 ENCODER_OBJECT_ID_HDMI_SI1930 << OBJECT_ID_SHIFT) 276 277 #define ENCODER_HDMI_INTERNAL_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 278 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 279 ENCODER_OBJECT_ID_HDMI_INTERNAL << OBJECT_ID_SHIFT) 280 281 #define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 282 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 283 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT) 284 285 286 #define ENCODER_INTERNAL_KLDSCP_TMDS1_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 287 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 288 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_TMDS1 << OBJECT_ID_SHIFT) 289 290 291 #define ENCODER_INTERNAL_KLDSCP_DVO1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 292 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 293 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DVO1 << OBJECT_ID_SHIFT) 294 295 #define ENCODER_INTERNAL_KLDSCP_DAC1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 296 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 297 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC1 << OBJECT_ID_SHIFT) 298 299 #define ENCODER_INTERNAL_KLDSCP_DAC2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 300 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 301 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_DAC2 << OBJECT_ID_SHIFT) // Shared with CV/TV and CRT 302 303 #define ENCODER_SI178_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 304 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 305 ENCODER_OBJECT_ID_SI178 << OBJECT_ID_SHIFT) 306 307 #define ENCODER_MVPU_FPGA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 308 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 309 ENCODER_OBJECT_ID_MVPU_FPGA << OBJECT_ID_SHIFT) 310 311 #define ENCODER_INTERNAL_DDI_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 312 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 313 ENCODER_OBJECT_ID_INTERNAL_DDI << OBJECT_ID_SHIFT) 314 315 #define ENCODER_VT1625_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 316 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 317 ENCODER_OBJECT_ID_VT1625 << OBJECT_ID_SHIFT) 318 319 #define ENCODER_HDMI_SI1932_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 320 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 321 ENCODER_OBJECT_ID_HDMI_SI1932 << OBJECT_ID_SHIFT) 322 323 #define ENCODER_DP_DP501_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 324 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 325 ENCODER_OBJECT_ID_DP_DP501 << OBJECT_ID_SHIFT) 326 327 #define ENCODER_DP_AN9801_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 328 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 329 ENCODER_OBJECT_ID_DP_AN9801 << OBJECT_ID_SHIFT) 330 331 #define ENCODER_INTERNAL_UNIPHY_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 332 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 333 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT) 334 335 #define ENCODER_INTERNAL_UNIPHY_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 336 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 337 ENCODER_OBJECT_ID_INTERNAL_UNIPHY << OBJECT_ID_SHIFT) 338 339 #define ENCODER_INTERNAL_KLDSCP_LVTMA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 340 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 341 ENCODER_OBJECT_ID_INTERNAL_KLDSCP_LVTMA << OBJECT_ID_SHIFT) 342 343 #define ENCODER_INTERNAL_UNIPHY1_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 344 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 345 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT) 346 347 #define ENCODER_INTERNAL_UNIPHY1_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 348 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 349 ENCODER_OBJECT_ID_INTERNAL_UNIPHY1 << OBJECT_ID_SHIFT) 350 351 #define ENCODER_INTERNAL_UNIPHY2_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 352 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 353 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT) 354 355 #define ENCODER_INTERNAL_UNIPHY2_ENUM_ID2 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 356 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 357 ENCODER_OBJECT_ID_INTERNAL_UNIPHY2 << OBJECT_ID_SHIFT) 358 359 #define ENCODER_GENERAL_EXTERNAL_DVO_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ENCODER << OBJECT_TYPE_SHIFT |\ 360 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 361 ENCODER_OBJECT_ID_GENERAL_EXTERNAL_DVO << OBJECT_ID_SHIFT) 362 363 /****************************************************/ 364 /* Connector Object ID definition - Shared with BIOS */ 365 /****************************************************/ 366 /* 367 #define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 0x3101 368 #define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 0x3102 369 #define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 0x3103 370 #define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 0x3104 371 #define CONNECTOR_VGA_ENUM_ID1 0x3105 372 #define CONNECTOR_COMPOSITE_ENUM_ID1 0x3106 373 #define CONNECTOR_SVIDEO_ENUM_ID1 0x3107 374 #define CONNECTOR_YPbPr_ENUM_ID1 0x3108 375 #define CONNECTOR_D_CONNECTORE_ENUM_ID1 0x3109 376 #define CONNECTOR_9PIN_DIN_ENUM_ID1 0x310A 377 #define CONNECTOR_SCART_ENUM_ID1 0x310B 378 #define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 0x310C 379 #define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 0x310D 380 #define CONNECTOR_LVDS_ENUM_ID1 0x310E 381 #define CONNECTOR_7PIN_DIN_ENUM_ID1 0x310F 382 #define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 0x3110 383 */ 384 #define CONNECTOR_LVDS_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 385 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 386 CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT) 387 388 #define CONNECTOR_LVDS_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 389 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 390 CONNECTOR_OBJECT_ID_LVDS << OBJECT_ID_SHIFT) 391 392 #define CONNECTOR_eDP_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 393 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 394 CONNECTOR_OBJECT_ID_eDP << OBJECT_ID_SHIFT) 395 396 #define CONNECTOR_eDP_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 397 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 398 CONNECTOR_OBJECT_ID_eDP << OBJECT_ID_SHIFT) 399 400 #define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 401 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 402 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT) 403 404 #define CONNECTOR_SINGLE_LINK_DVI_I_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 405 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 406 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_I << OBJECT_ID_SHIFT) 407 408 #define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 409 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 410 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT) 411 412 #define CONNECTOR_DUAL_LINK_DVI_I_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 413 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 414 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_I << OBJECT_ID_SHIFT) 415 416 #define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 417 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 418 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT) 419 420 #define CONNECTOR_SINGLE_LINK_DVI_D_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 421 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 422 CONNECTOR_OBJECT_ID_SINGLE_LINK_DVI_D << OBJECT_ID_SHIFT) 423 424 #define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 425 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 426 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT) 427 428 #define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 429 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 430 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT) 431 432 #define CONNECTOR_DUAL_LINK_DVI_D_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 433 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\ 434 CONNECTOR_OBJECT_ID_DUAL_LINK_DVI_D << OBJECT_ID_SHIFT) 435 436 #define CONNECTOR_VGA_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 437 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 438 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT) 439 440 #define CONNECTOR_VGA_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 441 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 442 CONNECTOR_OBJECT_ID_VGA << OBJECT_ID_SHIFT) 443 444 #define CONNECTOR_COMPOSITE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 445 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 446 CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT) 447 448 #define CONNECTOR_COMPOSITE_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 449 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 450 CONNECTOR_OBJECT_ID_COMPOSITE << OBJECT_ID_SHIFT) 451 452 #define CONNECTOR_SVIDEO_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 453 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 454 CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT) 455 456 #define CONNECTOR_SVIDEO_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 457 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 458 CONNECTOR_OBJECT_ID_SVIDEO << OBJECT_ID_SHIFT) 459 460 #define CONNECTOR_YPbPr_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 461 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 462 CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT) 463 464 #define CONNECTOR_YPbPr_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 465 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 466 CONNECTOR_OBJECT_ID_YPbPr << OBJECT_ID_SHIFT) 467 468 #define CONNECTOR_D_CONNECTOR_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 469 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 470 CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT) 471 472 #define CONNECTOR_D_CONNECTOR_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 473 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 474 CONNECTOR_OBJECT_ID_D_CONNECTOR << OBJECT_ID_SHIFT) 475 476 #define CONNECTOR_9PIN_DIN_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 477 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 478 CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT) 479 480 #define CONNECTOR_9PIN_DIN_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 481 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 482 CONNECTOR_OBJECT_ID_9PIN_DIN << OBJECT_ID_SHIFT) 483 484 #define CONNECTOR_SCART_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 485 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 486 CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT) 487 488 #define CONNECTOR_SCART_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 489 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 490 CONNECTOR_OBJECT_ID_SCART << OBJECT_ID_SHIFT) 491 492 #define CONNECTOR_HDMI_TYPE_A_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 493 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 494 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT) 495 496 #define CONNECTOR_HDMI_TYPE_A_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 497 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 498 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT) 499 500 #define CONNECTOR_HDMI_TYPE_A_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 501 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\ 502 CONNECTOR_OBJECT_ID_HDMI_TYPE_A << OBJECT_ID_SHIFT) 503 504 #define CONNECTOR_HDMI_TYPE_B_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 505 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 506 CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT) 507 508 #define CONNECTOR_HDMI_TYPE_B_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 509 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 510 CONNECTOR_OBJECT_ID_HDMI_TYPE_B << OBJECT_ID_SHIFT) 511 512 #define CONNECTOR_7PIN_DIN_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 513 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 514 CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT) 515 #define CONNECTOR_7PIN_DIN_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 516 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 517 CONNECTOR_OBJECT_ID_7PIN_DIN << OBJECT_ID_SHIFT) 518 519 #define CONNECTOR_PCIE_CONNECTOR_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 520 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 521 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT) 522 523 #define CONNECTOR_PCIE_CONNECTOR_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 524 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 525 CONNECTOR_OBJECT_ID_PCIE_CONNECTOR << OBJECT_ID_SHIFT) 526 527 #define CONNECTOR_CROSSFIRE_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 528 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 529 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT) 530 531 #define CONNECTOR_CROSSFIRE_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 532 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 533 CONNECTOR_OBJECT_ID_CROSSFIRE << OBJECT_ID_SHIFT) 534 535 536 #define CONNECTOR_HARDCODE_DVI_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 537 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 538 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT) 539 540 #define CONNECTOR_HARDCODE_DVI_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 541 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 542 CONNECTOR_OBJECT_ID_HARDCODE_DVI << OBJECT_ID_SHIFT) 543 544 #define CONNECTOR_DISPLAYPORT_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 545 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 546 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT) 547 548 #define CONNECTOR_DISPLAYPORT_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 549 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 550 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT) 551 552 #define CONNECTOR_DISPLAYPORT_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 553 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\ 554 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT) 555 556 #define CONNECTOR_DISPLAYPORT_ENUM_ID4 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 557 GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\ 558 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT) 559 560 #define CONNECTOR_DISPLAYPORT_ENUM_ID5 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 561 GRAPH_OBJECT_ENUM_ID5 << ENUM_ID_SHIFT |\ 562 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT) 563 564 #define CONNECTOR_DISPLAYPORT_ENUM_ID6 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 565 GRAPH_OBJECT_ENUM_ID6 << ENUM_ID_SHIFT |\ 566 CONNECTOR_OBJECT_ID_DISPLAYPORT << OBJECT_ID_SHIFT) 567 568 #define CONNECTOR_MXM_ENUM_ID1 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 569 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 570 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DP_A 571 572 #define CONNECTOR_MXM_ENUM_ID2 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 573 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 574 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DP_B 575 576 #define CONNECTOR_MXM_ENUM_ID3 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 577 GRAPH_OBJECT_ENUM_ID3 << ENUM_ID_SHIFT |\ 578 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DP_C 579 580 #define CONNECTOR_MXM_ENUM_ID4 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 581 GRAPH_OBJECT_ENUM_ID4 << ENUM_ID_SHIFT |\ 582 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DP_D 583 584 #define CONNECTOR_MXM_ENUM_ID5 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 585 GRAPH_OBJECT_ENUM_ID5 << ENUM_ID_SHIFT |\ 586 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_LVDS_TXxx 587 588 #define CONNECTOR_MXM_ENUM_ID6 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 589 GRAPH_OBJECT_ENUM_ID6 << ENUM_ID_SHIFT |\ 590 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_LVDS_UXxx 591 592 #define CONNECTOR_MXM_ENUM_ID7 ( GRAPH_OBJECT_TYPE_CONNECTOR << OBJECT_TYPE_SHIFT |\ 593 GRAPH_OBJECT_ENUM_ID7 << ENUM_ID_SHIFT |\ 594 CONNECTOR_OBJECT_ID_MXM << OBJECT_ID_SHIFT) //Mapping to MXM_DAC 595 596 /****************************************************/ 597 /* Router Object ID definition - Shared with BIOS */ 598 /****************************************************/ 599 #define ROUTER_I2C_EXTENDER_CNTL_ENUM_ID1 ( GRAPH_OBJECT_TYPE_ROUTER << OBJECT_TYPE_SHIFT |\ 600 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 601 ROUTER_OBJECT_ID_I2C_EXTENDER_CNTL << OBJECT_ID_SHIFT) 602 603 /* deleted */ 604 605 /****************************************************/ 606 /* Generic Object ID definition - Shared with BIOS */ 607 /****************************************************/ 608 #define GENERICOBJECT_GLSYNC_ENUM_ID1 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\ 609 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 610 GENERIC_OBJECT_ID_GLSYNC << OBJECT_ID_SHIFT) 611 612 #define GENERICOBJECT_PX2_NON_DRIVABLE_ID1 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\ 613 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 614 GENERIC_OBJECT_ID_PX2_NON_DRIVABLE<< OBJECT_ID_SHIFT) 615 616 #define GENERICOBJECT_PX2_NON_DRIVABLE_ID2 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\ 617 GRAPH_OBJECT_ENUM_ID2 << ENUM_ID_SHIFT |\ 618 GENERIC_OBJECT_ID_PX2_NON_DRIVABLE<< OBJECT_ID_SHIFT) 619 620 #define GENERICOBJECT_MXM_OPM_ENUM_ID1 (GRAPH_OBJECT_TYPE_GENERIC << OBJECT_TYPE_SHIFT |\ 621 GRAPH_OBJECT_ENUM_ID1 << ENUM_ID_SHIFT |\ 622 GENERIC_OBJECT_ID_MXM_OPM << OBJECT_ID_SHIFT) 623 624 /****************************************************/ 625 /* Object Cap definition - Shared with BIOS */ 626 /****************************************************/ 627 #define GRAPHICS_OBJECT_CAP_I2C 0x00000001L 628 #define GRAPHICS_OBJECT_CAP_TABLE_ID 0x00000002L 629 630 631 #define GRAPHICS_OBJECT_I2CCOMMAND_TABLE_ID 0x01 632 #define GRAPHICS_OBJECT_HOTPLUGDETECTIONINTERUPT_TABLE_ID 0x02 633 #define GRAPHICS_OBJECT_ENCODER_OUTPUT_PROTECTION_TABLE_ID 0x03 634 635 #if defined(_X86_) 636 #pragma pack() 637 #endif 638 639 #endif /*GRAPHICTYPE */ 640 641 642 643 644
Indexes created Sun Jul 19 00:25:04 UTC 2026