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    Searched defs:FPSR (Results 1 - 9 of 9) sorted by relevancy

  /src/external/gpl3/gdb/dist/sim/aarch64/
aarch64-sim.h 37 uint32_t FPSR; /* Floating point Status register. */
  /src/external/gpl3/gdb.old/dist/sim/aarch64/
aarch64-sim.h 37 uint32_t FPSR; /* Floating point Status register. */
  /src/sys/external/bsd/gnu-efi/dist/inc/ia64/
efisetjmp_arch.h 46 UINT64 FPSR;
  /src/external/gpl3/gdb/dist/gdb/stubs/
sparc-stub.c 119 Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR };
230 ! CPSR and FPSR not impl
662 0); /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
675 8 * 4, 0); /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
  /src/external/gpl3/gdb.old/dist/gdb/stubs/
sparc-stub.c 119 Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR };
230 ! CPSR and FPSR not impl
662 0); /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
675 8 * 4, 0); /* Y, PSR, WIM, TBR, PC, NPC, FPSR, CPSR */
  /src/external/gpl3/gdb/dist/gdbserver/
linux-aarch64-low.cc 233 collect_register (regcache, AARCH64_FPSR_REGNUM, &regset->fpsr);
246 supply_register (regcache, AARCH64_FPSR_REGNUM, &regset->fpsr);
1177 - FPSR: Floating-point status register.
1185 FPSR = (0x1 << 14) | (0x3 << 11) | (0x4 << 7) | (0x4 << 3) | 0x1,
2294 | FPSR |
2361 /* Save CPSR (NZCV), FPSR and FPCR:
2364 MRS x1, fpsr
2373 p += emit_mrs (p, x1, FPSR);
2500 /* Restore CPSR (NZCV), FPSR and FPCR. And free all special purpose
2508 MSR FPSR, x
    [all...]
  /src/external/gpl3/gdb/dist/sim/v850/
v850-sim.h 145 #define FPSR (FPU_SR[6])
205 ((FPSR >> 24) &0xf)
208 (FPSR &= ~(1 << (bbb+24)))
211 (FPSR |= 1 << (bbb+24))
214 ((FPSR & (1 << (bbb+24))) != 0)
217 (((FPSR & FPSR_RM) == FPSR_RN) ? sim_fpu_round_near \
218 : ((FPSR & FPSR_RM) == 0x00040000) ? sim_fpu_round_up \
219 : ((FPSR & FPSR_RM) == 0x00080000) ? sim_fpu_round_down \
  /src/external/gpl3/gdb.old/dist/gdbserver/
linux-aarch64-low.cc 233 collect_register (regcache, AARCH64_FPSR_REGNUM, &regset->fpsr);
246 supply_register (regcache, AARCH64_FPSR_REGNUM, &regset->fpsr);
1181 - FPSR: Floating-point status register.
1189 FPSR = (0x1 << 14) | (0x3 << 11) | (0x4 << 7) | (0x4 << 3) | 0x1,
2298 | FPSR |
2365 /* Save CPSR (NZCV), FPSR and FPCR:
2368 MRS x1, fpsr
2377 p += emit_mrs (p, x1, FPSR);
2504 /* Restore CPSR (NZCV), FPSR and FPCR. And free all special purpose
2512 MSR FPSR, x
    [all...]
  /src/external/gpl3/gdb.old/dist/sim/v850/
v850-sim.h 145 #define FPSR (FPU_SR[6])
205 ((FPSR >> 24) &0xf)
208 (FPSR &= ~(1 << (bbb+24)))
211 (FPSR |= 1 << (bbb+24))
214 ((FPSR & (1 << (bbb+24))) != 0)
217 (((FPSR & FPSR_RM) == FPSR_RN) ? sim_fpu_round_near \
218 : ((FPSR & FPSR_RM) == 0x00040000) ? sim_fpu_round_up \
219 : ((FPSR & FPSR_RM) == 0x00080000) ? sim_fpu_round_down \

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