| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/MCTargetDesc/ |
| AMDGPUFixupKinds.h | 16 enum Fixups {
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/MCTargetDesc/ |
| WebAssemblyFixupKinds.h | 16 enum Fixups {
|
| /src/external/apache2/llvm/dist/llvm/lib/MC/ |
| MCXCOFFStreamer.cpp | 101 SmallVector<MCFixup, 4> Fixups;
104 Assembler.getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI);
106 // Add the fixups and data.
110 for (auto &Fixup : Fixups) {
|
| MCWasmStreamer.cpp | 164 SmallVector<MCFixup, 4> Fixups;
167 Assembler.getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI);
173 // Add the fixups and data.
174 for (unsigned I = 0, E = Fixups.size(); I != E; ++I) {
175 Fixups[I].setOffset(Fixups[I].getOffset() + DF->getContents().size());
176 DF->getFixups().push_back(Fixups[I]);
|
| MCELFStreamer.cpp | 530 SmallVector<MCFixup, 4> Fixups;
533 Assembler.getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI);
535 for (auto &Fixup : Fixups)
546 // fragment of its own. If there are no fixups registered for the
574 else if (!isBundleLocked() && Fixups.size() == 0) {
577 // there are no fixups registered.
602 // Add the fixups and data.
603 for (auto &Fixup : Fixups) {
|
| MCMachOStreamer.cpp | 462 SmallVector<MCFixup, 4> Fixups;
465 getAssembler().getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI);
467 // Add the fixups and data.
468 for (MCFixup &Fixup : Fixups) {
|
| MCWinCOFFStreamer.cpp | 55 SmallVector<MCFixup, 4> Fixups;
58 getAssembler().getEmitter().encodeInstruction(Inst, VecOS, Fixups, STI);
60 // Add the fixups and data.
61 for (unsigned i = 0, e = Fixups.size(); i != e; ++i) {
62 Fixups[i].setOffset(Fixups[i].getOffset() + DF->getContents().size());
63 DF->getFixups().push_back(Fixups[i]);
|
| MCCodeView.cpp | 610 SmallVectorImpl<MCFixup> &Fixups = Frag.getFixups();
611 Fixups.clear();
667 Fixups.push_back(MCFixup::create(Contents.size(), BE, FK_SecRel_4));
670 Fixups.push_back(MCFixup::create(Contents.size(), BE, FK_SecRel_2));
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/CSKY/MCTargetDesc/ |
| CSKYFixupKinds.h | 16 enum Fixups {
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/MCTargetDesc/ |
| LanaiFixupKinds.h | 24 enum Fixups {
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/MCTargetDesc/ |
| MSP430FixupKinds.h | 23 enum Fixups {
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/MCTargetDesc/ |
| PPCFixupKinds.h | 18 enum Fixups {
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/MCTargetDesc/ |
| X86FixupKinds.h | 16 enum Fixups {
|
| /src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/ |
| LlvmState.cpp | 75 SmallVector<MCFixup, 4> Fixups;
76 CodeEmitter->encodeInstruction(Inst, OS, Fixups,
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64FixupKinds.h | 17 enum Fixups {
28 // unsigned 12-bit fixups for load and store instructions.
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/MCTargetDesc/ |
| RISCVFixupKinds.h | 18 enum Fixups {
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/VE/MCTargetDesc/ |
| VEFixupKinds.h | 16 enum Fixups {
48 /// fixups for Thread Local Storage
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| AMDGPUMCInstLower.cpp | 313 SmallVector<MCFixup, 4> Fixups;
319 InstEmitter->encodeInstruction(TmpInst, CodeStream, Fixups, STI);
336 SmallVector<MCFixup, 4> Fixups;
341 TmpInst, CodeStream, Fixups, MF->getSubtarget<MCSubtargetInfo>());
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMFixupKinds.h | 16 enum Fixups {
62 // The following fixups handle the ARM BL instructions. These can be
69 // fixup_arm_uncondbl and fixup_arm_condbl as identical fixups.
108 // Fixups for Branch Future.
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/MCTargetDesc/ |
| AVRFixupKinds.h | 17 /// The set of supported fixups.
26 enum Fixups {
133 namespace fixups { namespace in namespace:llvm::AVR
143 } // end of namespace fixups
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/MCTargetDesc/ |
| HexagonAsmBackend.cpp | 51 SmallVector<MCFixup, 4> Fixups;
54 E.encodeInstruction(HMB, VecOS, Fixups, *RF.getSubtargetInfo());
59 RF.getFixups() = Fixups;
|
| HexagonFixupKinds.h | 16 enum Fixups {
17 // Branch fixups for R_HEX_B{22,15,7}_PCREL.
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/MCTargetDesc/ |
| SparcFixupKinds.h | 16 enum Fixups {
78 /// fixups for Thread Local Storage
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/MCTargetDesc/ |
| MipsFixupKinds.h | 24 enum Fixups {
25 // Branch fixups resulting in R_MIPS_16.
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/MC/ |
| MCFragment.h | 202 /// data and also have fixups registered.
208 /// The list of fixups in this fragment.
209 SmallVector<MCFixup, FixupsSize> Fixups;
223 SmallVectorImpl<MCFixup> &getFixups() { return Fixups; }
224 const SmallVectorImpl<MCFixup> &getFixups() const { return Fixups; }
226 fixup_iterator fixup_begin() { return Fixups.begin(); }
227 const_fixup_iterator fixup_begin() const { return Fixups.begin(); }
229 fixup_iterator fixup_end() { return Fixups.end(); }
230 const_fixup_iterator fixup_end() const { return Fixups.end(); }
253 /// instruction (non-relaxable) that has no fixups registered. When applicable
[all...] |
