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    Searched defs:FramePtr (Results 1 - 16 of 16) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
M68kRegisterInfo.h 37 unsigned FramePtr;
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86RegisterInfo.h 42 /// FramePtr - X86 physical register used as frame ptr.
44 unsigned FramePtr;
144 Register getFramePtr() const { return FramePtr; }
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Coroutines/
CoroCleanup.cpp 49 auto *FramePtr = Builder.CreateBitCast(FrameRaw, FramePtrTy);
50 auto *Gep = Builder.CreateConstInBoundsGEP2_32(FrameTy, FramePtr, 0, Index);
CoroInternal.h 125 Instruction *FramePtr;
CoroSplit.cpp 168 const coro::Shape &Shape, Value *FramePtr,
175 Shape.emitDealloc(Builder, FramePtr, CG);
225 const coro::Shape &Shape, Value *FramePtr,
252 maybeFreeRetconStorage(Builder, Shape, FramePtr, CG);
259 maybeFreeRetconStorage(Builder, Shape, FramePtr, CG);
283 Value *FramePtr, bool InResume,
299 maybeFreeRetconStorage(Builder, Shape, FramePtr, CG);
313 Value *FramePtr, bool InResume, CallGraph *CG) {
315 replaceUnwindCoroEnd(End, Shape, FramePtr, InResume, CG);
317 replaceFallthroughCoroEnd(End, Shape, FramePtr, InResume, CG)
    [all...]
CoroFrame.cpp 1070 DBuilder.insertDeclare(Shape.FramePtr, FrameDIVar,
1072 Shape.FramePtr->getNextNode());
1467 Shape.FramePtr =
1468 cast<Instruction>(Builder.CreateBitCast(CB, FramePtrTy, "FramePtr"));
1482 // %FramePtr = bitcast i8* hdl to %f.frame*
1499 Instruction *FramePtr = Shape.FramePtr;
1525 Builder.CreateInBoundsGEP(FrameTy, FramePtr, Indices));
1550 InsertPt = FramePtr->getNextNode();
1565 InsertPt = FramePtr->getNextNode()
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
SjLjEHPrepare.cpp 403 Value *FramePtr = Builder.CreateConstGEP2_32(doubleUnderJBufTy, JBufPtr, 0, 0,
407 Builder.CreateStore(Val, FramePtr, /*isVolatile=*/true);
  /src/external/apache2/llvm/dist/llvm/lib/Target/XCore/
XCoreFrameLowering.cpp 34 static const unsigned FramePtr = XCore::R10;
151 FramePtr));
307 BuildMI(MBB, MBBI, dl, TII.get(XCore::LDAWSP_ru6), FramePtr).addImm(0);
310 MRI->getDwarfRegNum(FramePtr, true));
386 BuildMI(MBB, MBBI, dl, TII.get(XCore::SETSP_1r)).addReg(FramePtr);
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
Thumb1FrameLowering.cpp 169 Register FramePtr = RegInfo->getFrameRegister(MF);
226 if (Reg == FramePtr)
304 BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr)
312 nullptr, MRI->getDwarfRegNum(FramePtr, true), CFAOffset));
319 nullptr, MRI->getDwarfRegNum(FramePtr, true)));
381 if (isARMLowRegister(Reg) && !(HasFP && Reg == FramePtr)) {
488 Register FramePtr = RegInfo->getFrameRegister(MF);
519 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes,
526 .addReg(FramePtr)
536 if (isARMLowRegister(Reg) && !(HasFP && Reg == FramePtr)) {
    [all...]
ARMExpandPseudoInsts.cpp 2257 Register FramePtr = RI.getFrameRegister(MF);
2263 FramePtr, -NumBytes, ARMCC::AL, 0, *TII);
2266 FramePtr, -NumBytes, *TII, RI);
2269 FramePtr, -NumBytes, ARMCC::AL, 0,
ARMFrameLowering.cpp 455 Register FramePtr = RegInfo->getFrameRegister(MF);
514 if (Reg == FramePtr)
687 dl, TII, FramePtr, ARM::SP,
692 nullptr, MRI->getDwarfRegNum(FramePtr, true),
700 nullptr, MRI->getDwarfRegNum(FramePtr, true)));
873 Register FramePtr = RegInfo->getFrameRegister(MF);
913 emitARMRegPlusImmediate(MBB, MBBI, dl, ARM::SP, FramePtr, -NumBytes,
926 emitT2RegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes,
937 .addReg(FramePtr)
943 .addReg(FramePtr)
    [all...]
ARMFastISel.cpp 2494 Register FramePtr = RegInfo->getFrameRegister(*(FuncInfo.MF));
2495 unsigned SrcReg = FramePtr;
  /src/external/apache2/llvm/dist/clang/lib/Sema/
SemaCoroutine.cpp 329 Expr *FramePtr =
338 return S.BuildCallExpr(nullptr, FromAddr.get(), Loc, FramePtr, Loc);
1375 Expr *FramePtr =
1408 buildBuiltinCall(S, Loc, Builtin::BI__builtin_coro_free, {FramePtr});
  /src/external/apache2/llvm/dist/llvm/include/llvm/DebugInfo/CodeView/
CodeView.h 539 FramePtr = 2,
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64FastISel.cpp 3415 Register FramePtr = RegInfo->getFrameRegister(*(FuncInfo.MF));
3418 TII.get(TargetOpcode::COPY), SrcReg).addReg(FramePtr);
AArch64FrameLowering.cpp 1578 Register FramePtr = RegInfo->getFrameRegister(MF);
1581 unsigned Reg = RegInfo->getDwarfRegNum(FramePtr, true);

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