HomeSort by: relevance | last modified time | path
    Searched defs:FuncInfo (Results 1 - 25 of 45) sorted by relevancy

1 2

  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/AsmPrinter/
PseudoProbePrinter.cpp 28 NamedMDNode *FuncInfo = M->getNamedMetadata(PseudoProbeDescMetadataName);
29 assert(FuncInfo && "Pseudo probe descriptors are missing");
30 for (const auto *Operand : FuncInfo->operands()) {
WinException.cpp 108 const WinEHFuncInfo &FuncInfo = *MF->getWinEHFuncInfo();
111 emitEHRegistrationOffsetLabel(FuncInfo, FLinkageName);
356 const WinEHFuncInfo &FuncInfo) {
372 assert(FuncInfo.EHRegNodeEndOffset != INT_MAX);
374 Offset += StackOffset::getFixed(FuncInfo.EHRegNodeEndOffset);
573 const WinEHFuncInfo &FuncInfo = *MF->getWinEHFuncInfo();
589 MCConstantExpr::create(FuncInfo.SEHSetFrameOffset, Ctx);
623 InvokeStateChangeIterator::range(FuncInfo, MF->begin(), Stop)) {
627 emitSEHActionsForRange(FuncInfo, LastStartLabel,
636 void WinException::emitSEHActionsForRange(const WinEHFuncInfo &FuncInfo,
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUPerfHintAnalysis.h 39 struct FuncInfo {
44 FuncInfo() : MemInstCount(0), InstCount(0), IAMInstCount(0),
48 typedef ValueMap<const Function*, FuncInfo> FuncInfoMap;
SILowerSGPRSpills.cpp 251 SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>();
252 const Register PreReservedVGPR = FuncInfo->VGPRReservedForSGPRSpill;
272 llvm::find_if(FuncInfo->getSGPRSpillVGPRs(),
277 assert(ReservedVGPRInfoItr != FuncInfo->getSGPRSpillVGPRs().end());
279 std::distance(FuncInfo->getSGPRSpillVGPRs().begin(), ReservedVGPRInfoItr);
281 FuncInfo->setSGPRSpillVGPRs(LowestAvailableVGPR, FI, Index);
308 SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>();
313 if (FuncInfo->VGPRReservedForSGPRSpill) {
315 FuncInfo->removeVGPRForSGPRSpill(FuncInfo->VGPRReservedForSGPRSpill, MF)
    [all...]
SIMachineFunctionInfo.cpp 285 SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>();
308 if (FuncInfo->VGPRReservedForSGPRSpill && NumVGPRSpillLanes < WaveSize) {
309 assert(FuncInfo->VGPRReservedForSGPRSpill == SpillVGPRs.back().VGPR);
310 LaneVGPR = FuncInfo->VGPRReservedForSGPRSpill;
348 SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>();
355 FuncInfo->VGPRReservedForSGPRSpill = LaneVGPR;
AMDGPUCallLowering.cpp 998 const SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>();
999 if (OutInfo.getNextStackOffset() > FuncInfo->getBytesInStackArgArea()) {
1085 const GCNSubtarget &ST, const SIMachineFunctionInfo &FuncInfo,
1091 MIRBuilder.buildCopy(LLT::vector(4, 32), FuncInfo.getScratchRSrcReg());
1107 SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>();
1154 unsigned NumReusableBytes = FuncInfo->getBytesInStackArgArea();
1206 handleImplicitCallArguments(MIRBuilder, MIB, ST, *FuncInfo, ImplicitArgRegs);
SIFrameLowering.cpp 119 const SIMachineFunctionInfo &FuncInfo,
134 FuncInfo.getStackPtrOffsetReg(), 0, MMO, nullptr,
141 const SIMachineFunctionInfo &FuncInfo,
155 FuncInfo.getStackPtrOffsetReg(), 0, MMO, nullptr,
670 const SIMachineFunctionInfo *FuncInfo,
696 SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>();
699 initLiveRegs(LiveRegs, TRI, FuncInfo, MF, MBB, MBBI, IsProlog);
724 SIMachineFunctionInfo *FuncInfo = MF.getInfo<SIMachineFunctionInfo>();
725 if (FuncInfo->isEntryFunction()) {
736 Register StackPtrReg = FuncInfo->getStackPtrOffsetReg()
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/
SparcFrameLowering.cpp 87 SparcMachineFunctionInfo *FuncInfo = MF.getInfo<SparcMachineFunctionInfo>();
112 if (FuncInfo->isLeafProc()) {
216 SparcMachineFunctionInfo *FuncInfo = MF.getInfo<SparcMachineFunctionInfo>();
223 if (!FuncInfo->isLeafProc()) {
260 const SparcMachineFunctionInfo *FuncInfo = MF.getInfo<SparcMachineFunctionInfo>();
270 if (FuncInfo->isLeafProc()) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/VE/
VEFrameLowering.cpp 140 const VEMachineFunctionInfo *FuncInfo = MF.getInfo<VEMachineFunctionInfo>();
151 if (!FuncInfo->isLeafProc()) {
188 const VEMachineFunctionInfo *FuncInfo = MF.getInfo<VEMachineFunctionInfo>();
214 if (!FuncInfo->isLeafProc()) {
310 const VEMachineFunctionInfo *FuncInfo = MF.getInfo<VEMachineFunctionInfo>();
335 if (!FuncInfo->isLeafProc()) {
353 if (!FuncInfo->isLeafProc())
361 assert((RuntimeAlign == None || !FuncInfo->isLeafProc()) &&
394 const VEMachineFunctionInfo *FuncInfo = MF.getInfo<VEMachineFunctionInfo>();
403 if (!FuncInfo->isLeafProc())
    [all...]
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
FastISel.h 202 FunctionLoweringInfo &FuncInfo;
322 explicit FastISel(FunctionLoweringInfo &FuncInfo,
SwitchLoweringUtils.h 251 SwitchLowering(FunctionLoweringInfo &funcinfo) : FuncInfo(funcinfo) {}
298 FunctionLoweringInfo &FuncInfo;
SelectionDAGISel.h 43 std::unique_ptr<FunctionLoweringInfo> FuncInfo;
  /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/
AVRFrameLowering.cpp 226 const AVRMachineFunctionInfo *FuncInfo = MF.getInfo<AVRMachineFunctionInfo>();
228 return (FuncInfo->getHasSpills() || FuncInfo->getHasAllocas() ||
229 FuncInfo->getHasStackArgs());
423 AVRMachineFunctionInfo *FuncInfo = MF.getInfo<AVRMachineFunctionInfo>();
434 FuncInfo->setHasAllocas(true);
463 FuncInfo->setHasStackArgs(true);
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86CallFrameOptimization.cpp 597 X86MachineFunctionInfo *FuncInfo = MF.getInfo<X86MachineFunctionInfo>();
598 FuncInfo->setHasPushSequences(true);
X86WinEHState.cpp 63 void addStateStores(Function &F, WinEHFuncInfo &FuncInfo);
74 WinEHFuncInfo &FuncInfo, BasicBlock *BB);
76 WinEHFuncInfo &FuncInfo, CallBase &Call);
189 WinEHFuncInfo FuncInfo;
190 addStateStores(F, FuncInfo);
508 DenseMap<BasicBlock *, ColorVector> &BlockColors, WinEHFuncInfo &FuncInfo,
517 auto BaseStateI = FuncInfo.FuncletBaseStateMap.find(FuncletPad);
518 if (BaseStateI != FuncInfo.FuncletBaseStateMap.end())
527 DenseMap<BasicBlock *, ColorVector> &BlockColors, WinEHFuncInfo &FuncInfo,
531 assert(FuncInfo.InvokeStateMap.count(II) && "invoke has no state!")
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/
Mips16ISelLowering.cpp 416 MipsFunctionInfo *FuncInfo = MF.getInfo<MipsFunctionInfo>();
438 if (!IsPICCall && (Signature && (FuncInfo->StubsNeeded.find(Symbol) ==
439 FuncInfo->StubsNeeded.end()))) {
440 FuncInfo->StubsNeeded[Symbol] = Signature;
455 FuncInfo->setSaveS2();
495 FuncInfo->callPtrInfo(MF, S->getSymbol()));
MipsInstructionSelector.cpp 904 MipsFunctionInfo *FuncInfo = MF.getInfo<MipsFunctionInfo>();
905 int FI = FuncInfo->getVarArgsFrameIndex();
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/GlobalISel/
IRTranslator.h 579 FunctionLoweringInfo FuncInfo;
592 GISelSwitchLowering(IRTranslator *irt, FunctionLoweringInfo &funcinfo)
593 : SwitchLowering(funcinfo), IRT(irt) {
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
SelectionDAGBuilder.h 396 SDAGSwitchLowering(SelectionDAGBuilder *sdb, FunctionLoweringInfo &funcinfo)
397 : SwitchCG::SwitchLowering(funcinfo), SDB(sdb) {}
422 FunctionLoweringInfo &FuncInfo;
439 SelectionDAGBuilder(SelectionDAG &dag, FunctionLoweringInfo &funcinfo,
442 SL(std::make_unique<SDAGSwitchLowering>(this, funcinfo)), FuncInfo(funcinfo),
886 SDValue getCopyFromRegs(SelectionDAG &DAG, FunctionLoweringInfo &FuncInfo,
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/GISel/
AArch64CallLowering.cpp 477 AArch64FunctionInfo *FuncInfo = MF.getInfo<AArch64FunctionInfo>();
491 FuncInfo->getForwardedMustTailRegParms();
561 AArch64FunctionInfo *FuncInfo = MF.getInfo<AArch64FunctionInfo>();
576 FuncInfo->setVarArgsStackIndex(MFI.CreateFixedObject(4, StackOffset, true));
587 FuncInfo->setArgumentStackToRestore(StackOffset);
597 FuncInfo->setBytesInStackArgArea(StackOffset);
712 const AArch64FunctionInfo *FuncInfo = MF.getInfo<AArch64FunctionInfo>();
713 if (OutInfo.getNextStackOffset() > FuncInfo->getBytesInStackArgArea()) {
889 AArch64FunctionInfo *FuncInfo = MF.getInfo<AArch64FunctionInfo>();
948 unsigned NumReusableBytes = FuncInfo->getBytesInStackArgArea()
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARC/
ARCISelLowering.cpp 736 auto *FuncInfo = MF.getInfo<ARCFunctionInfo>();
742 SDValue FR = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(), PtrVT);
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCRegisterInfo.cpp 317 const PPCFunctionInfo *FuncInfo = MF.getInfo<PPCFunctionInfo>();
318 if (!TM.isPPC64() || FuncInfo->usesTOCBasePtr() || MF.hasInlineAsm())
  /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/
BTFDebug.cpp 830 // Account for FuncInfo/LineInfo record size as well.
858 OS.AddComment("FuncInfo");
861 OS.AddComment("FuncInfo section string offset=" +
865 for (const auto &FuncInfo : FuncSec.second) {
866 Asm->emitLabelReference(FuncInfo.Label, 4);
867 OS.emitInt32(FuncInfo.TypeId);
970 // Construct funcinfo and the first lineinfo for the function.
972 BTFFuncInfo FuncInfo;
973 FuncInfo.Label = FuncLabel;
974 FuncInfo.TypeId = FuncTypeId
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
LanaiISelLowering.cpp 1004 LanaiMachineFunctionInfo *FuncInfo = MF.getInfo<LanaiMachineFunctionInfo>();
1007 SDValue FI = DAG.getFrameIndex(FuncInfo->getVarArgsFrameIndex(),
  /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/
MSP430ISelLowering.cpp 624 MSP430MachineFunctionInfo *FuncInfo = MF.getInfo<MSP430MachineFunctionInfo>();
635 FuncInfo->setVarArgsFrameIndex(MFI.CreateFixedObject(1, Offset, true));
708 unsigned Reg = FuncInfo->getSRetReturnReg();
712 FuncInfo->setSRetReturnReg(Reg);
774 MSP430MachineFunctionInfo *FuncInfo = MF.getInfo<MSP430MachineFunctionInfo>();
775 unsigned Reg = FuncInfo->getSRetReturnReg();
1249 MSP430MachineFunctionInfo *FuncInfo = MF.getInfo<MSP430MachineFunctionInfo>();
1250 int ReturnAddrIndex = FuncInfo->getRAIndex();
1258 FuncInfo->setRAIndex(ReturnAddrIndex);
1310 MSP430MachineFunctionInfo *FuncInfo = MF.getInfo<MSP430MachineFunctionInfo>()
    [all...]

Completed in 52 milliseconds

1 2