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  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUSubtarget.h 40 GFX9 = 8,
SIInstrInfo.cpp 3859 // No immediates on GFX9
3862 "Only reg allowed as operands in SDWA instructions on GFX9+";
3888 // No clamp allowed on GFX9 for VOPC
3895 // No omod allowed on GFX9 for VOPC
6978 // Set ATC = 1. GFX9 doesn't have this bit.
6982 // Set MTYPE = 2 (MTYPE_UC = uncached). GFX9 doesn't have this.
6996 // GFX9 doesn't have ELEMENT_SIZE.
7009 ST.getGeneration() <= AMDGPUSubtarget::GFX9)
7398 // | gfx9 | | |
7480 GFX9 = 5
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