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      1 /*	$NetBSD: ixdp425reg.h,v 1.7 2009/10/21 14:15:51 rmind Exp $ */
      2 /*
      3  * Copyright (c) 2003
      4  *	Ichiro FUKUHARA <ichiro (at) ichiro.org>.
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  *
     16  * THIS SOFTWARE IS PROVIDED BY ICHIRO FUKUHARA ``AS IS'' AND ANY EXPRESS OR
     17  * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
     18  * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
     19  * IN NO EVENT SHALL ICHIRO FUKUHARA OR THE VOICES IN HIS HEAD BE LIABLE FOR
     20  * ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     21  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     22  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     23  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     24  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     25  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     26  * SUCH DAMAGE.
     27  */
     28 
     29 #ifndef	_IXDP425REG_H_
     30 #define	_IXDP425REG_H_
     31 
     32 #include "opt_evbarm_boardtype.h"
     33 
     34 #define	ixdp425	1
     35 #define	zao425	2
     36 
     37 /*
     38  * Interrupt & GPIO
     39  */
     40 
     41 #if EVBARM_BOARDTYPE == ixdp425
     42 /* GPIOs */
     43 #define	GPIO_PCI_CLK	14
     44 #define	GPIO_PCI_RESET	13
     45 #define	GPIO_PCI_INTA	11
     46 #define	GPIO_PCI_INTB	10
     47 #define	GPIO_PCI_INTC	9
     48 #define	GPIO_PCI_INTD	8
     49 #define	GPIO_I2C_SDA	7
     50 #define	GPIO_I2C_SCL	6
     51 /* Interrupt */
     52 #define	PCI_INT_A	IXP425_INT_GPIO_11
     53 #define	PCI_INT_B	IXP425_INT_GPIO_10
     54 #define	PCI_INT_C	IXP425_INT_GPIO_9
     55 #define	PCI_INT_D	IXP425_INT_GPIO_8
     56 #endif /* EVBARM_BOARDTYPE == ixdp425 */
     57 
     58 #if EVBARM_BOARDTYPE == zao425		/* conf/ZAO425 */
     59 /* GPIOs */
     60 #define	GPIO_PCI_CLK	14
     61 #define	GPIO_PCI_RESET	13
     62 #define	GPIO_PCI_INTA	11
     63 #define	GPIO_PCI_INTB	10
     64 #define	GPIO_PCI_INTC	9
     65 #define	GPIO_PCI_INTD	8
     66 #define	GPIO_I2C_SDA	7
     67 #define	GPIO_I2C_SCL	6
     68 /* Interrupt */
     69 #define	MPCI_GPIO0	IXP425_INT_GPIO_12
     70 #define	PCI_INT_A	IXP425_INT_GPIO_11
     71 #define	PCI_INT_B	IXP425_INT_GPIO_10
     72 #define	PCI_INT_C	IXP425_INT_GPIO_9
     73 #define	PCI_INT_D	IXP425_INT_GPIO_8
     74 #define	MPCI_GPIO3	IXP425_INT_GPIO_5
     75 #define	HSS0_INT	IXP425_INT_GPIO_4
     76 #define	HSS0_SCLK	IXP425_INT_GPIO_3
     77 #define	HSS0_SDI	IXP425_INT_GPIO_2
     78 #define	HSS0_SDO	IXP425_INT_GPIO_1
     79 #define	HSS0_CS		IXP425_INT_GPIO_0
     80 #endif /* EVBARM_BOARDTYPE == zao425 */
     81 
     82 #endif	/* _IXDP425REG_H_ */
     83