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      1 /*	$NetBSD: mct_reg.h,v 1.2 2014/09/05 08:01:05 skrll Exp $	*/
      2 
      3 /*-
      4  * Copyright (c) 2014 The NetBSD Foundation, Inc.
      5  * All rights reserved.
      6  *
      7  * This code is derived from software contributed to The NetBSD Foundation
      8  * by Reinoud Zandijk.
      9  *
     10  * Redistribution and use in source and binary forms, with or without
     11  * modification, are permitted provided that the following conditions
     12  * are met:
     13  * 1. Redistributions of source code must retain the above copyright
     14  *    notice, this list of conditions and the following disclaimer.
     15  * 2. Redistributions in binary form must reproduce the above copyright
     16  *    notice, this list of conditions and the following disclaimer in the
     17  *    documentation and/or other materials provided with the distribution.
     18  *
     19  * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS
     20  * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED
     21  * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
     22  * PURPOSE ARE DISCLAIMED.  IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS
     23  * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR
     24  * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF
     25  * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS
     26  * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN
     27  * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE)
     28  * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
     29  * POSSIBILITY OF SUCH DAMAGE.
     30  */
     31 
     32 #ifndef _ARM_SAMSUNG_MCT_REG_H_
     33 #define _ARM_SAMSUNG_MCT_REG_H_
     34 
     35 /* global timer register offsets */
     36 #define MCT_G_CNT_L		0x100		/* lower bits */
     37 #define MCT_G_CNT_U		0x104		/* higher bits */
     38 #define MCT_G_CNT_WSTAT		0x110		/* wait for write OK cntr */
     39 #define   G_CNT_WSTAT_L		__BIT(0)
     40 #define   G_CNT_WSTAT_U		__BIT(1)
     41 
     42 #define MCT_G_COMP0_L		0x200		/* compare0 lower bits */
     43 #define MCT_G_COMP0_U		0x204		/* compare0 higher bits */
     44 #define MCT_G_COMP0_ADD_INCR	0x208		/* compare0 auto add value */
     45 #define MCT_G_TCON		0x240		/* configuration register */
     46 #define   G_TCON_COMP0_ENABLE	__BIT(0)
     47 #define   G_TCON_COMP0_AUTOINC	__BIT(1)
     48 #define   G_TCON_START		__BIT(8)
     49 #define MCT_G_INT_CSTAT		0x244		/* clear interrupt */
     50 #define   G_INT_CSTAT_CLEAR	__BIT(0)
     51 #define MCT_G_INT_ENB		0x248		/* enable interrupts */
     52 #define   G_INT_ENB_ENABLE	__BIT(0)
     53 #define MCT_G_WSTAT		0x24C		/* wait for write OK */
     54 #define   G_WSTAT_COMP0_L	__BIT(0)
     55 #define   G_WSTAT_COMP0_U	__BIT(1)
     56 #define   G_WSTAT_ADD_INCR	__BIT(2)
     57 #define   G_WSTAT_TCON		__BIT(16)
     58 
     59 /* local cpu-bound timers */
     60 #define MCT_L_OFFSET(x)		(0x300 + (0x100 * x))
     61 #define MCT_L_MASK		0xffffff00
     62 
     63 #define MCT_L_TCNTB		0x00		/* TODO: what */
     64 #define MCT_L_ICNTB		0x08		/* interrupt count buffer */
     65 #define   L_INCTB_UPDATE(x)	(__BIT(31) | (x))
     66 #define MCT_L_TCON		0x20		/* configuration register */
     67 #define   L_TCON_TIMER_START	__BIT(0)
     68 #define   L_TCON_INT_START	__BIT(1)
     69 #define   L_TCON_INTERVAL_MODE	__BIT(2)
     70 #define MCT_L_INC_CSTAT		0x30
     71 #define   L_INC_CSTAT_CLEAR	__BIT(0)
     72 #define MCT_L_INT_ENB		0x34
     73 #define   L_INT_ENB_ENABLE	__BIT(0)
     74 #define MCT_L_WSTAT		0x40
     75 #define   L_WSTAT_L_TCNTB	__BIT(0)
     76 #define   L_WSTAT_L_ICNTB	__BIT(1)
     77 #define   L_WSTAT_L_TCON	__BIT(3)
     78 
     79 #endif /* _ARM_SAMSUNG_MCT_REG_H_ */
     80 
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