| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| SelectionDAGDumper.cpp | 146 unsigned IID = cast<ConstantSDNode>(getOperand(OpNo))->getZExtValue();
147 if (IID < Intrinsic::num_intrinsics)
148 return Intrinsic::getName((Intrinsic::ID)IID, None);
152 return TII->getName(IID);
|
| SelectionDAGISel.cpp | 1200 Intrinsic::ID IID = EHPtrCall->getIntrinsicID();
1201 if (IID == Intrinsic::eh_exceptionpointer ||
1202 IID == Intrinsic::eh_exceptioncode)
1225 Intrinsic::ID IID = Call->getIntrinsicID();
1226 if (IID == Intrinsic::wasm_landingpad_index) {
3777 unsigned iid =
3779 if (iid < Intrinsic::num_intrinsics)
3780 Msg << "intrinsic %" << Intrinsic::getName((Intrinsic::ID)iid, None);
3782 Msg << "target intrinsic %" << TII->getName(iid);
3784 Msg << "unknown intrinsic #" << iid;
[all...] |
| /src/external/apache2/llvm/dist/llvm/tools/llvm-mca/Views/ |
| BottleneckAnalysis.cpp | 60 void PressureTracker::onInstructionDispatched(unsigned IID) {
61 IPI.insert(std::make_pair(IID, InstructionPressureInfo()));
64 void PressureTracker::onInstructionExecuted(unsigned IID) { IPI.erase(IID); }
68 unsigned IID = Event.IR.getSourceIndex();
75 ResourceUsers[Index] = std::make_pair(IID, Use.second.getNumerator());
124 unsigned IID = IR.getSourceIndex();
125 IPI[IID].ResourcePressureCycles++;
132 unsigned IID = IR.getSourceIndex();
133 IPI[IID].RegisterPressureCycles++
[all...] |
| TimelineView.cpp | 189 unsigned IID = 0;
191 printWaitTimeEntry(FOS, WaitTime[IID], IID, Executions);
194 ++IID;
209 printWaitTimeEntry(FOS, TotalWaitTime, IID, Executions);
285 unsigned IID = 0;
290 const TimelineViewEntry &Entry = Timeline[IID];
294 unsigned SourceIndex = IID % Source.size();
299 ++IID;
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/MCA/HardwareUnits/ |
| RegisterFile.h | 39 unsigned IID;
49 : IID(INVALID_IID), WriteBackCycle(), WriteResID(), RegisterID(),
53 unsigned getSourceIndex() const { return IID; }
|
| /src/external/apache2/llvm/dist/llvm/lib/MC/MCDisassembler/ |
| Disassembler.cpp | 179 InstrItineraryData IID = STI->getInstrItineraryForCPU(DC->getCPU());
187 Latency = std::max(Latency, IID.getOperandCycle(SCClass, OpIdx));
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| NVPTXISelDAGToDAG.cpp | 508 unsigned IID = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
509 switch (IID) {
719 unsigned IID = cast<ConstantSDNode>(N->getOperand(0))->getZExtValue();
720 switch (IID) {
1242 unsigned IID = cast<ConstantSDNode>(N->getOperand(1))->getZExtValue();
1243 switch (IID) {
|
| NVPTXTargetTransformInfo.cpp | 142 Optional<Intrinsic::ID> IID;
151 SimplifyAction(Intrinsic::ID IID, FtzRequirementTy FtzReq)
152 : IID(IID), FtzRequirement(FtzReq) {}
315 // can bail out now. (Notice that in the case that IID is not an NVVM
330 if (Action.IID) {
336 Intrinsic::getDeclaration(II->getModule(), *Action.IID, Tys), Args);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86InsertPrefetch.cpp | 129 unsigned IID = 0;
133 IID = HintType.second;
137 if (IID == 0)
144 Prefetches[index] = {IID, D};
|
| X86PartialReduction.cpp | 218 Intrinsic::ID IID;
220 IID = Intrinsic::x86_avx512_psad_bw_512;
223 IID = Intrinsic::x86_avx2_psad_bw;
226 IID = Intrinsic::x86_sse2_psad_bw;
230 Function *PSADBWFn = Intrinsic::getDeclaration(SI->getModule(), IID);
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/IR/ |
| FixedPointBuilder.h | 202 Intrinsic::ID IID =
204 Result = B.CreateIntrinsic(IID, {ResultTy, OpTy}, {Result});
236 Intrinsic::ID IID = UseSigned ? Intrinsic::sadd_sat : Intrinsic::uadd_sat;
237 Result = B.CreateBinaryIntrinsic(IID, WideLHS, WideRHS);
262 Intrinsic::ID IID = UseSigned ? Intrinsic::ssub_sat : Intrinsic::usub_sat;
263 Result = B.CreateBinaryIntrinsic(IID, WideLHS, WideRHS);
294 Intrinsic::ID IID;
296 IID = UseSigned ? Intrinsic::smul_fix_sat : Intrinsic::umul_fix_sat;
298 IID = UseSigned ? Intrinsic::smul_fix : Intrinsic::umul_fix;
301 IID, {WideLHS->getType()}
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| AMDGPUAnnotateKernelFeatures.cpp | 305 Intrinsic::ID IID = Callee->getIntrinsicID();
306 if (IID == Intrinsic::not_intrinsic) {
313 if (!IsFunc && IID == Intrinsic::amdgcn_kernarg_segment_ptr) {
316 StringRef AttrName = intrinsicToAttrName(IID, NonKernelOnly,
|
| AMDGPUInstCombineIntrinsic.cpp | 193 Intrinsic::ID IID = II.getIntrinsicID();
194 switch (IID) {
242 if (IID == Intrinsic::amdgcn_frexp_mant) {
438 bool Signed = IID == Intrinsic::amdgcn_sbfe;
471 bool IsCompr = IID == Intrinsic::amdgcn_exp_compr;
560 bool IsInteger = IID == Intrinsic::amdgcn_icmp;
786 if (IID == Intrinsic::amdgcn_readfirstlane) {
|
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/AggressiveInstCombine/ |
| AggressiveInstCombine.cpp | 126 Intrinsic::ID IID = matchFunnelShift(P0, ShVal0, ShVal1, ShAmt);
127 if (IID == Intrinsic::not_intrinsic ||
128 (IID == Intrinsic::fshl && ShVal0 != P1) ||
129 (IID == Intrinsic::fshr && ShVal1 != P1)) {
130 IID = matchFunnelShift(P1, ShVal0, ShVal1, ShAmt);
131 if (IID == Intrinsic::not_intrinsic ||
132 (IID == Intrinsic::fshl && ShVal0 != P0) ||
133 (IID == Intrinsic::fshr && ShVal1 != P0))
135 assert((IID == Intrinsic::fshl || IID == Intrinsic::fshr) &
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/ |
| SpeculateAroundPHIs.cpp | 278 Intrinsic::ID IID = Intrinsic::not_intrinsic;
280 IID = UserII->getIntrinsicID();
287 if (IID)
289 TTI.getIntImmCostIntrin(IID, Idx, IncomingC->getValue(),
|
| InferAddressSpaces.cpp | 370 auto IID = II->getIntrinsicID();
371 switch (IID) {
379 if (TTI->collectFlatAddressOperands(OpIndexes, IID)) {
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| Analysis.cpp | 649 Intrinsic::ID IID = F->getIntrinsicID();
650 if (((IID == Intrinsic::memcpy &&
652 (IID == Intrinsic::memmove &&
654 (IID == Intrinsic::memset &&
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| PPCTargetTransformInfo.cpp | 69 Intrinsic::ID IID = II.getIntrinsicID();
70 switch (IID) {
200 InstructionCost PPCTTIImpl::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
204 return BaseT::getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind);
212 switch (IID) {
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/MCA/ |
| Instruction.h | 88 unsigned IID;
171 // This method adds Use to the set of data dependent reads. IID is the
175 void addUser(unsigned IID, ReadState *Use, int ReadAdvance);
178 // write. IID is the instruction identifier associated with this write.
179 void addUser(unsigned IID, WriteState *Use);
204 void writeStartEvent(unsigned IID, MCPhysReg RegID, unsigned Cycles);
216 void onInstructionIssued(unsigned IID);
276 void writeStartEvent(unsigned IID, MCPhysReg RegID, unsigned Cycles);
516 void execute(unsigned IID);
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/LiveDebugValues/ |
| VarLocBasedImpl.cpp | 536 const auto &IID = MI.getDesc();
590 return BuildMI(MF, DbgLoc, IID, Indirect, MOs, Var, DIExpr);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/ |
| AArch64TargetTransformInfo.cpp | 157 AArch64TTIImpl::getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
171 if (IID >= Intrinsic::aarch64_addg && IID <= Intrinsic::aarch64_udiv)
174 switch (IID) {
493 Intrinsic::ID IID = II.getIntrinsicID();
494 switch (IID) {
|
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/IPO/ |
| PartialInlining.cpp | 883 Intrinsic::ID IID = II->getIntrinsicID();
892 IntrinsicCostAttributes ICA(IID, II->getType(), Tys, FMF);
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/ |
| TargetTransformInfo.h | 120 Intrinsic::ID IID;
147 Intrinsic::ID getID() const { return IID; }
381 Intrinsic::ID IID) const;
831 InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
1464 Intrinsic::ID IID) const = 0;
1567 virtual InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
1781 Intrinsic::ID IID) const override {
1782 return Impl.collectFlatAddressOperands(OpIndexes, IID);
2005 InstructionCost getIntImmCostIntrin(Intrinsic::ID IID, unsigned Idx,
2008 return Impl.getIntImmCostIntrin(IID, Idx, Imm, Ty, CostKind)
[all...] |
| /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| BasicTTIImpl.h | 273 Intrinsic::ID IID) const {
1290 Intrinsic::ID IID = ICA.getID();
1291 if (Function::isTargetIntrinsic(IID))
1305 switch (IID) {
1381 IntrinsicCostAttributes Attrs(IID, RetTy, Args[0]->getType(), FMF, I, 1);
1387 IID, RetTy, {Args[0]->getType(), Args[1]->getType()}, FMF, I, 1);
1448 IntrinsicCostAttributes Attrs(IID, RetTy, ICA.getArgTypes(), FMF, I,
1460 Intrinsic::ID IID = ICA.getID();
1472 if (IID == Intrinsic::vector_reduce_fadd ||
1473 IID == Intrinsic::vector_reduce_fmul
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMTargetTransformInfo.cpp | 122 Intrinsic::ID IID = II.getIntrinsicID();
123 switch (IID) {
878 unsigned IID = 0;
881 IID = Intrinsic::abs;
884 IID = Intrinsic::smin;
887 IID = Intrinsic::smax;
890 IID = Intrinsic::umin;
893 IID = Intrinsic::umax;
896 IID = Intrinsic::minnum;
899 IID = Intrinsic::maxnum
[all...] |
