1 /* $NetBSD: imcsmb_reg.h,v 1.1 2018/03/01 04:45:06 pgoyette Exp $ */ 2 3 /*- 4 * Copyright (c) 2018 The NetBSD Foundation, Inc. 5 * All rights reserved. 6 * 7 * This code is derived from software contributed to The NetBSD Foundation 8 * by Paul Goyette 9 * 10 * Redistribution and use in source and binary forms, with or without 11 * modification, are permitted provided that the following conditions 12 * are met: 13 * 1. Redistributions of source code must retain the above copyright 14 * notice, this list of conditions and the following disclaimer. 15 * 2. Redistributions in binary form must reproduce the above copyright 16 * notice, this list of conditions and the following disclaimer in the 17 * documentation and/or other materials provided with the distribution. 18 * 19 * THIS SOFTWARE IS PROVIDED BY THE NETBSD FOUNDATION, INC. AND CONTRIBUTORS 20 * ``AS IS'' AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED 21 * TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR 22 * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE FOUNDATION OR CONTRIBUTORS 23 * BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR 24 * CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF 25 * SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS 26 * INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN 27 * CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) 28 * ARISING IN ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE 29 * POSSIBILITY OF SUCH DAMAGE. 30 */ 31 32 /*- 33 * SPDX-License-Identifier: BSD-2-Clause-FreeBSD 34 * 35 * Authors: Joe Kloss; Ravi Pokala (rpokala (at) freebsd.org) 36 * 37 * Copyright (c) 2017-2018 Panasas 38 * All rights reserved. 39 * 40 * Redistribution and use in source and binary forms, with or without 41 * modification, are permitted provided that the following conditions 42 * are met: 43 * 1. Redistributions of source code must retain the above copyright 44 * notice, this list of conditions and the following disclaimer. 45 * 2. Redistributions in binary form must reproduce the above copyright 46 * notice, this list of conditions and the following disclaimer in the 47 * documentation and/or other materials provided with the distribution. 48 * 49 * THIS SOFTWARE IS PROVIDED BY THE AUTHOR AND CONTRIBUTORS ``AS IS'' AND 50 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 51 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 52 * ARE DISCLAIMED. IN NO EVENT SHALL THE AUTHOR OR CONTRIBUTORS BE LIABLE 53 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 54 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 55 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 56 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 57 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 58 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 59 * SUCH DAMAGE. 60 */ 61 62 #ifndef _DEV__IMCSMB__IMCSMB_REG_H_ 63 #define _DEV__IMCSMB__IMCSMB_REG_H_ 64 65 /* Intel (Sandy,Ivy)bridge and (Has,Broad)well CPUs have integrated memory 66 * controllers (iMCs), each of which having up to two SMBus controllers. They 67 * are programmed via sets of registers in the same PCI device, which are 68 * identical other than the register numbers. 69 * 70 * The full documentation for these registers can be found in volume two of the 71 * datasheets for the CPUs. Refer to the links in imcsmb_pci.c 72 */ 73 74 #define IMCSMB_REG_STATUS0 0x0180 75 #define IMCSMB_REG_STATUS1 0x0190 76 #define IMCSMB_STATUS_BUSY_BIT 0x10000000 77 #define IMCSMB_STATUS_BUS_ERROR_BIT 0x20000000 78 #define IMCSMB_STATUS_WRITE_DATA_DONE 0x40000000 79 #define IMCSMB_STATUS_READ_DATA_VALID 0x80000000 80 81 #define IMCSMB_REG_COMMAND0 0x0184 82 #define IMCSMB_REG_COMMAND1 0x0194 83 #define IMCSMB_CMD_WORD_ACCESS 0x20000000 84 #define IMCSMB_CMD_WRITE_BIT 0x08000000 85 #define IMCSMB_CMD_TRIGGER_BIT 0x80000000 86 87 #define IMCSMB_REG_CONTROL0 0x0188 88 #define IMCSMB_REG_CONTROL1 0x0198 89 #define IMCSMB_CNTL_POLL_EN 0x00000100 90 #define IMCSMB_CNTL_CLK_OVERRIDE 0x08000000 91 #define IMCSMB_CNTL_DTI_MASK 0xf0000000 92 #define IMCSMB_CNTL_WRITE_DISABLE_BIT 0x04000000 93 94 #endif /* _DEV__IMCSMB__IMCSMB_REG_H_ */ 95
Indexes created Fri Sep 26 08:10:20 GMT 2025