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    Searched defs:Invert (Results 1 - 9 of 9) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
LanaiInstrInfo.cpp 499 bool Invert = !DefMI;
506 MachineOperand FalseReg = MI.getOperand(Invert ? 1 : 2);
523 if (Invert)
  /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/
MSP430ISelLowering.cpp 1168 bool Invert = false;
1180 Invert = true;
1188 Invert = true;
1206 if (Invert)
  /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/
M68kISelLowering.cpp 1932 bool Invert = (CC == ISD::SETNE) ^ isNullConstant(Op1);
1933 if (!Invert)
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMBaseInstrInfo.cpp 2260 // After swapping the MOVCC operands, also invert the condition.
2336 bool Invert = !DefMI;
2343 MachineOperand FalseReg = MI.getOperand(Invert ? 2 : 1);
2361 if (Invert)
ARMISelLowering.cpp 4069 // Invert the bits.
6429 bool Invert = false;
6489 Invert = true; LLVM_FALLTHROUGH;
6502 case ISD::SETULE: Invert = true; Opc = ARMCC::GT; break;
6504 case ISD::SETULT: Invert = true; Opc = ARMCC::GE; break;
6505 case ISD::SETUEQ: Invert = true; LLVM_FALLTHROUGH;
6513 if (Invert)
6517 case ISD::SETUO: Invert = true; LLVM_FALLTHROUGH;
6525 if (Invert)
6538 Invert = true; LLVM_FALLTHROUGH
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZISelLowering.cpp 2763 // or 0 if neither can be done directly. Indicate in Invert whether the
2766 bool &Invert) {
2768 Invert = false;
2774 Invert = true;
2849 bool Invert = false;
2854 Invert = true;
2871 Invert = true;
2890 if (unsigned Opcode = getVectorComparisonOrInvert(CC, Mode, Invert))
2894 if (unsigned Opcode = getVectorComparisonOrInvert(CC, Mode, Invert))
2903 if (Invert) {
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Utils/
SimplifyCFG.cpp 2368 bool Invert = false;
2371 Invert = true;
2373 assert(EndBB == BI->getSuccessor(!Invert) && "No edge from to end block");
2467 if (Invert)
2514 if (Invert)
3078 // If we need to invert the condition in the pred block to match, do so now.
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/
RISCVISelLowering.cpp 1805 // feature splats but only on the LHS, we may choose to invert our mask and
5752 // If we're looking for eq 0 instead of ne 0, we need to invert the
5754 bool Invert = CCVal == ISD::SETEQ;
5756 if (Invert)
5807 // If we're looking for eq 0 instead of ne 0, we need to invert the
5809 bool Invert = CCVal == ISD::SETEQ;
5811 if (Invert)
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 2347 bool &Invert) {
2348 Invert = false;
2355 Invert = true;
2368 Invert = true;
3039 // If the operand is an overflow checking operation, invert the condition
3043 // (csel 1, 0, invert(cc), overflow_op_bool)
3167 // CSINC Wd, WZR, WZR, invert(cond).
15286 static SDValue getTestBitOperand(SDValue Op, unsigned &Bit, bool &Invert,
15300 return getTestBitOperand(Op->getOperand(0), Bit, Invert, DAG);
15306 return getTestBitOperand(Op->getOperand(0), Bit, Invert, DAG)
    [all...]

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