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    Searched defs:IsA16 (Results 1 - 5 of 5) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/Disassembler/
AMDGPUDisassembler.cpp 724 const bool IsA16 = (A16Idx != -1 && MI.getOperand(A16Idx).getImm());
727 AMDGPU::getAddrSizeMIMGOp(BaseOpcode, Dim, IsA16, AMDGPU::hasG16(STI));
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUInstructionSelector.cpp 1501 const bool IsA16 = (Flags & 1) != 0;
1505 if (IsA16 && !STI.hasG16() && !IsG16)
1579 if (IsG16 && !IsA16) {
1683 MIB.addImm(IsA16 && // a16 or r128
1686 MIB.addImm(IsA16 ? -1 : 0);
SIInstrInfo.cpp 4214 bool IsA16 = false;
4217 IsA16 = R128A16->getImm() != 0;
4220 IsA16 = A16->getImm() != 0;
4226 AMDGPU::getAddrSizeMIMGOp(BaseOpcode, Dim, IsA16, ST.hasG16());
SIISelLowering.cpp 5978 bool IsA16 = false;
6094 IsA16 = VAddrScalarVT == MVT::f16 || VAddrScalarVT == MVT::i16;
6096 if (BaseOpcode->Gradients && !ST->hasG16() && (IsA16 != IsG16)) {
6105 if (IsA16) {
6113 // We've dealt with incorrect input so we know that if IsA16, IsG16
6117 // have already verified that both IsA16 and IsG16 are true
6128 // const int PackEndIdx = IsA16 ? VAddrEnd : (ArgOffset + Intr->CoordStart);
6139 if (IsA16) {
6244 Ops.push_back(IsA16 && // r128, a16 for gfx9
6247 Ops.push_back(IsA16 ? True : False)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/AsmParser/
AMDGPUAsmParser.cpp 3439 bool IsA16 = (A16Idx != -1 && Inst.getOperand(A16Idx).getImm());
3442 AMDGPU::getAddrSizeMIMGOp(BaseOpcode, DimInfo, IsA16, hasG16());

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