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    Searched defs:IsFloat (Results 1 - 5 of 5) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64LowerHomogeneousPrologEpilog.cpp 200 bool IsFloat = AArch64::FPR64RegClass.contains(Reg1);
201 assert(!(IsFloat ^ AArch64::FPR64RegClass.contains(Reg2)));
204 Opc = IsFloat ? AArch64::STPDpre : AArch64::STPXpre;
206 Opc = IsFloat ? AArch64::STPDi : AArch64::STPXi;
223 bool IsFloat = AArch64::FPR64RegClass.contains(Reg1);
224 assert(!(IsFloat ^ AArch64::FPR64RegClass.contains(Reg2)));
227 Opc = IsFloat ? AArch64::LDPDpost : AArch64::LDPXpost;
229 Opc = IsFloat ? AArch64::LDPDi : AArch64::LDPXi;
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
BasicTTIImpl.h 762 bool IsFloat = Ty->isFPOrFPVectorTy();
765 InstructionCost OpCost = (IsFloat ? 2 : 1);
  /src/external/apache2/llvm/dist/llvm/lib/IR/
AutoUpgrade.cpp 1206 bool IsFloat = Ty->isFPOrFPVectorTy();
1208 if (VecWidth == 128 && EltWidth == 32 && IsFloat)
1210 else if (VecWidth == 128 && EltWidth == 32 && !IsFloat)
1212 else if (VecWidth == 128 && EltWidth == 64 && IsFloat)
1214 else if (VecWidth == 128 && EltWidth == 64 && !IsFloat)
1216 else if (VecWidth == 256 && EltWidth == 32 && IsFloat)
1218 else if (VecWidth == 256 && EltWidth == 32 && !IsFloat)
1220 else if (VecWidth == 256 && EltWidth == 64 && IsFloat)
1222 else if (VecWidth == 256 && EltWidth == 64 && !IsFloat)
1224 else if (VecWidth == 512 && EltWidth == 32 && IsFloat)
    [all...]
  /src/external/apache2/llvm/dist/clang/lib/CodeGen/
TargetInfo.cpp 10554 bool IsFloat = Ty->isRealFloatingType();
10556 if (IsInt || IsFloat) {
10563 if (IsFloat && (Size > FLen || Size < 32))
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
LegalizeVectorTypes.cpp 2798 bool IsFloat = OutVT.isFloatingPoint();
2832 EVT HalfElementVT = IsFloat ?
2873 return IsFloat

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