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      1 /*	$NetBSD: kn230.h,v 1.5 2024/05/24 19:00:27 rillig Exp $	*/
      2 
      3 /*
      4  * Copyright (c) 1997,1998 Jonathan Stone.
      5  * All rights reserved.
      6  *
      7  * Redistribution and use in source and binary forms, with or without
      8  * modification, are permitted provided that the following conditions
      9  * are met:
     10  * 1. Redistributions of source code must retain the above copyright
     11  *    notice, this list of conditions and the following disclaimer.
     12  * 2. Redistributions in binary form must reproduce the above copyright
     13  *    notice, this list of conditions and the following disclaimer in the
     14  *    documentation and/or other materials provided with the distribution.
     15  * 3. All advertising materials mentioning features or use of this software
     16  *    must display the following acknowledgement:
     17  *      This product includes software developed by Jonathan Stone for
     18  *      the NetBSD Project.
     19  * 4. The name of the author may not be used to endorse or promote products
     20  *    derived from this software without specific prior written permission.
     21  *
     22  * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND
     23  * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE
     24  * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE
     25  * ARE DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE
     26  * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL
     27  * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS
     28  * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
     29  * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT
     30  * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
     31  * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
     32  * SUCH DAMAGE.
     33  */
     34 
     35 
     36 /*
     37  * Physical addresses of baseboard devices and registers on the
     38  * DECstation 5100 motherboard (also known as the kn230).
     39  *
     40  * The only options on the kn230 are two slots for daughterboards.
     41  * Each slot can contain an extra four-port dc708x DZ11 clone chip.
     42  * Most baseboard chips are the same hardware and at the same
     43  * address as the DECstation 3100 (kn01), except:
     44  *
     45  *	The kn230 has more devices than the 3100, so instead
     46  *	of hardwiring each device to a CPU interrupt line,
     47  *	the kn230 provides an interrupt-request register (ICSR).
     48  * 	Devices are mapped onto CPU interrupt lines as below:
     49  *	    hardint 5:	fpu
     50  *	    hardint 4:	reset switch
     51  *	    hardint 3:	memory error (write to nonexistent memory)
     52  *	    hardint 2:	clock
     53  *	    hardint 1:	sii, lance
     54  *	    hardint 0:	baseboard DZ, I/O option cards
     55  *
     56  *	the ICSR only indicates which devices are requesting interrupts.
     57  *	there is no interrupt mask register.
     58  *
     59  *	There is no framebuffer, pcc (cursor), colormap or vdac on a 5100.
     60  */
     61 
     62 #define KN230_SYS_LANCE		0x18000000	/* Lance chip */
     63 #define KN230_SYS_LANCE_B_START	0x19000000	/* 64 Kb Lance Buffer */
     64 #define KN230_SYS_LANCE_B_END	0x19010000
     65 
     66 #define KN230_SYS_SII		0x1a000000	/* scsi SII chip */
     67 #define KN230_SYS_SII_B_START	0x1b000000	/* 128 Kb SCSI buffer */
     68 #define KN230_SYS_SII_B_END	0x1b020000
     69 
     70 #define	KN230_SYS_DZ0		0x1c000000	/* baseboard DZ serial chip */
     71 
     72 #define	KN230_SYS_CLOCK		0x1d000000	/* mc146818 rtc chip */
     73 
     74 #define	KN230_SYS_ICSR		0x1e000000	/* System control register */
     75 
     76 /*
     77  * Interrupt-request bitmasks in the low-order 16 bits of the CSR.
     78  * If a bit is set, the corresponding device has an interrupt condition.
     79  * There is no equivalent per-device interrupt masking register.
     80  * (note: these were LED control bits in the kn01).
     81  */
     82 #define	KN230_CSR_INTR_RESET	0x00004000	/* reset button */
     83 #define KN230_CSR_INTR_WMERR	0x00002000	/* badaddr() or write error */
     84 #define KN230_CSR_INTR_LANCE	0x00001000	/* lance interrupt */
     85 #define KN230_CSR_INTR_SII	0x00000800	/* scsi interrupt */
     86 #define KN230_CSR_INTR_OPT1	0x00000400	/* second option DZ */
     87 #define KN230_CSR_INTR_OPT0	0x00000200	/* first option DZ */
     88 #define KN230_CSR_INTR_DZ0     	0x00000100	/* baseboard DZ */
     89 
     90 /*
     91  * kn230 LED control register.
     92  * Writing a 1 bit to any bit turns off the corresponding LED.
     93  * low bits are or'ed to control registers which have side effects.
     94  *
     95  * This is sort of like the 3100 CSR only at a different address, and
     96  * with the same external-logic hack as the 5000/200 to enable 38.4
     97  * baud mode on the baseboard DZ chip.
     98  */
     99 #define KN230_SYS_CTL_LED	0x14000000	/* LED register	*/
    100 #define KN230_LED7		0x00008000	/* no side effect */
    101 #define KN230_LED6		0x00004000	/* no side effect */
    102 #define KN230_LED5		0x00002000	/* no side effect */
    103 #define KN230_LED4		0x00001000	/* no side effect */
    104 
    105 #define KN230_LED3		0x00000800	/* Turns off led 3.
    106 						 * Also disables main memory.
    107 						 * enables writes to EEPROM.
    108 						 */
    109 
    110 #define KN230_LED2		0x00000400	/* Turns off led 2.
    111 						 * 0:  forces DZ to run at
    112 						 * 38.4  when 19.2 is selected
    113 						 * 1:  is 19.2 means 19.2.
    114 						 */
    115 
    116 #define KN230_LED1		0x00000200	/* read-only
    117 						 *  0:  8M memory in bank 1
    118 						 *  1: 32M in bank1
    119 						 */
    120 #define KN230_LED0		0x00000100
    121 
    122 /*
    123  * Option slot addresses.
    124  * dc7084 registers appear here, if present.
    125  */
    126 #define KN230_SYS_DZ1		0x15000000      /* DZ1 Control and status */
    127 #define KN230_SYS_DZ2		0x15200000      /* DZ2 Control and status */
    128 
    129 /*
    130  * Write error address.
    131  * Same address as the KN01_SYS_MERR, but with a presence bit for a
    132  * PrestoServe option and a secure console-mode the low-order bits.
    133  */
    134 #define KN230_SYS_WEAR		0x17000000	/* Write-error address reg */
    135 #define KN230_WEAR_OPTIONMASK	0x00000001	/* 1 if no card present */
    136 #define KN230_WEAR_OPTION_FALSE	KN230_WEAR_OPTIONMASK
    137 #define KN230_WEAR_OPTION_TRUE	0
    138 
    139 #define KN230_WEAR_SECUREMASK	0x00000002      /* "1": system is insecure */
    140 #define KN230_WEAR_INSECURE	KN230_WEAR_SECUREMASK
    141 #define KN230_WEAR_SECURE	0
    142 
    143 /*
    144  * various leftover stuff....
    145  */
    146 
    147 /*
    148  *  Option ID register. Indicates whether options are present.
    149  */
    150 #define KN230_SYS_OID		0x1f00020c      /* option slot ID register */
    151 #define KN230_OID_MASK		0x000000ff      /* ID number mask */
    152 #define KN230_ERRCNT_MASK	0x0000ff00      /* hardware failure count */
    153 
    154 
    155 #define KN230_SYS_PASSWD    	0x1f000244      /* password location */
    156 
    157 /*
    158  * NVRAM state definitions.
    159  * Used under Ultrix for PrestoServe.
    160  */
    161 #define KN230_SYS_NVRAM_DIAG	0x1f000300	/* NVRAM diagnostic register */
    162 #define KN230_NVRAM_PRESENT	0x00000001
    163 #define KN230_NVRAM_TESTFAIL_RO	0x00000002
    164 #define KN230_NVRAM_TESTFAIL_RW	0x00000004
    165 #define KN230_NVRAM_FAILURE	0x00000008	/* ran out of power anyway? */
    166 #define	KN230_NVRAM_SIZEMASK	0x000000f0
    167 
    168 #define KN230_SYS_NVRAM_ADDR	0x1f000304       /* holds addr of NVRAM bank */
    169 /*
    170  * NVRAM has separate control and status registers for each of
    171  * the two motherboard SIMM banks (even and odd),
    172  * located at offsets from the value at SYS_NVRAM_ADDR.
    173  */
    174 # define KN230_SYS_NVRAM_EVENBNK_STATUS_OFFSET	(0x200000)
    175 # define KN230_SYS_NVRAM_ODDBNK_STATUS_OFFSET	(0x200000 +4)
    176 # define KN230_SYS_NVRAM_EVENBNK_CONTROL_OFFSET	(-0x200000)
    177 # define KN230_SYS_NVRAM_ODDNK_STATUS_OFFSET	(-0x200000+4)
    178 
    179 /* flags in nvram per-bank status register */
    180 #define KN230_NVRAM_BATFAIL	0x00000001       /* battery failure */
    181 #define KN230_NVRAM_BATKILL	0x00000002       /* battery kill */
    182 /*
    183  * To enable the battery, write 0x00 to each nvram control reg.
    184  * To disable the battery, write the sequence
    185  *    0x01, 0x01, 0x00, 0x00, 0x01
    186  * to both per-bank control registers (do banks in parallel, not in sequence).
    187  */
    188