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    Searched defs:LiveIn (Results 1 - 13 of 13) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
LiveRangeCalc.h 122 /// LiveIn - Work list of blocks where the live-in value has yet to be
126 SmallVector<LiveInBlock, 16> LiveIn;
142 /// live in are added to the LiveIn array, and the function returns false.
154 /// blocks in LiveIn. Create PHI-def values as required to preserve SSA form.
160 /// Transfer information from the LiveIn vector to the live ranges and update
246 LiveIn.push_back(LiveInBlock(LR, DomNode, Kill));
  /src/external/apache2/llvm/dist/llvm/include/llvm/Analysis/
StackLifetime.h 44 : Begin(Size), End(Size), LiveIn(Size), LiveOut(Size) {}
53 BitVector LiveIn;
  /src/external/apache2/llvm/dist/llvm/tools/llvm-objdump/
SourcePrinter.h 46 bool LiveIn = false;
SourcePrinter.cpp 156 ActiveCols[ColIdx].LiveIn = LV.liveAtAddress(ThisAddr);
160 << ColIdx << ": LiveIn=" << ActiveCols[ColIdx].LiveIn
163 if (!ActiveCols[ColIdx].LiveIn && !ActiveCols[ColIdx].LiveOut)
175 bool LiveIn = LV.liveAtAddress(ThisAddr);
177 if (!LiveIn && !LiveOut)
183 << ColIdx << ": LiveIn=" << LiveIn
186 ActiveCols[ColIdx].LiveIn = LiveIn;
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
SplitKit.h 127 bool LiveIn; ///< Current reg is live in.
MIRPrinter.cpp 315 yaml::MachineFunctionLiveIn LiveIn;
316 printRegMIR(LI.first, LiveIn.Register, TRI);
318 printRegMIR(LI.second, LiveIn.VirtualRegister, TRI);
319 MF.LiveIns.push_back(LiveIn);
MachineCSE.cpp 705 // livein list.
707 auto LiveIn = PhysDefs.pop_back_val();
708 if (!MBB->isLiveIn(LiveIn.second))
709 MBB->addLiveIn(LiveIn.second);
RDFLiveness.cpp 859 RefMap LiveIn;
860 traverse(&MF.front(), LiveIn);
929 BitVector LiveIn(TRI.getNumRegs()), Live(TRI.getNumRegs());
930 CopyLiveIns(B, LiveIn);
982 void Liveness::traverse(MachineBasicBlock *B, RefMap &LiveIn) {
983 // The LiveIn map, for each (physical) register, contains the set of live
1014 LiveIn[S.first].insert(S.second.begin(), S.second.end());
1023 dbgs() << " LiveIn: " << Print<RefMap>(LiveIn, DFG) << '\n';
1030 LiveIn[S.first].insert(S.second.begin(), S.second.end())
    [all...]
StackColoring.cpp 426 BitVector LiveIn;
580 dumpBV("LIVE_IN", BlockInfo.LiveIn);
819 // Compute LiveIn by unioning together the LiveOut sets of all preds.
841 // Update block LiveIn set, noting whether it has changed.
842 if (LocalLiveIn.test(BlockInfo.LiveIn)) {
844 BlockInfo.LiveIn |= LocalLiveIn;
872 for (int pos = MBBLiveness.LiveIn.find_first(); pos != -1;
873 pos = MBBLiveness.LiveIn.find_next(pos)) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
GCNSchedStrategy.cpp 483 auto LiveIn = std::move(LiveInIt->second);
484 RPTracker.reset(*MBB->begin(), &LiveIn);
AMDGPUInstructionSelector.cpp 1212 Register LiveIn = getFunctionLiveInPhysReg(MF, TII, ReturnAddrReg,
1215 .addReg(LiveIn);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/
Utils.cpp 633 Register LiveIn = MRI.getLiveInVirtReg(PhysReg);
634 if (LiveIn) {
635 MachineInstr *Def = MRI.getVRegDef(LiveIn);
639 return LiveIn;
647 LiveIn = MF.addLiveIn(PhysReg, &RC);
649 MRI.setType(LiveIn, RegTy);
652 BuildMI(EntryMBB, EntryMBB.begin(), DL, TII.get(TargetOpcode::COPY), LiveIn)
656 return LiveIn;
  /src/external/apache2/llvm/dist/llvm/lib/Transforms/Scalar/
RewriteStatepointsForGC.cpp 243 MapVector<BasicBlock *, SetVector<Value *>> LiveIn;
2887 // KILL/Def - Remove this definition from LiveIn
2895 // USE - Add to the LiveIn set for this instruction
2965 checkBasicSSA(DT, Data.LiveIn[&BB], BB.getTerminator());
2986 Data.LiveIn[&BB] = Data.LiveSet[&BB];
2987 Data.LiveIn[&BB].set_union(Data.LiveOut[&BB]);
2988 Data.LiveIn[&BB].set_subtract(Data.KillSet[&BB]);
2989 if (!Data.LiveIn[&BB].empty())
3002 assert(Data.LiveIn.count(Succ));
3003 LiveOut.set_union(Data.LiveIn[Succ])
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