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    Searched defs:LowerVECTOR_SHUFFLE (Results 1 - 5 of 5) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/
WebAssemblyISelLowering.cpp 1255 return LowerVECTOR_SHUFFLE(Op, DAG);
1918 WebAssemblyTargetLowering::LowerVECTOR_SHUFFLE(SDValue Op,
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonISelLowering.cpp 2136 HexagonTargetLowering::LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG)
3143 case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG);
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp 9681 /// LowerVECTOR_SHUFFLE - Return the code we lower for VECTOR_SHUFFLE. If this
9685 SDValue PPCTargetLowering::LowerVECTOR_SHUFFLE(SDValue Op,
10834 case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG);
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 4561 return LowerVECTOR_SHUFFLE(Op, DAG);
9002 SDValue AArch64TargetLowering::LowerVECTOR_SHUFFLE(SDValue Op,
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp 8329 static SDValue LowerVECTOR_SHUFFLE(SDValue Op, SelectionDAG &DAG,
9891 case ISD::VECTOR_SHUFFLE: return LowerVECTOR_SHUFFLE(Op, DAG, Subtarget);

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