| /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/ |
| AMDGPUMacroFusion.cpp | 43 const MachineBasicBlock &MBB = *FirstMI->getParent();
44 const MachineRegisterInfo &MRI = MBB.getParent()->getRegInfo();
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| SILateBranchLowering.cpp | 68 static void generateEndPgm(MachineBasicBlock &MBB,
73 BuildMI(MBB, I, DL, TII->get(AMDGPU::EXP_DONE))
84 BuildMI(MBB, I, DL, TII->get(AMDGPU::S_ENDPGM)).addImm(0);
87 static void splitBlock(MachineBasicBlock &MBB, MachineInstr &MI,
89 MachineBasicBlock *SplitBB = MBB.splitAt(MI, /*UpdateLiveIns*/ true);
96 DTUpdates.push_back({DomTreeT::Delete, &MBB, Succ});
98 DTUpdates.push_back({DomTreeT::Insert, &MBB, SplitBB});
104 MachineBasicBlock &MBB = *MI.getParent();
107 auto BranchMI = BuildMI(MBB, MI, DL, TII->get(AMDGPU::S_CBRANCH_SCC0))
111 if (Next != MBB.end() && !Next->isTerminator()
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| /src/external/apache2/llvm/dist/llvm/lib/Target/XCore/ |
| XCoreFrameToArgsOffsetElim.cpp | 53 MachineBasicBlock &MBB = *MFI;
54 for (MachineBasicBlock::iterator MBBI = MBB.begin(), EE = MBB.end();
59 MBBI = TII.loadImmediate(MBB, MBBI, Reg, StackSize);
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| /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/ |
| LoopTraversal.h | 89 MachineBasicBlock *MBB = nullptr;
99 : MBB(BB), PrimaryPass(Primary), IsDone(Done) {}
110 bool isBlockDone(MachineBasicBlock *MBB);
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| MachineOptimizationRemarkEmitter.h | 33 const MachineBasicBlock *MBB)
35 MBB->getParent()->getFunction(), Loc),
36 MBB(MBB) {}
49 const MachineBasicBlock *getBlock() const { return MBB; }
52 const MachineBasicBlock *MBB;
61 /// Loc is the debug location and \p MBB is the block that the optimization
65 const MachineBasicBlock *MBB)
67 RemarkName, Loc, MBB) {}
87 /// remark. \p Loc is the debug location and \p MBB is the block that th
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| FinalizeISel.cpp | 54 MachineBasicBlock *MBB = &*I;
55 for (MachineBasicBlock::iterator MBBI = MBB->begin(), MBBE = MBB->end();
62 MachineBasicBlock *NewMBB = TLI->EmitInstrWithCustomInserter(MI, MBB);
64 if (NewMBB != MBB) {
65 MBB = NewMBB;
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| MachineOptimizationRemarkEmitter.cpp | 35 MachineOptimizationRemarkEmitter::computeHotness(const MachineBasicBlock &MBB) {
39 return MBFI->getBlockProfileCount(&MBB);
44 const MachineBasicBlock *MBB = Remark.getBlock();
45 if (MBB)
46 Remark.setHotness(computeHotness(*MBB));
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| ExecutionDomainFix.cpp | 155 MachineBasicBlock *MBB = TraversedMBB.MBB;
157 // Set up LiveRegs to represent registers entering MBB.
163 if (MBB->pred_empty()) {
164 LLVM_DEBUG(dbgs() << printMBBReference(*MBB) << ": entry\n");
169 for (MachineBasicBlock *pred : MBB->predecessors()) {
203 LLVM_DEBUG(dbgs() << printMBBReference(*MBB)
211 unsigned MBBNumber = TraversedMBB.MBB->getNumber();
214 // Save register clearances at end of MBB - used by enterBasicBlock().
402 for (MachineInstr &MI : *TraversedMBB.MBB) {
[all...] |
| ExpandPostRAPseudos.cpp | 77 MachineBasicBlock *MBB = MI->getParent();
120 TII->copyPhysReg(*MBB, MI, MI->getDebugLoc(), DstSubReg, InsReg,
131 MBB->erase(MI);
191 for (MachineBasicBlock &MBB : MF) {
192 for (MachineBasicBlock::iterator mi = MBB.begin(), me = MBB.end();
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| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/ |
| InstrEmitter.h | 39 MachineBasicBlock *MBB;
141 MachineBasicBlock *getBlock() { return MBB; }
148 InstrEmitter(const TargetMachine &TM, MachineBasicBlock *mbb,
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| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/ |
| ARMBasicBlockInfo.cpp | 47 void ARMBasicBlockUtils::computeBlockSize(MachineBasicBlock *MBB) {
48 LLVM_DEBUG(dbgs() << "computeBlockSize: " << MBB->getName() << "\n");
49 BasicBlockInfo &BBI = BBInfo[MBB->getNumber()];
54 for (MachineInstr &I : *MBB) {
66 if (!MBB->empty() && MBB->back().getOpcode() == ARM::tBR_JTr) {
68 MBB->getParent()->ensureAlignment(Align(4));
76 const MachineBasicBlock *MBB = MI->getParent();
78 // The offset is composed of two things: the sum of the sizes of all MBB's
81 unsigned Offset = BBInfo[MBB->getNumber()].Offset
[all...] |
| ARMInstrInfo.cpp | 120 MachineBasicBlock &MBB = *MI->getParent();
125 MIB = BuildMI(MBB, MI, DL, get(ARM::MOV_ga_pcrel_ldr), Reg)
130 MachineMemOperand *MMO = MBB.getParent()->getMachineMemOperand(
131 MachinePointerInfo::getGOT(*MBB.getParent()), Flags, 4, Align(4));
133 BuildMI(MBB, MI, DL, get(ARM::LDRi12), Reg)
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| MVETailPredUtils.h | 86 MachineBasicBlock *MBB = MI->getParent();
93 BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(ARM::t2CMPri));
100 BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(ARM::t2SUBri));
111 BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(BrOpc));
120 MachineBasicBlock *MBB = MI->getParent();
121 BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(ARM::tMOVr))
131 MachineBasicBlock *MBB = MI->getParent();
134 BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(ARM::t2SUBri));
153 MachineBasicBlock *MBB = MI->getParent();
158 BuildMI(*MBB, MI, MI->getDebugLoc(), TII->get(ARM::t2CMPri))
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/ |
| BPFRegisterInfo.cpp | 63 MachineBasicBlock &MBB = *MI.getParent();
64 MachineFunction &MF = *MBB.getParent();
69 for (auto &I : MBB)
90 BuildMI(MBB, ++II, DL, TII.get(BPF::ADD_ri), reg)
110 BuildMI(MBB, ++II, DL, TII.get(BPF::MOV_rr), reg)
112 BuildMI(MBB, II, DL, TII.get(BPF::ADD_ri), reg)
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| /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/ |
| PPCCTRLoops.cpp | 98 static bool verifyCTRBranch(MachineBasicBlock *MBB,
105 if (I == MBB->begin()) {
106 Visited.insert(MBB);
112 Visited.insert(MBB);
113 if (I == MBB->end())
117 for (MachineBasicBlock::iterator IE = MBB->begin();; --I) {
125 LLVM_DEBUG(dbgs() << printMBBReference(*MBB) << " (" << MBB->getFullName()
143 if (MachineFunction::iterator(MBB) == MBB->getParent()->begin())
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| /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/ |
| LeonPasses.cpp | 46 MachineBasicBlock &MBB = *MFI;
47 for (auto MBBI = MBB.begin(), E = MBB.end(); MBBI != E; ++MBBI) {
52 BuildMI(MBB, NMBBI, DL, TII.get(SP::NOP));
81 MachineBasicBlock &MBB = *MFI;
82 for (auto MBBI = MBB.begin(), E = MBB.end(); MBBI != E; ++MBBI) {
133 MachineBasicBlock &MBB = *MFI;
134 for (auto MBBI = MBB.begin(), E = MBB.end(); MBBI != E; ++MBBI)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Target/WebAssembly/ |
| WebAssemblyDebugValueManager.cpp | 59 MachineBasicBlock *MBB = Insert->getParent();
61 MBB->splice(Insert, DBI->getParent(), DBI);
73 MachineBasicBlock *MBB = Insert->getParent();
74 MachineFunction *MF = MBB->getParent();
79 MBB->insert(Insert, Clone);
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| /src/external/apache2/llvm/dist/llvm/lib/Target/X86/ |
| X86IndirectBranchTracking.cpp | 57 /// Adds a new ENDBR instruction to the beginning of the MBB.
61 bool addENDBR(MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const;
73 MachineBasicBlock &MBB, MachineBasicBlock::iterator I) const {
78 // If the MBB/I is empty or the current instruction is not ENDBR,
80 if (I == MBB.end() || I->getOpcode() != EndbrOpcode) {
81 BuildMI(MBB, I, MBB.findDebugLoc(I), TII->get(EndbrOpcode));
129 auto MBB = MF.begin();
130 Changed |= addENDBR(*MBB, MBB->begin())
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| /src/external/apache2/llvm/dist/llvm/lib/Target/NVPTX/ |
| NVPTXPeephole.cpp | 74 auto &MBB = *Root.getParent();
75 auto &MF = *MBB.getParent();
89 if (!GenericAddrDef || GenericAddrDef->getParent() != &MBB ||
105 auto &MBB = *Root.getParent();
106 auto &MF = *MBB.getParent();
117 MBB.insert((MachineBasicBlock::iterator)&Root, MIB);
132 for (auto &MBB : MF) {
134 auto BlockIter = MBB.begin();
136 while (BlockIter != MBB.end()) {
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/ |
| RISCVMCInstLower.cpp | 141 const MachineBasicBlock *MBB = MI->getParent();
142 assert(MBB && "MI expected to be in a basic block");
143 const MachineFunction *MF = MBB->getParent();
144 assert(MF && "MBB expected to be in a machine function");
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| /src/external/apache2/llvm/dist/llvm/tools/llvm-exegesis/lib/ |
| Assembler.h | 47 BasicBlockFiller(MachineFunction &MF, MachineBasicBlock *MBB,
56 MachineBasicBlock *const MBB;
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| Localizer.cpp | 83 auto &MBB = MF.front();
85 for (MachineInstr &MI : llvm::reverse(MBB)) {
161 MachineBasicBlock &MBB = *MI->getParent();
175 while (II != MBB.end() && !Users.count(&*II))
180 assert(II != MBB.end() && "Didn't find the user in the MBB");
182 MBB.insert(II, MI);
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| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| HexagonCFGOptimizer.cpp | 40 bool isOnFallThroughPath(MachineBasicBlock *MBB);
107 bool HexagonCFGOptimizer::isOnFallThroughPath(MachineBasicBlock *MBB) {
108 if (MBB->canFallThrough())
110 for (MachineBasicBlock *PB : MBB->predecessors())
111 if (PB->isLayoutSuccessor(MBB) && PB->canFallThrough())
123 MachineBasicBlock *MBB = &*MBBb;
126 MachineBasicBlock::iterator MII = MBB->getFirstTerminator();
127 if (MII != MBB->end()) {
158 unsigned NumSuccs = MBB->succ_size();
159 MachineBasicBlock::succ_iterator SI = MBB->succ_begin()
[all...] |
| HexagonFixupHwLoops.cpp | 116 for (const MachineBasicBlock &MBB : MF) {
117 if (MBB.getAlignment() != Align(1)) {
121 InstOffset = alignTo(InstOffset, MBB.getAlignment());
124 BlockToInstOffset[&MBB] = InstOffset;
125 for (const MachineInstr &MI : MBB)
132 for (MachineBasicBlock &MBB : MF) {
133 InstOffset = BlockToInstOffset[&MBB];
136 MachineBasicBlock::iterator MII = MBB.begin();
137 MachineBasicBlock::iterator MIE = MBB.end();
152 MII = MBB.erase(MII)
[all...] |
| HexagonVectorPrint.cpp | 96 static void addAsmInstr(MachineBasicBlock *MBB, unsigned Reg,
103 BuildMI(*MBB, I, DL, QII->get(TargetOpcode::INLINEASM))
137 for (auto &MBB : Fn)
138 for (auto &MI : MBB) {
141 for (++MII; MII != MBB.instr_end() && MII->isInsideBundle(); ++MII) {
166 MachineBasicBlock *MBB = I->getParent();
174 while (MBB->instr_end() != MII && MII->isInsideBundle())
180 if (MBB->instr_end() == MII)
185 addAsmInstr(MBB, Reg, MII, DL, QII, Fn);
188 addAsmInstr(MBB, Hexagon::V0 + (Reg - Hexagon::W0) * 2 + 1
[all...] |
