1 /* $NetBSD: madreg.h,v 1.6 2022/11/02 20:38:22 andvar Exp $ */ 2 /* 3 * Copyright (c) 1996 Lennart Augustsson 4 * Copyright (c) 1995 Hannu Savolainen 5 * Copyright (c) 1991-1993 Regents of the University of California. 6 * All rights reserved. 7 * 8 * Redistribution and use in source and binary forms, with or without 9 * modification, are permitted provided that the following conditions 10 * are met: 11 * 1. Redistributions of source code must retain the above copyright 12 * notice, this list of conditions and the following disclaimer. 13 * 2. Redistributions in binary form must reproduce the above copyright 14 * notice, this list of conditions and the following disclaimer in the 15 * documentation and/or other materials provided with the distribution. 16 * 3. All advertising materials mentioning features or use of this software 17 * must display the following acknowledgement: 18 * This product includes software developed by the Computer Systems 19 * Engineering Group at Lawrence Berkeley Laboratory. 20 * 4. Neither the name of the University nor of the Laboratory may be used 21 * to endorse or promote products derived from this software without 22 * specific prior written permission. 23 * 24 * THIS SOFTWARE IS PROVIDED BY THE REGENTS AND CONTRIBUTORS ``AS IS'' AND 25 * ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE 26 * IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE 27 * ARE DISCLAIMED. IN NO EVENT SHALL THE REGENTS OR CONTRIBUTORS BE LIABLE 28 * FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL 29 * DAMAGES (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS 30 * OR SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) 31 * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT 32 * LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY 33 * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF 34 * SUCH DAMAGE. 35 * 36 */ 37 38 /* 39 * Variations of the supported chips. 40 */ 41 42 #define MAD_NONE 0 43 #define MAD_82C928 1 /* OPTi 82C928 MAD16 */ 44 #define MAD_OTI601D 2 /* OAK OTI-601D Mozart */ 45 #define MAD_82C929 3 /* OPTi 82C929 MAD16 Pro */ 46 #define MAD_82C931 4 /* OPTi 82C831 */ 47 48 /* 49 * Registers 50 * 51 * The MAD16 occupies I/O ports 0xf8d to 0xf93 (fixed locations). 52 * All ports are inactive by default. They can be activated by 53 * writing 0xE2 or 0xE3 to the password register. The password is valid 54 * only until the next I/O read or write. 55 */ 56 57 #define MAD_BASE 0xf8d 58 #define MAD_NPORT 7 59 60 #define MC1_PORT 0 /* SB address, CDROM interface type, joystick */ 61 #define MC2_PORT 1 /* CDROM address, IRQ, DMA, plus OPL4 bit */ 62 #define MC3_PORT 2 63 #define MC_PASSWD_REG MC3_PORT 64 #define MC4_PORT 3 65 #define MC5_PORT 4 66 #define MC6_PORT 5 67 #define MC7_PORT 6 68 69 #define MC1_NOCD 0x00 70 #define MC1_JOYDISABLE 0x01 71 #define MC1_SONY 0x02 72 #define MC1_MITSUMI 0x04 73 #define MC1_PANASONIC 0x06 74 #define MC1_SECIDE 0x08 75 #define MC1_PRIMIDE 0x0a 76 77 #define MC2_NO_CD_DRQ 0x03 78 #define MC2_OPL4 0x20 79 80 /* Possible WSS emulation ports */ 81 #define M_WSS_PORT0 0x530 82 #define M_WSS_PORT1 0xe80 83 #define M_WSS_PORT2 0xf40 84 #define M_WSS_PORT3 0x604 85 #define M_WSS_NPORTS 4 86 87 /* Port 1 */ 88 #define M_WSS_PORT_SELECT(i) (0x80 | ((i) << 4)) 89 90 #define M_PASSWD_928 0xe2 91 #define M_PASSWD_929 0xe3 92 #define M_PASSWD_931 0xe4 93 94 /* Regions of I/O space that the MAD occupies besides 95 WSS emulation and MAD_BASE. Talk about waste. */ 96 #define MAD_REG1 0x220 97 #define MAD_LEN1 16 98 #define MAD_REG2 0x380 99 #define MAD_LEN2 2 100 #define MAD_REG3 0x388 101 #define MAD_LEN3 4 102
Indexes created Sat Sep 20 22:09:52 GMT 2025